diff --git a/rp2040-hal/src/dma/mod.rs b/rp2040-hal/src/dma/mod.rs index b941f0c18..2047012cf 100644 --- a/rp2040-hal/src/dma/mod.rs +++ b/rp2040-hal/src/dma/mod.rs @@ -143,7 +143,7 @@ trait ChannelRegs { impl ChannelRegs for Channel { unsafe fn ptr() -> *const pac::dma::CH { - &(*pac::DMA::ptr()).ch[CH::id() as usize] as *const _ + (*pac::DMA::ptr()).ch(CH::id() as usize) } fn regs(&self) -> &pac::dma::CH { diff --git a/rp2040-hal/src/pio.rs b/rp2040-hal/src/pio.rs index 86aea6b0f..748604f79 100644 --- a/rp2040-hal/src/pio.rs +++ b/rp2040-hal/src/pio.rs @@ -39,22 +39,22 @@ pub trait PIOExt: Deref + SubsystemReset + Sized + Send let sm0 = UninitStateMachine { block: self.deref(), - sm: &self.deref().sm(0), + sm: self.sm(0), _phantom: core::marker::PhantomData, }; let sm1 = UninitStateMachine { block: self.deref(), - sm: &self.deref().sm(1), + sm: self.sm(1), _phantom: core::marker::PhantomData, }; let sm2 = UninitStateMachine { block: self.deref(), - sm: &self.deref().sm(2), + sm: self.sm(2), _phantom: core::marker::PhantomData, }; let sm3 = UninitStateMachine { block: self.deref(), - sm: &self.deref().sm(3), + sm: self.sm(3), _phantom: core::marker::PhantomData, }; ( diff --git a/rp2040-hal/src/timer.rs b/rp2040-hal/src/timer.rs index 6685047a2..4810a78c6 100644 --- a/rp2040-hal/src/timer.rs +++ b/rp2040-hal/src/timer.rs @@ -319,7 +319,7 @@ macro_rules! impl_alarm { // This lock is for time-criticality cortex_m::interrupt::free(|_| { - let alarm = &timer.$timer_alarm; + let alarm = &timer.$timer_alarm(); // safety: This is the only code in the codebase that accesses memory address $timer_alarm alarm.write(|w| unsafe { w.bits(timestamp_low) });