an exception trap on the trap handler function address fetch cannot return to the instruction interrupted (smclicshv)

[hirooih]

8.2.1. smclicshv Changes to xtvec CSR Mode for CLIC

If the trap handler function address fetch is unsuccessful and a exception trap occurs, the xinhv bit in xcause of the exception handler privilege mode is set indicating that xepc of the exception handler privilege mode contains a trap handler function address instead of the virtual address of an instruction.

I thinks this will lose the virtual address of the instruction interrupted.

The last note on this section writes:

Interrupted context is lost on horizontal traps during table fetch where exceptions are the same privilege level as the interrupt handler.

But vVirtual traps also lose the interrupted context.

zcmt has similar issue.

Unprivileged Architecture, Version 20240411, 27.14.2. Table Jump Fault handling

If an exception occurs on either instruction fetch, xEPC is set to the PC of the table jump instruction, xCAUSE is set as expected for the type of fault and xTVAL (if not set to zero) contains the fetch address which caused the fault.

I think a similar simple approach would work well.

• Set xepc to the address of next instruction interrupted as usual interrupt.
• Set xtval to the addreess of the trap handler function address.
• After xret from load access-fault or load page-fault (misaligned exception should not occurs, because trap vector table is aligned.) handler, the interrupt should occurs again.
• In this method xinhv bit is not required.

I'm afraid that I'm missing something, but please let me know.