From 7f454c3d8aefb1d90727a3db7f13ac691640a575 Mon Sep 17 00:00:00 2001 From: zilong Date: Wed, 17 Apr 2024 11:25:09 +0800 Subject: [PATCH] debug: Fix nonexistent trigger registers trap handle in entry.S --- debug/programs/entry.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/debug/programs/entry.S b/debug/programs/entry.S index 09cad53d6..5c281a6d4 100755 --- a/debug/programs/entry.S +++ b/debug/programs/entry.S @@ -84,8 +84,9 @@ handle_reset: beq t0, t1, 1b .p2align 2 2: - # Restore mtvec + # Restore mtvec and mstatus csrw mtvec, t2 + csrwi mstatus, 0 #ifdef MULTICORE csrr t0, CSR_MHARTID