debug: Fix nonexistent trigger registers trap handle in entry.S #549
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In
Sv39Test
,SV48Test
, andSV57Test
, if the processor does not implement the trigger module, accessing the trigger csr registers will result in a trap, causing thempp
field inmstatus
to be modified to machine mode. Additionally, in the original code,mstatus
is not restored after trap, resulting in the effective privilege mode beingmachine mode
in subsequent translate tests, which prevents address translation and leads to test failures.This PR ensures that processors without implementing the trigger module can pass the tests successfully.