From f1d49ac15f714b393b280ddbf8bd15de06de97f7 Mon Sep 17 00:00:00 2001
From: David Harris <74973295+davidharrishmc@users.noreply.github.com>
Date: Tue, 7 Feb 2023 16:18:37 -0800
Subject: [PATCH 1/2] Update zext.h-01.S

Remove RV64IB from the ISA string.

The RV64IB ISA causes a compilation string of -march=rv64ib and thus a gcc error "cannot find default versions of the ISA extension 'b'".

This is the only test in riscv-arch-test that specifies RV64IB.  I believe it is a typo and should be removed.  When I remove it, riscof produces a Makefile that compiles zext.h-01 successfully.

Signed-off-by: David Harris <74973295+davidharrishmc@users.noreply.github.com>
---
 riscv-test-suite/rv64i_m/B/src/zext.h-01.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/riscv-test-suite/rv64i_m/B/src/zext.h-01.S b/riscv-test-suite/rv64i_m/B/src/zext.h-01.S
index 00a405377..594d5fbf0 100644
--- a/riscv-test-suite/rv64i_m/B/src/zext.h-01.S
+++ b/riscv-test-suite/rv64i_m/B/src/zext.h-01.S
@@ -19,7 +19,7 @@
 // 
 #include "model_test.h"
 #include "arch_test.h"
-RVTEST_ISA("RV64IB,RV64IZbb")
+RVTEST_ISA("RV64IZbb")
 
 .section .text.init
 .globl rvtest_entry_point

From a264bae13ecd3c13bce41cdb78f2869171e3481e Mon Sep 17 00:00:00 2001
From: S Pawan Kumar <pawan.kumar@incoresemi.com>
Date: Wed, 8 Feb 2023 19:39:41 +0530
Subject: [PATCH 2/2] Updated changelog.

---
 CHANGELOG.md | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 2f0e3f5ee..3a3d8e6af 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -1,4 +1,8 @@
 # CHANGELOG
+
+## [3.6.2] - 2023-02-08
+- Remove RV64IB from ISA list of zext test. 
+
 ## [3.6.1] - 2023-01-28
 - Fix satp restore condition.