From d1b82bf8ca9d1ed01b27043c0e7b297e410f5753 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Mon, 30 Sep 2024 18:20:52 +0530 Subject: [PATCH 1/5] Enable IEEE bibliography format Use IEEE style bibliography for citations. The bibliography seems to be rendered in the PDF only when there is a citation. So, update the introduction chapter with citations as well. Suggested-by: Anup Patel Signed-off-by: Sunil V L --- src/bibliography.adoc | 8 ++------ src/intro.adoc | 9 +++++---- src/rimt-spec.adoc | 2 +- src/rimt.bib | 4 ++-- 4 files changed, 10 insertions(+), 13 deletions(-) diff --git a/src/bibliography.adoc b/src/bibliography.adoc index 9259fa5..4cc3eb7 100644 --- a/src/bibliography.adoc +++ b/src/bibliography.adoc @@ -1,8 +1,4 @@ [bibliography] -== References +== Bibliography -* link:https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0.0/riscv-iommu.pdf[RISC-V IOMMU Specification], v1.0.0 -* link:https://uefi.org/specs/ACPI/6.5/[ACPI Specification], Version: v6.5 - -// REVISIT -//bibliography::[] +bibliography::[] diff --git a/src/intro.adoc b/src/intro.adoc index d5028f1..9baec3f 100644 --- a/src/intro.adoc +++ b/src/intro.adoc @@ -1,6 +1,7 @@ == Introduction -The RISC-V IO Mapping Table (RIMT) provides information about the RISC-V IOMMU and the relationship -between the IO topology and the IOMMU in ACPI based RISC-V platforms. The RIMT identifies which -components are behind IOMMU and how they are connected together. RISC-V IOMMU can be implemented as -either a PCI device or a platform device. +The RISC-V IO Mapping Table (RIMT) provides information about the RISC-V IOMMU +cite:[IOMMU-SPEC] and the relationship between the IO topology and the IOMMU in +ACPI cite:[ACPI-SPEC] based RISC-V platforms. The RIMT identifies which +components are behind IOMMU and how they are connected together. RISC-V IOMMU +can be implemented as either a PCI device or a platform device. diff --git a/src/rimt-spec.adoc b/src/rimt-spec.adoc index 2f0e35e..1ffd61c 100644 --- a/src/rimt-spec.adoc +++ b/src/rimt-spec.adoc @@ -23,7 +23,7 @@ //:srcdir: src :bibtex-file: src/rimt.bib :bibtex-order: alphabetical -:bibtex-style: apa +:bibtex-style: ieee :icons: font :lang: en :listing-caption: Listing diff --git a/src/rimt.bib b/src/rimt.bib index e2d0a5f..0e46d88 100644 --- a/src/rimt.bib +++ b/src/rimt.bib @@ -3,6 +3,6 @@ @electronic{IOMMU-SPEC url = {https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0.0/riscv-iommu.pdf} } @electronic{ACPI-SPEC, - title = {Advanced Configuration and Power Interface Specification 6.6}, - url = {https://uefi.org/specifications} + title = {Advanced Configuration and Power Interface Specification 6.5}, + url = {https://uefi.org/specs/ACPI/6.5} } From c4f716200f2c28e132ab6b0aa3330fea81b92ec8 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Tue, 1 Oct 2024 09:36:07 +0530 Subject: [PATCH 2/5] Support HW ID field even for PCI IOMMU Currently, HW ID is described as valid only for platform IOMMU device. The PCI IOMMU can also have valid PCI ID (Vendor ID/Device ID) in this field. So, update the description to allow PCI IOMMU as well. Signed-off-by: Sunil V L --- src/rimt-main.adoc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/rimt-main.adoc b/src/rimt-main.adoc index 93c87e5..2c7ccae 100644 --- a/src/rimt-main.adoc +++ b/src/rimt-main.adoc @@ -81,8 +81,9 @@ the structure in RIMT used to report the configuration and capabilities of each by the IOMMU. | Reserved | 2 | 4 | Must be zero. | ID | 2 | 6 | Unique ID of this IOMMU. -| Hardware ID | 8 | 8 | ACPI ID. This field is valid only for - an IOMMU that is a platform device. +| Hardware ID | 8 | 8 | ACPI ID of the platform IOMMU device + or PCI ID (Vendor ID + Device ID) for + the PCI IOMMU device. | Base Address | 8 | 16 | Base address of the IOMMU registers. This field is valid only for an IOMMU that is a platform device. If IOMMU From 853ef617388a9ac59c60fde97fed23765c8d14be Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Tue, 1 Oct 2024 10:07:26 +0530 Subject: [PATCH 3/5] Update version to indicate rc2 Signed-off-by: Sunil V L --- Makefile | 2 +- src/rimt-spec.adoc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index a36cc09..743ffb9 100644 --- a/Makefile +++ b/Makefile @@ -13,7 +13,7 @@ # the Doc Template for RISC-V Extensions. DATE ?= $(shell date +%Y-%m-%d) -VERSION ?= v1.0.0-rc1 +VERSION ?= v1.0.0-rc2 REVMARK ?= Draft DOCKER_RUN := docker run --rm -v ${PWD}:/build -w /build \ riscvintl/riscv-docs-base-container-image:latest diff --git a/src/rimt-spec.adoc b/src/rimt-spec.adoc index 1ffd61c..7fadca4 100644 --- a/src/rimt-spec.adoc +++ b/src/rimt-spec.adoc @@ -3,7 +3,7 @@ :docgroup: Platform Runtime Services Task Group :description: RISC-V IO Mapping Table (RIMT) :company: RISC-V.org -:revdate: 9/2024 +:revdate: 10/2024 :revnumber: 1.0 :revremark: This document is under development. Expect potential changes. Visit http://riscv.org/spec-state for further details. :revinfo: From 2ed9c478ce19044b9afb654e5f3fdea4e4b0b81c Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Tue, 1 Oct 2024 10:07:50 +0530 Subject: [PATCH 4/5] Add Drew to contributor list Signed-off-by: Sunil V L --- src/contributors.adoc | 1 + 1 file changed, 1 insertion(+) diff --git a/src/contributors.adoc b/src/contributors.adoc index 7a7b698..671c409 100644 --- a/src/contributors.adoc +++ b/src/contributors.adoc @@ -4,6 +4,7 @@ This RISC-V specification has been contributed to directly or indirectly by: [%hardbreaks] * Aaron Durbin +* Andrew Jones * Anup Patel * Atish Kumar Patra * Bin Meng From e45e3985d2a0fb10401cae6061cfcf6974d842f9 Mon Sep 17 00:00:00 2001 From: Sunil V L Date: Tue, 1 Oct 2024 10:10:35 +0530 Subject: [PATCH 5/5] Add changelog details for RC2 release Signed-off-by: Sunil V L --- src/changelog.adoc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/changelog.adoc b/src/changelog.adoc index 46af06e..dd3dd3d 100644 --- a/src/changelog.adoc +++ b/src/changelog.adoc @@ -1,5 +1,11 @@ == Changelog +- *Version 1.0.0-rc2* + * Draft for ARC review. + * Addressed internal review feedback. + * Used IEEE style bibliography. + * Allowed HW ID to be valid for PCI IOMMU as well. + - *Version 1.0.0-rc1* * Draft for internal review. * Added ID mapping examples.