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P3450.dec
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#
# Copyright (c) 2011-2015, ARM Limited. All rights reserved.
# Copyright (c) 2014, Linaro Limited. All rights reserved.
# Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
# Copyright (c) 2018-2019, Bingxing Wang. All rights reserved.
# Copyright (c) 2020, Ruikai Liu. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
[Defines]
DEC_SPECIFICATION = 0x00010005
PACKAGE_NAME = P3450Pkg
PACKAGE_GUID = 24d983cc-a7dd-48ab-bd9a-fa3c8e478217
PACKAGE_VERSION = 0.1
[Includes.common]
Include # Root include for the package
[Guids.common]
gP3450PkgTokenSpaceGuid = { 0x1900628a, 0x0a8a, 0x4099, { 0x8d, 0xe5, 0xf2, 0x08, 0xff, 0x80, 0xc4, 0xbf } }
[Protocols]
gTegra210ClockManagementProtocolGuid = { 0x9c11c45d, 0xc497, 0x4e95, { 0xac, 0x18, 0x9f, 0x91, 0xca, 0x8b, 0x9a, 0xd0 } }
gTegraUBootClockManagementProtocolGuid = { 0x9c11c451, 0xc497, 0x4e95, { 0xac, 0x18, 0x9f, 0x91, 0xca, 0x8b, 0x9a, 0xd0 } }
gPmicProtocolGuid = { 0x9c11c45d, 0xc497, 0x4e95, { 0xac, 0x18, 0x9f, 0x91, 0xca, 0x8b, 0x9a, 0xd1 } }
gTegraPinMuxProtocolGuid = { 0x9c11c45d, 0xc497, 0x4e95, { 0xac, 0x18, 0x9f, 0x91, 0xca, 0x8b, 0x15, 0xd1 } }
[PcdsFixedAtBuild.common]
#UART
gP3450PkgTokenSpaceGuid.PcdTegra210UartAddress|0x70006000|UINT32|0x0000a308
# Simple FrameBuffer
#gNintendoSwitchPkgTokenSpaceGuid.PcdMipiFrameBufferAddress|0xc0000000|UINT32|0x0000a400
# It's actually vertical.
# Maybe in the future we can workaround this in EL2
#gNintendoSwitchPkgTokenSpaceGuid.PcdMipiFrameBufferWidth|768|UINT32|0x0000a401
#gNintendoSwitchPkgTokenSpaceGuid.PcdMipiFrameBufferHeight|1280|UINT32|0x0000a402
#gNintendoSwitchPkgTokenSpaceGuid.PcdMipiFrameBufferPixelBpp|32|UINT32|0x0000a403
#gNintendoSwitchPkgTokenSpaceGuid.PcdMipiFrameBufferVisibleWidth|720|UINT32|0x0000a405
#gNintendoSwitchPkgTokenSpaceGuid.PcdMipiFrameBufferVisibleHeight|1280|UINT32|0x0000a406
# SMBIOS
gP3450PkgTokenSpaceGuid.PcdSmbiosSystemModel|"Jetson Nano"|VOID*|0x0000a301
gP3450PkgTokenSpaceGuid.PcdSmbiosProcessorModel|"NVIDIA Tegra X1"|VOID*|0x0000a302
gP3450PkgTokenSpaceGuid.PcdSmbiosSystemRetailModel|"DNE"|VOID*|0x0000a303
# Carveout information
gP3450PkgTokenSpaceGuid.PcdTrustZoneCarveoutSize|0|UINT64|0x0000a404
# From the TRM
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|34|UINT32|0x0000a407
[PcdsDynamic]
gP3450PkgTokenSpaceGuid.PcdDynamicStub|0|UINT64|0x0001a400