From dfd035498cdb5369c910a2e50fd9f114152a7c63 Mon Sep 17 00:00:00 2001 From: lisongjun Date: Fri, 3 Jan 2025 16:58:14 +0800 Subject: [PATCH 1/6] Revert "arm: dts: rock-2: Enable m.2 e-key pcie for E24C" This reverts commit 7c688dfc98002b95dd44f3a62d16900e826557a7. Signed-off-by: SongJun Li --- arch/arm/dts/rk3528-rock-2.dts | 38 ---------------------------------- 1 file changed, 38 deletions(-) diff --git a/arch/arm/dts/rk3528-rock-2.dts b/arch/arm/dts/rk3528-rock-2.dts index a50b862b5d9..187a618eef0 100644 --- a/arch/arm/dts/rk3528-rock-2.dts +++ b/arch/arm/dts/rk3528-rock-2.dts @@ -11,42 +11,4 @@ / { model = "Radxa ROCK 2 Series"; - - vcc5v0_sys: vcc5v0-sys { - u-boot,dm-pre-reloc; - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc3v3_pcie: vcc3v3-pcie { - u-boot,dm-pre-reloc; - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <5000>; - enable-active-high; - gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&gpio4 { - u-boot,dm-spl; -}; - -&combphy_pu { - u-boot,dm-pre-reloc; - status = "okay"; -}; - -&pcie2x1 { - u-boot,dm-pre-reloc; - reset-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; }; From 30d52caf73089a833aca7295955a983170f05d50 Mon Sep 17 00:00:00 2001 From: lisongjun Date: Thu, 2 Jan 2025 14:27:54 +0800 Subject: [PATCH 2/6] Revert "rockchip: rk3528: enable CONFIG_ID_EEPROM" CONFIG_ID_EEPROM should not be defined in this file This reverts commit 8bac78303e7e5acc90d6085a18a5af682dff37d3. Signed-off-by: SongJun Li --- include/configs/rk3528_common.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/configs/rk3528_common.h b/include/configs/rk3528_common.h index f806a9ee9b0..76895dc356b 100644 --- a/include/configs/rk3528_common.h +++ b/include/configs/rk3528_common.h @@ -79,8 +79,6 @@ #define CONFIG_MISC_INIT_R -#define CONFIG_ID_EEPROM - #ifdef CONFIG_ARM64 #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00c00000\0" \ From 09e9d3a71ebd4fe0d81ea6c2fd1f87dc73c962fd Mon Sep 17 00:00:00 2001 From: lisongjun Date: Thu, 2 Jan 2025 14:30:36 +0800 Subject: [PATCH 3/6] board: rockchip: evb_rk3528: Add hardware ID recognition for E24C Signed-off-by: SongJun Li --- board/rockchip/evb_rk3528/evb_rk3528.c | 1 + 1 file changed, 1 insertion(+) diff --git a/board/rockchip/evb_rk3528/evb_rk3528.c b/board/rockchip/evb_rk3528/evb_rk3528.c index c4cc8215334..aa69a658205 100644 --- a/board/rockchip/evb_rk3528/evb_rk3528.c +++ b/board/rockchip/evb_rk3528/evb_rk3528.c @@ -108,6 +108,7 @@ static struct variant_def variants[] = { {"radxa,rock-2a", 320, 380, 0, -1, "rockchip/rk3528-radxa-e20c.dtb"}, {"radxa,rock-2a", 430, 490, 0, -1, "rockchip/rk3528-medge-io.dtb"}, {"radxa,rock-2a", 530, 710, 0, -1, "rockchip/rk3528-rock-2f.dtb"}, + {"radxa,rock-2a", 760, 810, 0, -1, "rockchip/rk3528-radxa-e24c.dtb"}, }; static void set_fdtfile(void) From b273d088187d3fecb70d2a447a0d8f3c8f005c7a Mon Sep 17 00:00:00 2001 From: lisongjun Date: Thu, 2 Jan 2025 14:51:48 +0800 Subject: [PATCH 4/6] arm: dts: add radxa e24c spinor boot dts Signed-off-by: SongJun Li --- arch/arm/dts/rk3528-radxa-e24c-spi.dts | 50 ++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 arch/arm/dts/rk3528-radxa-e24c-spi.dts diff --git a/arch/arm/dts/rk3528-radxa-e24c-spi.dts b/arch/arm/dts/rk3528-radxa-e24c-spi.dts new file mode 100644 index 00000000000..320b7ae5baf --- /dev/null +++ b/arch/arm/dts/rk3528-radxa-e24c-spi.dts @@ -0,0 +1,50 @@ +/* + * SPDX-License-Identifier: GPL-2.0+ + * + * Copyright (c) 2024 Rockchip Electronics Co., Ltd. + * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd. + * + */ + +/dts-v1/; +#include "rk3528-rock-2.dts" + +/ { + vcc5v0_sys: vcc5v0-sys { + u-boot,dm-pre-reloc; + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc3v3_pcie: vcc3v3-pcie { + u-boot,dm-pre-reloc; + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <5000>; + enable-active-high; + gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&gpio4 { + u-boot,dm-spl; +}; + +&combphy_pu { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&pcie2x1 { + u-boot,dm-pre-reloc; + reset-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; From e7e3c2a5cd5e29c7ade4760577ad2e089aa1d327 Mon Sep 17 00:00:00 2001 From: lisongjun Date: Thu, 2 Jan 2025 15:11:06 +0800 Subject: [PATCH 5/6] configs: rock 2: add CONFIG_ID_EEPROM Signed-off-by: SongJun Li --- configs/rock-2-rk3528_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/rock-2-rk3528_defconfig b/configs/rock-2-rk3528_defconfig index 76715fd8908..542286c867c 100644 --- a/configs/rock-2-rk3528_defconfig +++ b/configs/rock-2-rk3528_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x80000 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" CONFIG_ROCKCHIP_RK3528=y +CONFIG_ID_EEPROM=y CONFIG_ROCKCHIP_FIT_IMAGE=y CONFIG_ROCKCHIP_VENDOR_PARTITION=y CONFIG_USING_KERNEL_DTB_V2=y From 319e44fd3f8df092db112e518b239caafd2a5280 Mon Sep 17 00:00:00 2001 From: lisongjun Date: Thu, 2 Jan 2025 15:15:29 +0800 Subject: [PATCH 6/6] configs: add radxa e24c spinor boot defconfig Signed-off-by: SongJun Li --- configs/radxa-e24c-spi-rk3528_defconfig | 210 ++++++++++++++++++++++++ 1 file changed, 210 insertions(+) create mode 100644 configs/radxa-e24c-spi-rk3528_defconfig diff --git a/configs/radxa-e24c-spi-rk3528_defconfig b/configs/radxa-e24c-spi-rk3528_defconfig new file mode 100644 index 00000000000..7d1a4a08594 --- /dev/null +++ b/configs/radxa-e24c-spi-rk3528_defconfig @@ -0,0 +1,210 @@ +CONFIG_ARM=y +CONFIG_ARM_SMCCC=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x80000 +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" +CONFIG_ROCKCHIP_RK3528=y +CONFIG_ROCKCHIP_FIT_IMAGE=y +CONFIG_ROCKCHIP_VENDOR_PARTITION=y +CONFIG_USING_KERNEL_DTB_V2=y +CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y +CONFIG_ROCKCHIP_NEW_IDB=y +# CONFIG_ROCKCHIP_SET_SN is not set +# CONFIG_ROCKCHIP_SET_ETHADDR is not set +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_TARGET_EVB_RK3528=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="rk3528-radxa-e24c-spi" +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_IMAGE_POST_PROCESS=y +CONFIG_FIT_HW_CRYPTO=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y +CONFIG_SPL_FIT_HW_CRYPTO=y +# CONFIG_SPL_SYS_DCACHE_OFF is not set +CONFIG_BOOTDELAY=0 +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_ANDROID_BOOTLOADER=y +CONFIG_ANDROID_AVB=y +CONFIG_ANDROID_BOOT_IMAGE_HASH=y +CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y +CONFIG_SPL_CRYPTO_SUPPORT=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_SPL_AB=y +CONFIG_FASTBOOT_BUF_ADDR=0xc00800 +CONFIG_FASTBOOT_BUF_SIZE=0x04000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DTIMG=y +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_LZMADEC is not set +# CONFIG_CMD_UNZIP is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPT=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_BOOT_ANDROID=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_TFTP_BOOTM=y +CONFIG_CMD_TFTP_FLASH=y +# CONFIG_CMD_MISC is not set +CONFIG_CMD_MTD_BLK=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_ISO_PARTITION is not set +CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_DTB_MINIMUM=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clock-parents" +# CONFIG_NET_TFTP_VARS is not set +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +# CONFIG_SARADC_ROCKCHIP is not set +CONFIG_SARADC_ROCKCHIP_V2=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_SCMI=y +CONFIG_SPL_CLK_SCMI=y +CONFIG_DM_CRYPTO=y +CONFIG_SPL_DM_CRYPTO=y +CONFIG_ROCKCHIP_CRYPTO_V2=y +CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y +CONFIG_SCMI_FIRMWARE=y +CONFIG_SPL_SCMI_FIRMWARE=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_ROCKCHIP_GPIO_V2=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_DM_KEY=y +CONFIG_ADC_KEY=y +CONFIG_MISC=y +CONFIG_SPL_MISC=y +CONFIG_ROCKCHIP_OTP=y +CONFIG_SPL_ROCKCHIP_SECURE_OTP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_MTD=y +CONFIG_MTD_BLK=y +CONFIG_MTD_DEVICE=y +CONFIG_MTD_SPI_NAND=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XMC=y +CONFIG_SPI_FLASH_XTX=y +CONFIG_SPI_FLASH_PUYA=y +CONFIG_SPI_FLASH_FMSH=y +CONFIG_SPI_FLASH_DOSILICON=y +CONFIG_SPI_FLASH_BOYA=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_SPL_SPI_FLASH_MTD=y +CONFIG_PHY_RK630=y +CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y +CONFIG_DWC_ETH_QOS=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_REGULATOR_PWM=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_TPL_RAM=y +CONFIG_DM_RESET=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_RESET_ROCKCHIP=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_BASE=0xff9f0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_ROCKCHIP_SFC=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x350a +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_DM_VIDEO=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DRM_ROCKCHIP=y +CONFIG_DRM_ROCKCHIP_DW_HDMI=y +CONFIG_ROCKCHIP_INNO_HDMI_PHY=y +CONFIG_DRM_ROCKCHIP_TVE=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_RSA=y +CONFIG_SPL_RSA=y +CONFIG_RSA_N_SIZE=0x200 +CONFIG_RSA_E_SIZE=0x10 +CONFIG_RSA_C_SIZE=0x20 +CONFIG_SHA256=y +CONFIG_LZ4=y +CONFIG_LZMA=y +CONFIG_SPL_GZIP=y +CONFIG_ERRNO_STR=y +# CONFIG_EFI_LOADER is not set +CONFIG_AVB_LIBAVB=y +CONFIG_AVB_LIBAVB_AB=y +CONFIG_AVB_LIBAVB_ATX=y +CONFIG_AVB_LIBAVB_USER=y +CONFIG_RK_AVB_LIBAVB_USER=y +CONFIG_CMD_PCI=y +CONFIG_NVME=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y +CONFIG_ROCKCHIP_BOOTDEV="nvme 0" +CONFIG_EMBED_KERNEL_DTB_ALWAYS=y +CONFIG_SPL_FIT_IMAGE_KB=2560