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I have fixed the bug in issue #298. During verification, I discovered that the design has issues with handling tail elements. The waveform illustrates that the instruction vadd.vx (sew = 32, vl = 12, vd = v23) writes 64'h2000_0004_2000_0004 into lane0_bank0 of v23. The subsequent instruction, vid (sew = 32, vl = 2, vd = v23), when executed and written back, should theoretically produce 64'h2000_0004_0000_0000 or 64'hffff_ffff_0000_0000 according to RVV SPEC, section 3.4.3. However, since the design does not adhere to this specification, a bug occurs.
Supplementary Pictures
The text was updated successfully, but these errors were encountered:
This should have been fixed with the last MASKU refactoring in this PR. Let me know if the bug is still around. If you want to send me a code snippet to reproduce the bug, I can also check :-)
Issue
I have fixed the bug in issue #298. During verification, I discovered that the design has issues with handling tail elements. The waveform illustrates that the instruction vadd.vx (sew = 32, vl = 12, vd = v23) writes 64'h2000_0004_2000_0004 into lane0_bank0 of v23. The subsequent instruction, vid (sew = 32, vl = 2, vd = v23), when executed and written back, should theoretically produce 64'h2000_0004_0000_0000 or 64'hffff_ffff_0000_0000 according to RVV SPEC, section 3.4.3. However, since the design does not adhere to this specification, a bug occurs.
Supplementary Pictures
The text was updated successfully, but these errors were encountered: