From aa023dabd5ccaaa5a0f665a30feb417950337a64 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Povi=C5=A1er?= Date: Mon, 22 Jan 2024 15:12:41 +0100 Subject: [PATCH] rtl: Flip up string flag on `foldspec_src` MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Martin PoviĊĦer --- fold/logic/rtl.py | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/fold/logic/rtl.py b/fold/logic/rtl.py index 51ae09a..1e7ab83 100644 --- a/fold/logic/rtl.py +++ b/fold/logic/rtl.py @@ -136,6 +136,11 @@ def _convert_to_const(v): raise NotImplementedError(type(v)) +def _make_yconst_str(yc): + yc.flags = 1 + return yc + + class Module: def __init__(self, ym, design): self.ym = ym @@ -175,7 +180,7 @@ def add_wire(self, name, width, **synth_attrs): self.used_wires.add(name) ywire = self.ym.addWire(_to_idstring(name), width) ywire.attributes = { - ID_FOLDSPEC_SRC: encode_string(foldspec_src).ss.as_const(), + ID_FOLDSPEC_SRC: _make_yconst_str(encode_string(foldspec_src).ss.as_const()), **{ys.IdString(f"\\{k}"): _convert_to_const(v).ss.as_const() \ for k, v in synth_attrs.items()} }