Mem Map Virtual

Virtual Memory Map

see also: Memory Map

The kernel allocates memory according to the g4MegDomainTable for 4MB RAM machines:

tag	address	size	frames	handles	flags	size
krnl	0x0C100000	0x00100000	0x00000000	0x00000000	0x00	1MB kernel variables & heap
kstk	0x0C200000	0x00400000	0x00100000	0x00000000	0x04	4MB kernel stacks
user	0x0C600000	0x01000000	0x00380000	0x00200000	0x04	16MB user heaps
prot	0x0D600000	0x00800000	0x00100000	0x00000000	0x07	8MB protected packages
rams	0x0DE00000	0x00800000	0x00000000	0xFFFFFFFF	0x27	8MB ram store
romc	0x60000000	0x08000000	0x00000000	0x00000000	0x06	128MB ROM
ccl0	0x70000000	0x20000000	0x00000000	0x00000000	0x00
csk0	0x90000000	0x40000000	0x00000000	0x00000000	0x00
LicD	0xE0000000	0x08000000	0x00000000	0x00000000	0x00	Licensee Domain

MMU Table Dump:

0x00000000	ROM at 0x00000000, Domain 0 (unless patched!) (see also Mem MapROM and Mem MapROMOS
0x00800000 0x00F00000	ROM Extension at 0x00800000, Domain 0
...
0x01800000 0x0180FFFF	at 0x00013000, Domain 0
...
0x01A00000 0x01C1FFFF	ROM Jump Tables at 0x00002000, Domain 0, may get patched, sparse use
...
0x01D80000 0x01D9FFFF	Magic Pointer Table at 0x003AF000, Domain 0, may get patched, sparse use
...
0x01E00000 0x01EFFFFF	REx Jump Table at 0x007EE000, Domain 0, may get patched, sparse use
...
0x03500000 0x03CFFFFF	Mirror of ROM at 0x00000000, rw/ro, Domain 0
...
0x04000000 0x040FFFFF	Mirror of ROM start at 0x00000000, rw/ro, Domain 0
...
0x05000000 0x051FFFFF	Mirror of first half of Flash Bank 1 at 0x02000000, rw/rw, Domain 0
...
0x0C000000 0x0C000FFF	RAM, 1k rw/na blocks, Domain 0
0x0C000400	Kernel Stack, maps to 0x04004000
...
0x0C002000 0x0C008FFF	RAM, 1k rw/na blocks, Domain 0
	0x0C002C00: IRQ Stack
	0x0C003400: FIQ Stack
	0x0C004000: svc Stack
	0x0C004C00: Abort Stack
	0x0C006000: Undef Stack
	0x0C007400: User Stack
...
0x0C100000 0x0C125FFF	RAM, rw/rw, Domain 2
	0x0C100000: Kernel Domain Heap Base
	0x0C100800: gKernelArea, Kernel Globals Base (end = 0x0C107E14), many symbols available here! See: Mem Map Kernel Area
...
0x0C200000 0x0C205FFF	RAM, rw/rw, Domain 3
...
0x0C310000 0x0C328FFF	RAM, rw/rw, Domain 3, only 1k or 2k blocks
...
0x0C600000 0x0C675FFF	RAM, rw/rw, Domain 0
...
0x0C984000 0x0C984FFF	RAM, rw/rw, Domain 0, 2k block
...
0x0CA6b000 0x0CA8FFFF	RAM, rw/rw, Domain 0
...
0x0CC79000 0x0CCEDFFF	RAM, rw/rw, Domain 0
...
0x0CD58000 0x0CDFEFFF	RAM, rw/rw, Domain 0
...
0x0CE17000 0x0CE17FFF	RAM, rw/rw, Domain 0, 1k
...
0x0CE30000 0x0CE30FFF	RAM, rw/rw, Domain 0, 1k
...
0x0F000000 0x0FFFFFFF	hardware registers, maps to self, rw/rw, Domain 0 (see also: Mem MapIO
...
0x10000000 0x1FFFFFFF	16MB ROM/Flash marked I/O on the ROM board, can hold ROM extensions in ROM or supports NAND Flash
...
0x30000000	Flash Memory Bank 1 at 0x02000000, rw/ro, Domain 0
0x30400000 0x30700000	Flash Memory Bank 2 at 0x10000000, rw/ro, Domain 0
...
0x34000000	Flash Memory Bank 1 at 0x02000000, rw/rw, Domain 0
0x34400000 0x34700000	Flash Memory Bank 2 at 0x10000000, rw/rw, Domain 0
...
0x60000000	This area seems to be mapping Flash content into RAM (packages, large binaries, etc.)
...
0x9C000000 0x9FFFFFFF	maps to PCMCIA Control 0 at 0x3C000000, rw/rw, Domain 1
...
0xAC000000 0xAFFFFFFF	maps to PCMCIA Control 1 at 0x4C000000, rw/rw, Domain 1

End of MMU table. A physical device would have additional mappings for the virtual Screen Memory at 0xE0000000 and maybe others. If a ROM patch was applied, many entries in this table would be quite different.