From bb922a675ebb8660e59db08da74cc39f881e28cd Mon Sep 17 00:00:00 2001 From: penglezos Date: Thu, 1 Oct 2020 21:03:42 +0300 Subject: [PATCH] Revert "disp: msm: dsi: update dsi pclk in panel mode settings" This reverts commit 738b8add680d9fe421d287ae08f8237a71491a45. --- drivers/gpu/drm/msm/dsi-staging/dsi_panel.c | 28 +++++++++++++-------- 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c index 1b641870b475..6890b7bcdf3b 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c @@ -2787,6 +2787,9 @@ static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode, u32 len, i; int rc = 0; struct dsi_display_mode_priv_info *priv_info; + u64 h_period, v_period; + u64 refresh_rate = TICKS_IN_MICRO_SECOND; + struct dsi_mode_info *timing = NULL; u64 pixel_clk_khz; if (!mode || !mode->priv_info) @@ -2810,19 +2813,22 @@ static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode, priv_info->phy_timing_len = len; }; - if (panel_mode == DSI_OP_VIDEO_MODE) { - /* - * For command mode we update the pclk as part of - * function dsi_panel_calc_dsi_transfer_time( ) - * as we set it based on dsi clock or mdp transfer time. - */ - pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) * - DSI_V_TOTAL(&mode->timing) * - mode->timing.refresh_rate); - do_div(pixel_clk_khz, 1000); - mode->pixel_clk_khz = pixel_clk_khz; + timing = &mode->timing; + + if (panel_mode == DSI_OP_CMD_MODE) { + h_period = DSI_H_ACTIVE_DSC(timing); + v_period = timing->v_active; + do_div(refresh_rate, priv_info->mdp_transfer_time_us); + } else { + h_period = DSI_H_TOTAL_DSC(timing); + v_period = DSI_V_TOTAL(timing); + refresh_rate = timing->refresh_rate; } + pixel_clk_khz = h_period * v_period * refresh_rate; + do_div(pixel_clk_khz, 1000); + mode->pixel_clk_khz = pixel_clk_khz; + return rc; }