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fpga-memory.sch
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EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 6 8
Title "Logicbone ECP5"
Date "2020-06-27"
Rev "rev0"
Comp "https://github.com/oskirby/logicbone"
Comment1 ""
Comment2 ""
Comment3 "Licensed under CERN OHL v1.2"
Comment4 "Designed By: Owen Kirby"
$EndDescr
Entry Wire Line
4050 3050 3950 3150
Entry Wire Line
4050 3150 3950 3250
Entry Wire Line
4050 3250 3950 3350
Entry Wire Line
4050 3350 3950 3450
Entry Wire Line
4050 3450 3950 3550
Entry Wire Line
4050 3550 3950 3650
Entry Wire Line
4050 3650 3950 3750
Text Label 4050 3050 0 50 ~ 0
DDR3_DQ15
Text Label 4050 3150 0 50 ~ 0
DDR3_DQ14
Text Label 4050 3250 0 50 ~ 0
DDR3_DQ13
Text Label 4050 3350 0 50 ~ 0
DDR3_DQ12
Text Label 4050 3450 0 50 ~ 0
DDR3_DQ11
Text Label 4050 3550 0 50 ~ 0
DDR3_DQ10
Text Label 4050 3650 0 50 ~ 0
DDR3_DQ9
Text Label 4050 3750 0 50 ~ 0
DDR3_DQ8
Entry Wire Line
850 3050 750 3150
Entry Wire Line
850 3150 750 3250
Entry Wire Line
850 3250 750 3350
Entry Wire Line
850 3350 750 3450
Entry Wire Line
850 3450 750 3550
Entry Wire Line
850 3550 750 3650
Entry Wire Line
850 3650 750 3750
Text Label 850 3050 0 50 ~ 0
DDR3_DQ7
Text Label 850 3150 0 50 ~ 0
DDR3_DQ6
Text Label 850 3250 0 50 ~ 0
DDR3_DQ5
Text Label 850 3350 0 50 ~ 0
DDR3_DQ4
Text Label 850 3450 0 50 ~ 0
DDR3_DQ3
Text Label 850 3550 0 50 ~ 0
DDR3_DQ2
Text Label 850 3650 0 50 ~ 0
DDR3_DQ1
Text Label 850 3750 0 50 ~ 0
DDR3_DQ0
Wire Wire Line
1550 1150 1000 1150
Text Label 1000 1150 0 50 ~ 0
DDR3_A15
Entry Wire Line
1000 2650 900 2550
Wire Wire Line
1550 1250 1000 1250
Text Label 1000 1250 0 50 ~ 0
DDR3_A14
Entry Wire Line
1000 2550 900 2450
Wire Wire Line
1550 1350 1000 1350
Text Label 1000 1350 0 50 ~ 0
DDR3_A13
Entry Wire Line
1000 2450 900 2350
Wire Wire Line
1550 1450 1000 1450
Text Label 1000 1450 0 50 ~ 0
DDR3_A12
Entry Wire Line
1000 2350 900 2250
Wire Wire Line
1550 1550 1000 1550
Text Label 1000 1550 0 50 ~ 0
DDR3_A11
Entry Wire Line
1000 2250 900 2150
Wire Wire Line
1550 1650 1000 1650
Text Label 1000 1650 0 50 ~ 0
DDR3_A10
Entry Wire Line
1000 2150 900 2050
Wire Wire Line
1550 1750 1000 1750
Text Label 1000 1750 0 50 ~ 0
DDR3_A9
Entry Wire Line
1000 2050 900 1950
Wire Wire Line
1550 1850 1000 1850
Text Label 1000 1850 0 50 ~ 0
DDR3_A8
Entry Wire Line
1000 1950 900 1850
Wire Wire Line
1550 1950 1000 1950
Text Label 1000 1950 0 50 ~ 0
DDR3_A7
Entry Wire Line
1000 1850 900 1750
Wire Wire Line
1550 2050 1000 2050
Text Label 1000 2050 0 50 ~ 0
DDR3_A6
Entry Wire Line
1000 1750 900 1650
Wire Wire Line
1550 2150 1000 2150
Text Label 1000 2150 0 50 ~ 0
DDR3_A5
Entry Wire Line
1000 1650 900 1550
Wire Wire Line
1550 2250 1000 2250
Text Label 1000 2250 0 50 ~ 0
DDR3_A4
Entry Wire Line
1000 1550 900 1450
Wire Wire Line
1550 2350 1000 2350
Text Label 1000 2350 0 50 ~ 0
DDR3_A3
Entry Wire Line
1000 1450 900 1350
Wire Wire Line
1550 2450 1000 2450
Text Label 1000 2450 0 50 ~ 0
DDR3_A2
Entry Wire Line
1000 1350 900 1250
Wire Wire Line
1550 2550 1000 2550
Text Label 1000 2550 0 50 ~ 0
DDR3_A1
Entry Wire Line
1000 1250 900 1150
Wire Wire Line
1550 2650 1000 2650
Text Label 1000 2650 0 50 ~ 0
DDR3_A0
Entry Wire Line
1000 1150 900 1050
Wire Wire Line
4750 1150 4200 1150
Text Label 4200 1150 0 50 ~ 0
DDR3_A15
Entry Wire Line
4200 2650 4100 2550
Wire Wire Line
4750 1250 4200 1250
Text Label 4200 1250 0 50 ~ 0
DDR3_A14
Entry Wire Line
4200 2550 4100 2450
Wire Wire Line
4750 1350 4200 1350
Text Label 4200 1350 0 50 ~ 0
DDR3_A13
Entry Wire Line
4200 2450 4100 2350
Wire Wire Line
4750 1450 4200 1450
Text Label 4200 1450 0 50 ~ 0
DDR3_A12
Entry Wire Line
4200 2350 4100 2250
Wire Wire Line
4750 1550 4200 1550
Text Label 4200 1550 0 50 ~ 0
DDR3_A11
Entry Wire Line
4200 2250 4100 2150
Wire Wire Line
4750 1650 4200 1650
Text Label 4200 1650 0 50 ~ 0
DDR3_A10
Entry Wire Line
4200 2150 4100 2050
Wire Wire Line
4750 1750 4200 1750
Text Label 4200 1750 0 50 ~ 0
DDR3_A9
Entry Wire Line
4200 2050 4100 1950
Wire Wire Line
4750 1850 4200 1850
Text Label 4200 1850 0 50 ~ 0
DDR3_A8
Entry Wire Line
4200 1950 4100 1850
Wire Wire Line
4750 1950 4200 1950
Text Label 4200 1950 0 50 ~ 0
DDR3_A7
Entry Wire Line
4200 1850 4100 1750
Wire Wire Line
4750 2050 4200 2050
Text Label 4200 2050 0 50 ~ 0
DDR3_A6
Entry Wire Line
4200 1750 4100 1650
Wire Wire Line
4750 2150 4200 2150
Text Label 4200 2150 0 50 ~ 0
DDR3_A5
Entry Wire Line
4200 1650 4100 1550
Wire Wire Line
4750 2250 4200 2250
Text Label 4200 2250 0 50 ~ 0
DDR3_A4
Entry Wire Line
4200 1550 4100 1450
Wire Wire Line
4750 2350 4200 2350
Text Label 4200 2350 0 50 ~ 0
DDR3_A3
Entry Wire Line
4200 1450 4100 1350
Wire Wire Line
4750 2450 4200 2450
Text Label 4200 2450 0 50 ~ 0
DDR3_A2
Entry Wire Line
4200 1350 4100 1250
Wire Wire Line
4750 2550 4200 2550
Text Label 4200 2550 0 50 ~ 0
DDR3_A1
Entry Wire Line
4200 1250 4100 1150
Wire Wire Line
4750 2650 4200 2650
Text Label 4200 2650 0 50 ~ 0
DDR3_A0
Entry Wire Line
4200 1150 4100 1050
Wire Wire Line
2850 1150 3400 1150
Text Label 3400 1150 2 50 ~ 0
DDR3_BA2
Wire Wire Line
2850 1250 3400 1250
Text Label 3400 1250 2 50 ~ 0
DDR3_BA1
Wire Wire Line
2850 1350 3400 1350
Text Label 3400 1350 2 50 ~ 0
DDR3_BA0
Wire Wire Line
6050 1150 6600 1150
Text Label 6600 1150 2 50 ~ 0
DDR3_BA2
Wire Wire Line
6050 1250 6600 1250
Text Label 6600 1250 2 50 ~ 0
DDR3_BA1
Wire Wire Line
6050 1350 6600 1350
Text Label 6600 1350 2 50 ~ 0
DDR3_BA0
Wire Wire Line
2850 1500 3400 1500
Text Label 3400 1500 2 50 ~ 0
~DDR3_RAS
Wire Wire Line
2850 1600 3400 1600
Text Label 3400 1600 2 50 ~ 0
~DDR3_CAS
Wire Wire Line
2850 1700 3400 1700
Text Label 3400 1700 2 50 ~ 0
~DDR3_CS
Wire Wire Line
2850 1800 3400 1800
Text Label 3400 1800 2 50 ~ 0
~DDR3_WE
Wire Wire Line
2850 1900 3400 1900
Text Label 3400 1900 2 50 ~ 0
DDR3_CK+
Wire Wire Line
2850 2000 3400 2000
Text Label 3400 2000 2 50 ~ 0
DDR3_CK-
Wire Wire Line
2850 2100 3400 2100
Text Label 3400 2100 2 50 ~ 0
DDR3_CKE
$Comp
L Device:R R3
U 1 1 5E2DB9C3
P 3100 3250
F 0 "R3" V 3000 3250 50 0000 C CNN
F 1 "240" V 3100 3250 50 0000 C CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 3030 3250 50 0001 C CNN
F 3 "~" H 3100 3250 50 0001 C CNN
1 3100 3250
0 -1 1 0
$EndComp
Wire Wire Line
2950 3250 2850 3250
$Comp
L power:GND #PWR0125
U 1 1 5E2E5067
P 3300 3300
F 0 "#PWR0125" H 3300 3050 50 0001 C CNN
F 1 "GND" H 3305 3127 50 0000 C CNN
F 2 "" H 3300 3300 50 0001 C CNN
F 3 "" H 3300 3300 50 0001 C CNN
1 3300 3300
-1 0 0 -1
$EndComp
Wire Wire Line
3300 3300 3300 3250
Wire Wire Line
3300 3250 3250 3250
Wire Wire Line
6050 1500 6600 1500
Text Label 6600 1500 2 50 ~ 0
~DDR3_RAS
Wire Wire Line
6050 1600 6600 1600
Text Label 6600 1600 2 50 ~ 0
~DDR3_CAS
Wire Wire Line
6050 1700 6600 1700
Text Label 6600 1700 2 50 ~ 0
~DDR3_CS
Wire Wire Line
6050 1800 6600 1800
Text Label 6600 1800 2 50 ~ 0
~DDR3_WE
Wire Wire Line
6050 1900 6600 1900
Text Label 6600 1900 2 50 ~ 0
DDR3_CK+
Wire Wire Line
6050 2000 6600 2000
Text Label 6600 2000 2 50 ~ 0
DDR3_CK-
Wire Wire Line
6050 2100 6600 2100
Text Label 6600 2100 2 50 ~ 0
DDR3_CKE
Wire Wire Line
6050 2300 6600 2300
Wire Wire Line
6050 2400 6600 2400
Wire Wire Line
2850 2300 3400 2300
Wire Wire Line
2850 2400 3400 2400
Text Label 3400 2300 2 50 ~ 0
DDR3_DQS0+
Text Label 3400 2400 2 50 ~ 0
DDR3_DQS0-
Text Label 6600 2300 2 50 ~ 0
DDR3_DQS1+
Text Label 6600 2400 2 50 ~ 0
DDR3_DQS1-
Wire Wire Line
2850 2650 3400 2650
Text Label 3400 2650 2 50 ~ 0
DDR3_DM0
Wire Wire Line
6050 2650 6600 2650
Text Label 6600 2650 2 50 ~ 0
DDR3_DM1
$Comp
L Device:R R4
U 1 1 5E3A0A43
P 6300 3250
F 0 "R4" V 6200 3250 50 0000 C CNN
F 1 "240" V 6300 3250 50 0000 C CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 6230 3250 50 0001 C CNN
F 3 "~" H 6300 3250 50 0001 C CNN
1 6300 3250
0 -1 1 0
$EndComp
Wire Wire Line
6150 3250 6050 3250
$Comp
L power:GND #PWR0126
U 1 1 5E3A0A4A
P 6500 3300
F 0 "#PWR0126" H 6500 3050 50 0001 C CNN
F 1 "GND" H 6505 3127 50 0000 C CNN
F 2 "" H 6500 3300 50 0001 C CNN
F 3 "" H 6500 3300 50 0001 C CNN
1 6500 3300
-1 0 0 -1
$EndComp
Wire Wire Line
6500 3300 6500 3250
Wire Wire Line
6500 3250 6450 3250
Wire Wire Line
2850 2850 3400 2850
Text Label 3400 2850 2 50 ~ 0
DDR3_ODT
Wire Wire Line
6050 2850 6600 2850
Text Label 6600 2850 2 50 ~ 0
DDR3_ODT
Wire Wire Line
2850 3050 3400 3050
Text Label 3400 3050 2 50 ~ 0
~DDR3_RST
Entry Bus Bus
4200 700 4100 800
Entry Bus Bus
1000 700 900 800
Text Label 5650 700 2 50 ~ 0
DDR3_A[0..15]
Wire Wire Line
6050 3050 6600 3050
Text Label 6600 3050 2 50 ~ 0
~DDR3_RST
Text Label 4200 5400 0 50 ~ 0
DDR3_DQ15
Text Label 4200 5150 0 50 ~ 0
DDR3_DQ14
Text Label 4200 6500 0 50 ~ 0
DDR3_DQ13
Text Label 4200 5300 0 50 ~ 0
DDR3_DQ12
Text Label 4200 6400 0 50 ~ 0
DDR3_DQ11
Text Label 4200 4850 0 50 ~ 0
DDR3_DQ10
Text Label 4200 5600 0 50 ~ 0
DDR3_DQ9
Text Label 4200 4950 0 50 ~ 0
DDR3_DQ8
Text Label 1000 5950 0 50 ~ 0
DDR3_DQ7
Text Label 1000 5150 0 50 ~ 0
DDR3_DQ6
Text Label 1000 5500 0 50 ~ 0
DDR3_DQ5
Text Label 1000 5050 0 50 ~ 0
DDR3_DQ4
Text Label 1000 5600 0 50 ~ 0
DDR3_DQ3
Text Label 1000 4950 0 50 ~ 0
DDR3_DQ2
Text Label 1000 6050 0 50 ~ 0
DDR3_DQ1
Text Label 1000 4850 0 50 ~ 0
DDR3_DQ0
Text Label 4200 5500 0 50 ~ 0
DDR3_A12
Text Label 4200 6200 0 50 ~ 0
DDR3_A10
Text Label 6600 5050 2 50 ~ 0
DDR3_A9
Text Label 6600 4950 2 50 ~ 0
DDR3_A7
Text Label 6600 5300 2 50 ~ 0
DDR3_A6
Text Label 6600 6400 2 50 ~ 0
DDR3_A4
Text Label 4200 6300 0 50 ~ 0
DDR3_A3
Text Label 6600 5600 2 50 ~ 0
DDR3_A2
Text Label 6600 6200 2 50 ~ 0
DDR3_A1
Text Label 6600 5850 2 50 ~ 0
DDR3_A0
Text Label 3500 5750 2 50 ~ 0
DDR3_BA2
Text Label 4200 5950 0 50 ~ 0
DDR3_BA1
Text Label 6600 5400 2 50 ~ 0
DDR3_BA0
Text Label 3500 5950 2 50 ~ 0
~DDR3_RAS
Text Label 3500 5850 2 50 ~ 0
~DDR3_CAS
Wire Wire Line
4750 6300 4200 6300
Text Label 3500 5400 2 50 ~ 0
~DDR3_CS
Text Label 6600 5750 2 50 ~ 0
~DDR3_WE
Text Label 3500 4850 2 50 ~ 0
DDR3_CK+
Text Label 3500 4950 2 50 ~ 0
DDR3_CK-
Text Label 1000 6200 0 50 ~ 0
DDR3_CKE
Text Label 3500 6200 2 50 ~ 0
~DDR3_RST
Wire Wire Line
4750 5750 4200 5750
Wire Wire Line
4750 5850 4200 5850
Wire Wire Line
1550 5750 1000 5750
Wire Wire Line
1550 5850 1000 5850
Text Label 1000 5750 0 50 ~ 0
DDR3_DQS0+
Text Label 1000 5850 0 50 ~ 0
DDR3_DQS0-
Text Label 4200 5750 0 50 ~ 0
DDR3_DQS1+
Text Label 4200 5850 0 50 ~ 0
DDR3_DQS1-
Wire Wire Line
4750 5950 4200 5950
Wire Wire Line
1550 6400 1000 6400
Text Label 1000 6400 0 50 ~ 0
DDR3_DM0
Text Label 1000 5400 0 50 ~ 0
DDR3_DM1
Wire Wire Line
6150 4350 6150 4450
Wire Wire Line
6150 4350 6050 4350
Wire Wire Line
6150 4450 6050 4450
Wire Wire Line
1450 4300 1450 4350
Connection ~ 1450 4350
Wire Wire Line
1450 4350 1450 4450
Wire Wire Line
1450 4350 1550 4350
Wire Wire Line
1450 4450 1550 4450
Wire Wire Line
1550 6300 1000 6300
Text Label 1000 6300 0 50 ~ 0
DDR3_VREF
Wire Wire Line
4750 5050 4200 5050
Text Label 4200 5050 0 50 ~ 0
DDR3_VREF
Entry Wire Line
6900 6200 7000 6100
Entry Wire Line
6900 4850 7000 4750
Entry Wire Line
7000 4950 6900 5050
Entry Wire Line
7000 5200 6900 5300
Entry Wire Line
7000 5300 6900 5400
Entry Wire Line
7000 6200 6900 6300
Entry Wire Line
7000 5400 6900 5500
Entry Bus Bus
10650 700 10750 800
$Comp
L Device:R_Network08 RN2
U 1 1 60CC434B
P 9650 1650
F 0 "RN2" V 9033 1650 50 0000 C CNN
F 1 "47" V 9124 1650 50 0000 C CNN
F 2 "KiCAD_Magic:EXBD-1206" V 10125 1650 50 0001 C CNN
F 3 "http://www.vishay.com/docs/31509/csc.pdf" H 9650 1650 50 0001 C CNN
F 4 "Panasonic" V 9650 1650 50 0001 C CNN "Manufacturer"
F 5 "EXB-D10C470J" V 9650 1650 50 0001 C CNN "MPN"
1 9650 1650
0 -1 1 0
$EndComp
Text Label 10400 3750 2 50 ~ 0
DDR3_A15
Text Label 10400 1750 2 50 ~ 0
DDR3_A14
Text Label 10400 1550 2 50 ~ 0
DDR3_A13
Text Label 10400 3250 2 50 ~ 0
DDR3_A12
Text Label 10400 1350 2 50 ~ 0
DDR3_A11
Text Label 10400 3350 2 50 ~ 0
DDR3_A10
Text Label 10400 1450 2 50 ~ 0
DDR3_A9
Text Label 10400 1650 2 50 ~ 0
DDR3_A8
Text Label 8350 1250 0 50 ~ 0
DDR3_A7
Text Label 10400 1950 2 50 ~ 0
DDR3_A6
Text Label 10400 2100 2 50 ~ 0
DDR3_A5
Text Label 10400 1850 2 50 ~ 0
DDR3_A4
Text Label 10400 2800 2 50 ~ 0
DDR3_A3
Text Label 10400 3850 2 50 ~ 0
DDR3_A2
Text Label 10400 1250 2 50 ~ 0
DDR3_A1
Text Label 10400 2200 2 50 ~ 0
DDR3_A0
Wire Wire Line
9850 1250 10650 1250
Wire Wire Line
9850 1450 10650 1450
Wire Wire Line
9850 1550 10650 1550
Wire Wire Line
9850 1650 10650 1650
Wire Wire Line
9850 1750 10650 1750
Wire Wire Line
9850 1850 10650 1850
Wire Wire Line
9850 2100 10650 2100
Wire Wire Line
9850 2200 10650 2200
Wire Wire Line
9850 2700 10650 2700
Entry Wire Line
10750 2050 10650 1950
Entry Wire Line
10750 1950 10650 1850
Entry Wire Line
10750 1850 10650 1750
Entry Wire Line
10750 1750 10650 1650
Entry Wire Line
10750 1650 10650 1550
Entry Wire Line
10750 1550 10650 1450
Entry Wire Line
10750 1350 10650 1250
Entry Wire Line
10650 3850 10750 3750
Entry Wire Line
10750 2800 10650 2700
Entry Wire Line
10750 2900 10650 2800
Entry Wire Line
10650 3750 10750 3650
Entry Wire Line
10750 1450 10650 1350
Entry Wire Line
10650 3350 10750 3250
Entry Wire Line
10750 2300 10650 2200
Entry Wire Line
10750 2200 10650 2100
$Comp
L Device:R_Network08 RN3
U 1 1 60E99F8B
P 9650 2500
F 0 "RN3" V 10150 2500 50 0000 C CNN
F 1 "47" V 10050 2500 50 0000 C CNN
F 2 "KiCAD_Magic:EXBD-1206" V 10125 2500 50 0001 C CNN
F 3 "http://www.vishay.com/docs/31509/csc.pdf" H 9650 2500 50 0001 C CNN
F 4 "Panasonic" V 9650 2500 50 0001 C CNN "Manufacturer"
F 5 "EXB-D10C470J" V 9650 2500 50 0001 C CNN "MPN"
1 9650 2500
0 -1 1 0
$EndComp
Wire Wire Line
9450 2100 9350 2100
$Comp
L Device:R_Network08 RN1
U 1 1 60F89113
P 9650 3550
F 0 "RN1" V 10150 3550 50 0000 C CNN
F 1 "47" V 10050 3550 50 0000 C CNN
F 2 "KiCAD_Magic:EXBD-1206" V 10125 3550 50 0001 C CNN
F 3 "http://www.vishay.com/docs/31509/csc.pdf" H 9650 3550 50 0001 C CNN
F 4 "Panasonic" V 9650 3550 50 0001 C CNN "Manufacturer"
F 5 "EXB-D10C470J" V 9650 3550 50 0001 C CNN "MPN"
1 9650 3550
0 -1 1 0
$EndComp
Wire Wire Line
9450 3150 9350 3150
Text Label 10400 2400 2 50 ~ 0
DDR3_BA2
Text Label 10400 3150 2 50 ~ 0
DDR3_BA1
Text Label 10400 2700 2 50 ~ 0
DDR3_BA0
Wire Wire Line
9850 3450 10400 3450
Text Label 10400 3550 2 50 ~ 0
~DDR3_RAS
Wire Wire Line
9850 3550 10400 3550
Text Label 10400 2300 2 50 ~ 0
~DDR3_CAS
Text Label 10400 2600 2 50 ~ 0
~DDR3_CS
Text Label 10400 3650 2 50 ~ 0
~DDR3_WE
Text Label 10400 3450 2 50 ~ 0
DDR3_CKE
Wire Wire Line
2850 6200 3500 6200
$Comp
L Device:C_Small C469
U 1 1 614F1D15
P 9350 3650
F 0 "C469" H 9442 3696 50 0000 L CNN
F 1 "100nF" H 9442 3605 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 9350 3650 50 0001 C CNN
F 3 "~" H 9350 3650 50 0001 C CNN
1 9350 3650
-1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0148
U 1 1 61571B7E
P 9350 3800
F 0 "#PWR0148" H 9350 3550 50 0001 C CNN
F 1 "GND" H 9355 3627 50 0000 C CNN
F 2 "" H 9350 3800 50 0001 C CNN
F 3 "" H 9350 3800 50 0001 C CNN
1 9350 3800
1 0 0 -1
$EndComp
$Comp
L Device:C_Small C465
U 1 1 6193F864
P 9200 5750
F 0 "C465" H 9292 5796 50 0000 L CNN
F 1 "100nF" H 9292 5705 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 9200 5750 50 0001 C CNN
F 3 "~" H 9200 5750 50 0001 C CNN
1 9200 5750
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0149
U 1 1 619802F6
P 9200 5900
F 0 "#PWR0149" H 9200 5650 50 0001 C CNN
F 1 "GND" H 9205 5727 50 0000 C CNN
F 2 "" H 9200 5900 50 0001 C CNN
F 3 "" H 9200 5900 50 0001 C CNN
1 9200 5900
1 0 0 -1
$EndComp
Wire Wire Line
9200 5900 9200 5850
$Comp
L Device:C_Small C467
U 1 1 61C14D48
P 9650 5750
F 0 "C467" H 9742 5796 50 0000 L CNN
F 1 "100nF" H 9742 5705 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 9650 5750 50 0001 C CNN
F 3 "~" H 9650 5750 50 0001 C CNN
1 9650 5750
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0150
U 1 1 61C14D4E
P 9650 5900
F 0 "#PWR0150" H 9650 5650 50 0001 C CNN
F 1 "GND" H 9655 5727 50 0000 C CNN
F 2 "" H 9650 5900 50 0001 C CNN
F 3 "" H 9650 5900 50 0001 C CNN
1 9650 5900
1 0 0 -1
$EndComp
Wire Wire Line
9650 5900 9650 5850
Wire Wire Line
9650 5650 9650 5600
Connection ~ 9650 5600
Text Label 10400 2500 2 50 ~ 0
DDR3_ODT
Wire Wire Line
9450 1250 9350 1250
$Comp
L Logicbone:VTT #PWR0261
U 1 1 606963FA
P 9350 1200
F 0 "#PWR0261" H 9350 1050 50 0001 C CNN
F 1 "VTT" H 9367 1373 50 0000 C CNN
F 2 "" H 9350 1200 50 0001 C CNN
F 3 "" H 9350 1200 50 0001 C CNN
1 9350 1200
1 0 0 -1
$EndComp
Wire Wire Line
9350 1200 9350 1250
Connection ~ 9350 1250
$Comp
L Logicbone:VDDR #PWR0262
U 1 1 6089AAC3
P 6150 4300
F 0 "#PWR0262" H 6150 4150 50 0001 C CNN
F 1 "VDDR" H 6167 4473 50 0000 C CNN
F 2 "" H 6150 4300 50 0001 C CNN
F 3 "" H 6150 4300 50 0001 C CNN
1 6150 4300
-1 0 0 -1
$EndComp
$Comp
L Logicbone:VDDR #PWR0263
U 1 1 6089AB96
P 1450 4300
F 0 "#PWR0263" H 1450 4150 50 0001 C CNN
F 1 "VDDR" H 1467 4473 50 0000 C CNN
F 2 "" H 1450 4300 50 0001 C CNN
F 3 "" H 1450 4300 50 0001 C CNN
1 1450 4300
1 0 0 -1
$EndComp
Text Label 10350 5600 2 50 ~ 0
DDR3_VREF
Text HLabel 8950 5600 0 50 Input ~ 0
DDR3_VREF
$Comp
L Device:C_Small C260
U 1 1 5E9A9E47
P 8600 4950
F 0 "C260" H 8692 4996 50 0000 L CNN
F 1 "100nF" H 8692 4905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 8600 4950 50 0001 C CNN
F 3 "~" H 8600 4950 50 0001 C CNN
1 8600 4950
1 0 0 -1
$EndComp
Wire Wire Line
8600 4850 8600 4800
Wire Wire Line
8600 5050 8600 5100
$Comp
L Device:C_Small C261
U 1 1 5E9A9E50
P 9000 4950
F 0 "C261" H 9092 4996 50 0000 L CNN
F 1 "100nF" H 9092 4905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 9000 4950 50 0001 C CNN
F 3 "~" H 9000 4950 50 0001 C CNN
1 9000 4950
1 0 0 -1
$EndComp
Wire Wire Line
9000 4850 9000 4800
Wire Wire Line
9000 5100 9000 5050
Connection ~ 9000 5100
Wire Wire Line
8600 5100 9000 5100
$Comp
L Device:C_Small C264
U 1 1 5E9A9E65
P 9400 4950
F 0 "C264" H 9492 4996 50 0000 L CNN
F 1 "100nF" H 9492 4905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 9400 4950 50 0001 C CNN
F 3 "~" H 9400 4950 50 0001 C CNN
1 9400 4950
1 0 0 -1
$EndComp
Wire Wire Line
9400 4850 9400 4800
Wire Wire Line
9400 5100 9400 5050
$Comp
L Device:C_Small C265
U 1 1 5E9A9E6E
P 9800 4950
F 0 "C265" H 9892 4996 50 0000 L CNN
F 1 "100nF" H 9892 4905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 9800 4950 50 0001 C CNN
F 3 "~" H 9800 4950 50 0001 C CNN
1 9800 4950
1 0 0 -1
$EndComp
Wire Wire Line
9800 4850 9800 4800
Wire Wire Line
9800 5050 9800 5100
$Comp
L power:GND #PWR0266
U 1 1 5E9A9E89
P 10200 5150
F 0 "#PWR0266" H 10200 4900 50 0001 C CNN
F 1 "GND" H 10205 4977 50 0000 C CNN
F 2 "" H 10200 5150 50 0001 C CNN
F 3 "" H 10200 5150 50 0001 C CNN
1 10200 5150
-1 0 0 -1
$EndComp
$Comp
L Logicbone:VDDR #PWR0268
U 1 1 5E9CE93B
P 8600 4700
F 0 "#PWR0268" H 8600 4550 50 0001 C CNN
F 1 "VDDR" H 8617 4873 50 0000 C CNN
F 2 "" H 8600 4700 50 0001 C CNN
F 3 "" H 8600 4700 50 0001 C CNN
1 8600 4700
-1 0 0 -1
$EndComp
$Comp
L Device:C_Small C266
U 1 1 5EA3D077
P 10200 4950
F 0 "C266" H 10292 4996 50 0000 L CNN
F 1 "100nF" H 10292 4905 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 10200 4950 50 0001 C CNN
F 3 "~" H 10200 4950 50 0001 C CNN
1 10200 4950
1 0 0 -1
$EndComp
Text Notes 8850 4700 0 50 ~ 0
Place Near FPGA Banks 6 and 7
$Comp
L KiCAD-Magic:DDR3-TFBGA78 IC2
U 1 1 5E20FB7A
P 2200 2200
F 0 "IC2" H 2200 3515 50 0000 C CNN
F 1 "DDR3-TFBGA78" H 2200 3424 50 0000 C CNN
F 2 "Package_BGA:FBGA-78_7.5x11mm_Layout2x3x13_P0.8mm" H 2250 3400 50 0001 C CNN
F 3 "" H 2250 3400 50 0001 C CNN
F 4 "MT41K512M8DA-107:P" H 2200 2200 50 0001 C CNN "MPN"
F 5 "Micron" H 2200 2200 50 0001 C CNN "Manufacturer"
1 2200 2200
-1 0 0 -1
$EndComp
$Comp
L KiCAD-Magic:DDR3-TFBGA78 IC3
U 1 1 5E20FE30
P 5400 2200
F 0 "IC3" H 5400 3515 50 0000 C CNN
F 1 "DDR3-TFBGA78" H 5400 3424 50 0000 C CNN
F 2 "Package_BGA:FBGA-78_7.5x11mm_Layout2x3x13_P0.8mm" H 5450 3400 50 0001 C CNN
F 3 "" H 5450 3400 50 0001 C CNN
F 4 "MT41K512M8DA-107:P" H 5400 2200 50 0001 C CNN "MPN"
F 5 "Micron" H 5400 2200 50 0001 C CNN "Manufacturer"
1 5400 2200
-1 0 0 -1
$EndComp
Entry Wire Line
4050 3750 3950 3850
Wire Wire Line
2850 4850 3500 4850
Wire Wire Line
2850 4950 3500 4950
Wire Wire Line
2850 5850 3500 5850
Wire Wire Line
2850 5750 3500 5750
Wire Wire Line
2850 5950 3500 5950
Wire Wire Line
6900 5050 6050 5050
Wire Wire Line
6900 5300 6050 5300
Wire Wire Line
6900 5750 6050 5750
Wire Wire Line
6900 6050 6050 6050
Wire Wire Line
6900 5850 6050 5850
Wire Wire Line
6900 6200 6050 6200
Wire Wire Line
6900 6300 6050 6300