vec_slqi() operation incorrectly nests defined (_ARCH_PWR10) code before if (__builtin_constant_p (shb) && ((shb % 8) == 0))

[munroesj52]

The vec_slqi(0 operation is not generating vsldoi when (__builtin_constant_p (shb) && ((shb % 8) == 0)).
For the case: vec_slqi (vec, 64) and -mcpu-power10, PVECLIB will generate vslq but requires vector load of constant (__int128) 0.
This is more code and cycles then the simpler xxspltib/vsldoi sequence.

The correction moves the defined (_ARCH_PWR10) conditional code sequence to the if (__builtin_constant_p (shb) && ((shb % 8) == 0)) else block.

[munroesj52]

This also impacts vec_srqi(), vec_sraqi(0, and vec_rlqi().