diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml
new file mode 100644
index 0000000..af3957c
--- /dev/null
+++ b/.github/workflows/main.yml
@@ -0,0 +1,33 @@
+# This is a basic workflow to help you get started with Actions
+
+name: CI
+
+# Controls when the action will run. Triggers the workflow on push or pull request
+# events but only for the master branch
+on:
+  push:
+    branches: [ master ]
+
+# A workflow run is made up of one or more jobs that can run sequentially or in parallel
+jobs:
+  # This workflow contains a single job called "build"
+  build:
+    # The type of runner that the job will run on
+    runs-on: ubuntu-latest
+
+    # Steps represent a sequence of tasks that will be executed as part of the job
+    steps:
+
+      - name: Checkout master
+        uses: actions/checkout@v2
+          
+      - name: Update dir
+        run: ./update.py
+      
+      - name: Deploy docs
+        uses: mhausenblas/mkdocs-deploy-gh-pages@master
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+          CONFIG_FILE: mkdocs.yml
+          EXTRA_PACKAGES: build-base
+          
\ No newline at end of file
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..1320f90
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1 @@
+site
diff --git a/README.md b/README.md
new file mode 100644
index 0000000..3c6f86b
--- /dev/null
+++ b/README.md
@@ -0,0 +1,22 @@
+# 欢迎来到MicroZero的主页
+
+本项目主页: [Github](https://github.com/micro-zero/) [Gitlab](https://gitlab.com/micro-zero) 
+
+**NOTE：** 这是一个在Github上的开放网页，暂不公开有效信息。开发人员请移步至Gitlab（需要权限）：
+
+- 主网页&教师网页：[https://micro-zero.gitlab.io/](https://micro-zero.gitlab.io/)
+
+- 学生网页：[https://micro-zero-student.gitlab.io/](https://micro-zero-student.gitlab.io/)
+
+
+## 前言
+
+这是一个从零开始的微处理器设计项目，我们来自北京大学计算机学院系统结构研究所，我们的目标是设计一个按序处理器核，并以此为基础进行各种研究。
+
+This is a micro processor design project from zero. We are from Micro Processor Research Center, School of Computer Science, Peking University. Our goal is to design an in-order processor core and do various research based on it.
+
+## 许可
+
+[CC-BY-NC-SA：署名-非商业性使用-相同方式共享](https://creativecommons.org/licenses/by-nc-sa/4.0/deed.zh)
+
+**联系方式：** 王翰墨//Wang Hanmo , Email：wanghanmo [at] stu.pku.edu.cn
\ No newline at end of file
diff --git "a/docs/\345\205\263\344\272\216\346\210\221\344\273\254/\345\260\217\347\273\204\346\210\220\345\221\230.md" "b/docs/\345\205\263\344\272\216\346\210\221\344\273\254/\345\260\217\347\273\204\346\210\220\345\221\230.md"
new file mode 100644
index 0000000..920a92d
--- /dev/null
+++ "b/docs/\345\205\263\344\272\216\346\210\221\344\273\254/\345\260\217\347\273\204\346\210\220\345\221\230.md"
@@ -0,0 +1,4 @@
+# 小组成员
+
+我们小组由5名学生和3名老师组成。
+
diff --git "a/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\344\273\243\347\240\201.md" "b/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\344\273\243\347\240\201.md"
new file mode 100644
index 0000000..0f45447
--- /dev/null
+++ "b/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\344\273\243\347\240\201.md"
@@ -0,0 +1,9 @@
+# 代码
+
+部分开源处理器设计源代码：
+
+- Ariane：[openhwgroup/cva6](https://github.com/openhwgroup/cva6)
+- BlackParrot：[black-parrot/black-parrot](https://github.com/black-parrot/black-parrot)
+- 西数：[westerndigitalcorporation/swerv_eh1](https://github.com/westerndigitalcorporation/swerv_eh1)
+- 玄铁C906：[T-head-Semi/openc906](https://github.com/T-head-Semi/openc906)
+- VexRiscv：[SpinalHDL/VexRiscv](https://github.com/SpinalHDL/VexRiscv)
\ No newline at end of file
diff --git "a/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\345\267\245\345\205\267.md" "b/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\345\267\245\345\205\267.md"
new file mode 100644
index 0000000..ea4922d
--- /dev/null
+++ "b/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\345\267\245\345\205\267.md"
@@ -0,0 +1,12 @@
+# 工具
+
+### RISCV工具链
+
+- 交叉编译工具链：[](https://github.com/riscv-collab/riscv-gnu-toolchain)
+- Spike模拟器：[](https://github.com/riscv-software-src/riscv-isa-sim)
+- pk代理内核：[](https://github.com/riscv-software-src/riscv-pk)
+
+### FPGA
+
+- Vivado安装：[](https://china.xilinx.com/support/download/index.html/content/xilinx/zh/downloadNav/vivado-design-tools.html)
+- Genesys2手册：[](https://digilent.com/reference/programmable-logic/genesys-2/reference-manual)
\ No newline at end of file
diff --git "a/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\346\226\207\346\241\243.md" "b/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\346\226\207\346\241\243.md"
new file mode 100644
index 0000000..475741e
--- /dev/null
+++ "b/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\346\226\207\346\241\243.md"
@@ -0,0 +1 @@
+# 文档
diff --git "a/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\350\256\272\346\226\207.md" "b/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\350\256\272\346\226\207.md"
new file mode 100644
index 0000000..417cd45
--- /dev/null
+++ "b/docs/\347\240\224\345\217\221\350\265\204\346\272\220/\350\256\272\346\226\207.md"
@@ -0,0 +1 @@
+# 论文
diff --git "a/docs/\350\256\276\350\256\241\346\226\207\346\241\243/\346\200\273\344\275\223\346\226\271\346\241\210.md" "b/docs/\350\256\276\350\256\241\346\226\207\346\241\243/\346\200\273\344\275\223\346\226\271\346\241\210.md"
new file mode 100644
index 0000000..6932d60
--- /dev/null
+++ "b/docs/\350\256\276\350\256\241\346\226\207\346\241\243/\346\200\273\344\275\223\346\226\271\346\241\210.md"
@@ -0,0 +1,4 @@
+# 总体方案
+
+**TODO:**
+确定总领性的设计方案和架构图
\ No newline at end of file
diff --git "a/docs/\350\277\207\347\250\213\350\256\260\345\275\225/README.md" "b/docs/\350\277\207\347\250\213\350\256\260\345\275\225/README.md"
new file mode 100644
index 0000000..e00b26a
--- /dev/null
+++ "b/docs/\350\277\207\347\250\213\350\256\260\345\275\225/README.md"
@@ -0,0 +1,4 @@
+# 每周组会
+
+我们小组每周进行一次例会，记录汇报与讨论的内容。
+
diff --git a/mkdocs.yml b/mkdocs.yml
new file mode 100644
index 0000000..ece1da1
--- /dev/null
+++ b/mkdocs.yml
@@ -0,0 +1,3 @@
+site_name: MicroZero
+site_url: https://micro-zero.github.io/
+theme: material
diff --git a/update.py b/update.py
new file mode 100644
index 0000000..c617f5e
--- /dev/null
+++ b/update.py
@@ -0,0 +1,52 @@
+#!/usr/bin/env python
+# -*- coding: utf-8 -*-
+
+import os
+from urllib.parse import quote
+
+EXCLUDE_DIRS = ['.git', 'docs', '.vscode', '.circleci', 'site']
+README_MD = ['README.md', 'readme.md', 'index.md']
+
+TXT_EXTS = ['md', 'txt']
+TXT_URL_PREFIX = 'https://github.com/micro-zero/micro-zero.github.io/blob/master/'
+BIN_URL_PREFIX = 'https://github.com/micro-zero/micro-zero.github.io/raw/master/'
+
+
+def list_files(course: str):
+    filelist_texts = '## 文件及下载列表\n\n'
+    readme_path = ''
+    for root, dirs, files in os.walk(course):
+        files.sort()
+        level = root.replace(course, '').count(os.sep)
+        indent = ' ' * 4 * level
+        filelist_texts += '{}- {}\n'.format(indent, os.path.basename(root))
+        subindent = ' ' * 4 * (level + 1)
+        for f in files:
+            if f not in README_MD:
+                if f.split('.')[-1] in TXT_EXTS:
+                    filelist_texts += '{}- [{}]({})\n'.format(subindent,
+                                                              f, TXT_URL_PREFIX + quote('{}/{}'.format(root, f)))
+                else:
+                    filelist_texts += '{}- [{}]({})\n'.format(subindent,
+                                                              f, BIN_URL_PREFIX + quote('{}/{}'.format(root, f)))
+            elif root == course and readme_path == '':
+                readme_path = '{}/{}'.format(root, f)
+    return filelist_texts, readme_path
+
+
+def generate_md(course: str, filelist_texts: str, readme_path: str):
+    final_texts = ['\n\n', filelist_texts]
+    if readme_path:
+        with open(readme_path, 'r') as file:
+            final_texts = file.readlines() + final_texts
+    with open('docs/{}.md'.format(course), 'w') as file:
+        file.writelines(final_texts)
+
+
+if __name__ == '__main__':
+    with open('README.md', 'r') as file:
+        mainreadme_lines = file.readlines()
+
+    with open('docs/index.md', 'w') as file:
+        file.writelines(mainreadme_lines)
+