From 1fe3691e52ae488ef4848b7405ce9c7801d10144 Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Tue, 24 Sep 2024 23:35:41 -0700 Subject: [PATCH 1/4] Fix build of CYTFM_064B0S2_4343W --- .../test_building_multiple_executables.yml | 2 ++ .../TARGET_CYTFM_064B0S2_4343W/CMakeLists.txt | 2 +- targets/TARGET_Cypress/scripts/PSOC6.py | 13 ++++++------- .../scripts/mbed_set_post_build_cypress.cmake | 3 +-- tools/requirements.txt | 1 + 5 files changed, 11 insertions(+), 10 deletions(-) diff --git a/.github/workflows/test_building_multiple_executables.yml b/.github/workflows/test_building_multiple_executables.yml index c61fae80188..bb112288963 100644 --- a/.github/workflows/test_building_multiple_executables.yml +++ b/.github/workflows/test_building_multiple_executables.yml @@ -11,7 +11,9 @@ jobs: uses: actions/checkout@v3 - name: Install Python packages + # Note: pip>=20.3 is needed to install dependencies of cysecuretools run: | + python3 -m pip install --upgrade pip python3 -m pip install -r tools/requirements.txt # Note: For this CI job we use MBED_CREATE_PYTHON_VENV=FALSE so that we can make sure diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/CMakeLists.txt b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/CMakeLists.txt index 04e7e1063b1..3dc1532e5e5 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/CMakeLists.txt +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/CMakeLists.txt @@ -58,6 +58,7 @@ target_link_libraries(mbed-cytfm-064b0s2-4343w mbed-cytfm-064b0s2-4343w-cm4 mbed-cytfm-064b0s2-4343w-bsp-design-modus mbed-psoc6 + mbed-psa ) target_compile_definitions(mbed-cytfm-064b0s2-4343w @@ -70,7 +71,6 @@ target_compile_definitions(mbed-cytfm-064b0s2-4343w ) mbed_post_build_psoc6_sign_image( - "tfm_s.hex" "CYTFM_064B0S2_4343W" "policy_multi_CM0_CM4_tfm.json" "multi_image" diff --git a/targets/TARGET_Cypress/scripts/PSOC6.py b/targets/TARGET_Cypress/scripts/PSOC6.py index ea0d91a43e1..34911606f9b 100644 --- a/targets/TARGET_Cypress/scripts/PSOC6.py +++ b/targets/TARGET_Cypress/scripts/PSOC6.py @@ -177,14 +177,14 @@ def sign_image(toolchain, resourses, elf, binf, m0hex): ) def sign_hex( - build_dir, m0hex_filename, target_name, policy, notification, boot_scheme, + build_dir, m0hex_signed_intermediate, target_name, policy, notification, boot_scheme, cm0_img_id, cm4_img_id, elf, m4hex, m0hex ): """ Adds signature to a binary file being built, using cysecuretools python package. :param build_dir: The build directory - :param m0hex_filename: The file name of the Cortex-M0 hex + :param m0hex_filename: Path to store intermediate signed CM0 hex file at :param target_name: The name of the Mbed target :param policy: The path to the policy file :param notification: The object to output notification with @@ -199,9 +199,8 @@ def sign_hex( # that need to be signed if m0hex != '': - m0hex_build = os.path.join(build_dir, m0hex_filename) - copy2(m0hex, m0hex_build) - m0hex = m0hex_build + copy2(m0hex, m0hex_signed_intermediate) + m0hex = m0hex_signed_intermediate # Mapping from mbed target to cysecuretools target TARGET_MAPPING = { @@ -327,7 +326,7 @@ def sign_action(args): """Entry point for the "sign" CLI command.""" sign_hex( args.build_dir, - args.m0hex_filename, + args.m0hex_signed_intermediate, args.target_name, args.policy_file_name, logging.getLogger(__name__), @@ -369,7 +368,7 @@ def parse_args(): "--build-dir", required=True, help="the build directory." ) sign_subcommand.add_argument( - "--m0hex-filename", required=True, help="the name of the HEX file." + "--m0hex-signed-intermediate", required=True, help="Path to store intermediate signed CM0 hex file at." ) sign_subcommand.add_argument( "--target-name", help="the Mbed target name." diff --git a/targets/TARGET_Cypress/scripts/mbed_set_post_build_cypress.cmake b/targets/TARGET_Cypress/scripts/mbed_set_post_build_cypress.cmake index 0a3ebe3e41c..595a398db46 100644 --- a/targets/TARGET_Cypress/scripts/mbed_set_post_build_cypress.cmake +++ b/targets/TARGET_Cypress/scripts/mbed_set_post_build_cypress.cmake @@ -54,7 +54,6 @@ endmacro() # Sign a Cortex-M4 HEX with Cortex-M0 HEX. # macro(mbed_post_build_psoc6_sign_image - m0hex_filename cypress_psoc6_target policy_file_name boot_scheme @@ -70,7 +69,7 @@ macro(mbed_post_build_psoc6_sign_image ${Python3_EXECUTABLE} ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/PSOC6.py sign --build-dir ${CMAKE_BINARY_DIR} - --m0hex-filename ${m0hex_filename} + --m0hex-signed-intermediate $/$.cm0-signed-image.hex --target-name ${cypress_psoc6_target} --policy-file-name ${policy_file_name} --boot-scheme ${boot_scheme} diff --git a/tools/requirements.txt b/tools/requirements.txt index 37ea676da57..44ea556e748 100644 --- a/tools/requirements.txt +++ b/tools/requirements.txt @@ -33,6 +33,7 @@ lxml; sys_platform == 'darwin' # needed for signing secure images cryptography cbor +cysecuretools~=6.0 # Needed for downloading CMSIS MCU descriptions cmsis-pack-manager~=0.5.0 From 4a4e22c37ebb04ebb789472773cf0b91e705f72a Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Tue, 24 Sep 2024 23:43:51 -0700 Subject: [PATCH 2/4] Fix docstring --- targets/TARGET_Cypress/scripts/PSOC6.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/targets/TARGET_Cypress/scripts/PSOC6.py b/targets/TARGET_Cypress/scripts/PSOC6.py index 34911606f9b..6da5bf12863 100644 --- a/targets/TARGET_Cypress/scripts/PSOC6.py +++ b/targets/TARGET_Cypress/scripts/PSOC6.py @@ -173,7 +173,7 @@ def sign_image(toolchain, resourses, elf, binf, m0hex): toolchain.target.cm4_img_id, elf, binf, - m0hexf + m0hex ) def sign_hex( @@ -184,7 +184,7 @@ def sign_hex( Adds signature to a binary file being built, using cysecuretools python package. :param build_dir: The build directory - :param m0hex_filename: Path to store intermediate signed CM0 hex file at + :param m0hex_signed_intermediate: Path to store intermediate signed CM0 hex file at :param target_name: The name of the Mbed target :param policy: The path to the policy file :param notification: The object to output notification with From 5003bace97dbf8b4c01c6107eea3864b565c7595 Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Sat, 21 Sep 2024 17:55:24 -0700 Subject: [PATCH 3/4] Build all target families in a CI job Try and reenable if Full send Fixing build errors and warnings: round 1 of 100000000 Fix Cypress targets to use new form factor names as the old FF was producing #defines that clashed with USB code Fix some GD32 legacy pin name issues More Cypress build errors Rename USB variables Oops typo Fix STM32F0 DMA interrupts Fix some issues with mesh network code building Add MCU description for MIMXRT1176 Fix H745ZI_Q target name Add missing cypress secure requirement Fix every Cypress target trying to write to the same hex file in post build Missing add_subdirectory Augh typo Fix incorrect path to renesas Eth driver That toshiba target doesn't have CMake build scripts O_O Add missing add_subdirectory() Remove noneexistant include Fix incorrect check for define Check for both types --- .github/workflows/greentea_cmake.yml | 143 +++++++++++++++++- .../TESTS/cordio_hci/transport/CMakeLists.txt | 2 +- .../TARGET_RZ_A1XX/CMakeLists.txt | 2 +- .../TARGET_MAX32670/CMakeLists.txt | 1 + .../PeriphDrivers/Source/SYS/sys_me15.c | 1 - .../TARGET_RZ_A1XX/TARGET_RZ_A1H/PinNames.h | 5 +- targets/TARGET_STM/stm_dma_utils.c | 9 ++ .../TARGET_EFM32GG11/device/em_device.h | 6 + 8 files changed, 155 insertions(+), 14 deletions(-) diff --git a/.github/workflows/greentea_cmake.yml b/.github/workflows/greentea_cmake.yml index 4a90a886e20..2866adeaa21 100644 --- a/.github/workflows/greentea_cmake.yml +++ b/.github/workflows/greentea_cmake.yml @@ -1,11 +1,137 @@ -name: test building greentea tests with cmake - +name: Compile Check on: [pull_request] jobs: - build-greentea-cmake: + build-greentea: runs-on: ubuntu-latest container: ghcr.io/armmbed/mbed-os-env:master-latest + + strategy: + matrix: + include: + ## For this matrix, we choose one target from each MCU target family that Mbed supports. + ## The target families can be seen here: + ## https://mbed-ce.github.io/mbed-ce-test-tools/targets/index.html + ## Generally we want to get the most feature-filled MCU of each type so that as much stuff + ## compiles as possible -- e.g. prefer a board with ethernet to one without so that we + ## can compile the netsocket tests. + + # NXP MCUs + - target: LPC1768 + profile: full + - target: LPC546XX + profile: full + - target: MIMXRT1060_EVK + profile: full + - target: MIMXRT1170_EVK + profile: full + + # Freescale MCUs + - target: K64F + profile: full + - target: KL43Z + profile: full + - target: KW41Z + profile: full + + # STM32 MCUs + - target: NUCLEO_F091RC + profile: full + - target: NUCLEO_F103RB + profile: baremetal + - target: NUCLEO_F207ZG + profile: full + - target: NUCLEO_F303RE + profile: full + - target: NUCLEO_F429ZI + profile: full + - target: NUCLEO_F767ZI + profile: full + - target: NUCLEO_G031K8 + profile: baremetal + - target: NUCLEO_G431RB + profile: full + - target: NUCLEO_H563ZI + profile: full + - target: NUCLEO_H745ZI_Q_CM7 + profile: full + - target: DISCO_L072CZ_LRWAN1 + profile: baremetal + - target: XDOT_L151CC + profile: full + - target: DISCO_L4R9I + profile: full + - target: DISCO_L562QE + profile: full + - target: B_U585I_IOT02A + profile: full + - target: NUCLEO_WB55RG + profile: full + - target: NUCLEO_WL55JC + profile: full + + # Maxim MCUs + - target: MAX32625MBED + profile: full + - target: XDOT_MAX32670 + profile: full + + # Nuvoton MCUs + - target: NUMAKER_PFM_NANO130 + profile: baremetal + - target: NUMAKER_PFM_M487 + profile: full + - target: NU_M2354 + profile: full + + # Samsung MCUs + - target: S1SBP6A + profile: full + + # nRF MCUs + - target: NRF52840_DK + profile: full + - target: ARDUINO_NICLA_SENSE_ME + profile: full + + # Toshiba MCUs + - target: TMPM4G9 + profile: full + + # Renesas MCUs + - target: GR_MANGO + profile: full + - target: RZ_A1H + profile: full + + # Ambiq MCUs + - target: SFE_ARTEMIS_DK + profile: full + + # Infineon/Cypress MCUs + - target: CY8CKIT_062S2_43012 + profile: full + - target: CYTFM_064B0S2_4343W + profile: full + + # Analog Devices MCUs + - target: EV_COG_AD4050LZ + profile: full + + # GigaDevices MCUs + - target: GD32_F307VG + profile: full + - target: GD32_F450ZI + profile: full + + # SiLabs MCUs + - target: EFM32GG11_STK3701 + profile: full + + # Raspberry Pi MCUs + - target: RASPBERRY_PI_PICO + profile: full + steps: - name: Checkout uses: actions/checkout@v3 @@ -15,14 +141,17 @@ jobs: apt-get update apt-get install -y python3-venv - - name: Build NUCLEO_G031K8 with baremetal profile + - name: Build ${{ matrix.target }} with baremetal profile + if: ${{ matrix.profile == 'baremetal' }} + # Note: We have to set a wifi network name and password so that the test will compile on devices that use wifi run: | rm -rf __build - cmake -S . -B __build -GNinja -DCMAKE_CTEST_ARGUMENTS="--output-on-failure;-V" -DMBED_BUILD_GREENTEA_TESTS=ON -DMBED_GREENTEA_TEST_BAREMETAL=ON -DMBED_GREENTEA_SERIAL_PORT=/dev/ttyDUMMY -DMBED_TARGET=NUCLEO_G031K8 -DMBED_APP_JSON_PATH=TESTS/configs/baremetal.json + cmake -S . -B __build -GNinja -DUPLOAD_METHOD=NONE -DMBED_GREENTEA_WIFI_SECURE_SSID=SomeNetwork -DMBED_GREENTEA_WIFI_SECURE_PASSWORD=SomePassword -DCMAKE_CTEST_ARGUMENTS="--output-on-failure;-V" -DMBED_BUILD_GREENTEA_TESTS=ON -DMBED_GREENTEA_TEST_BAREMETAL=ON -DMBED_GREENTEA_SERIAL_PORT=/dev/ttyDUMMY -DMBED_TARGET=${{ matrix.target }} -DMBED_APP_JSON_PATH=TESTS/configs/baremetal.json cmake --build __build - - name: Build ARM_MUSCA_S1 with full profile + - name: Build ${{ matrix.target }} with full profile + if: ${{ matrix.profile == 'full' }} run: | rm -rf __build - cmake -S . -B __build -GNinja -DCMAKE_CTEST_ARGUMENTS="--output-on-failure;-V" -DMBED_BUILD_GREENTEA_TESTS=ON -DMBED_GREENTEA_SERIAL_PORT=/dev/ttyDUMMY -DMBED_TARGET=ARM_MUSCA_S1 + cmake -S . -B __build -GNinja -DUPLOAD_METHOD=NONE -DMBED_GREENTEA_WIFI_SECURE_SSID=SomeNetwork -DMBED_GREENTEA_WIFI_SECURE_PASSWORD=SomePassword -DCMAKE_CTEST_ARGUMENTS="--output-on-failure;-V" -DMBED_BUILD_GREENTEA_TESTS=ON -DMBED_GREENTEA_SERIAL_PORT=/dev/ttyDUMMY -DMBED_TARGET=${{ matrix.target }} cmake --build __build diff --git a/connectivity/FEATURE_BLE/source/cordio/TESTS/cordio_hci/transport/CMakeLists.txt b/connectivity/FEATURE_BLE/source/cordio/TESTS/cordio_hci/transport/CMakeLists.txt index 59e07538b54..67ec2d1cd84 100644 --- a/connectivity/FEATURE_BLE/source/cordio/TESTS/cordio_hci/transport/CMakeLists.txt +++ b/connectivity/FEATURE_BLE/source/cordio/TESTS/cordio_hci/transport/CMakeLists.txt @@ -1,7 +1,7 @@ # Copyright (c) 2020 ARM Limited. All rights reserved. # SPDX-License-Identifier: Apache-2.0 -if("CORDIO_ZERO_COPY_HCI=1" IN_LIST MBED_CONFIG_DEFINITIONS) +if("CORDIO_ZERO_COPY_HCI" IN_LIST MBED_CONFIG_DEFINITIONS OR "CORDIO_ZERO_COPY_HCI=1" IN_LIST MBED_CONFIG_DEFINITIONS) set(TEST_SKIPPED "Test not relevant for zero copy hci.") endif() diff --git a/connectivity/drivers/emac/TARGET_RENESAS_EMAC/TARGET_RZ_A1XX/CMakeLists.txt b/connectivity/drivers/emac/TARGET_RENESAS_EMAC/TARGET_RZ_A1XX/CMakeLists.txt index f869cd21504..c0fbdfa7669 100644 --- a/connectivity/drivers/emac/TARGET_RENESAS_EMAC/TARGET_RZ_A1XX/CMakeLists.txt +++ b/connectivity/drivers/emac/TARGET_RENESAS_EMAC/TARGET_RZ_A1XX/CMakeLists.txt @@ -9,5 +9,5 @@ target_include_directories(mbed-emac target_sources(mbed-emac PRIVATE rza1_emac.cpp - rza1_eth.cpp + rza1_eth.c ) diff --git a/targets/TARGET_Maxim/TARGET_MAX32670/CMakeLists.txt b/targets/TARGET_Maxim/TARGET_MAX32670/CMakeLists.txt index 3a8f7060177..63cb8681da0 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32670/CMakeLists.txt +++ b/targets/TARGET_Maxim/TARGET_MAX32670/CMakeLists.txt @@ -2,6 +2,7 @@ # SPDX-License-Identifier: Apache-2.0 add_subdirectory(TARGET_MAX32670EVKIT EXCLUDE_FROM_ALL) +add_subdirectory(TARGET_XDOT_MAX32670 EXCLUDE_FROM_ALL) if(${MBED_TOOLCHAIN} STREQUAL "ARM") set(LINKER_FILE device/TOOLCHAIN_ARM_STD/MAX32670.sct) diff --git a/targets/TARGET_Maxim/TARGET_MAX32670/Libraries/PeriphDrivers/Source/SYS/sys_me15.c b/targets/TARGET_Maxim/TARGET_MAX32670/Libraries/PeriphDrivers/Source/SYS/sys_me15.c index 71a4586ca62..049a90d6985 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32670/Libraries/PeriphDrivers/Source/SYS/sys_me15.c +++ b/targets/TARGET_Maxim/TARGET_MAX32670/Libraries/PeriphDrivers/Source/SYS/sys_me15.c @@ -44,7 +44,6 @@ #include "mxc_assert.h" #include "mxc_sys.h" #include "mxc_delay.h" -#include "aes.h" #include "flc.h" #include "gcr_regs.h" #include "fcr_regs.h" diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/PinNames.h b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/PinNames.h index 326943f991e..8c47eb5807c 100644 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/PinNames.h +++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/PinNames.h @@ -54,10 +54,7 @@ typedef enum { #define LED3 P6_15 #define LED4 P6_12 - LED_RED = LED1, - LED_GREEN= LED2, - LED_BLUE = LED3, - LED_USER = LED4, +#define BUTTON0 P6_0 CONSOLE_TX = P6_3, CONSOLE_RX = P6_2, diff --git a/targets/TARGET_STM/stm_dma_utils.c b/targets/TARGET_STM/stm_dma_utils.c index c72dbaac12a..1308edcbc20 100644 --- a/targets/TARGET_STM/stm_dma_utils.c +++ b/targets/TARGET_STM/stm_dma_utils.c @@ -396,6 +396,15 @@ IRQn_Type stm_get_dma_irqn(const DMALinkInfo *dmaLink) case 4: case 5: return DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn; +#elif defined(TARGET_MCU_STM32F0) + // STM32F0 has a rather bespoke mapping + case 1: + case 2: + return DMA1_Ch2_3_DMA2_Ch1_2_IRQn; + case 3: + case 4: + case 5: + return DMA1_Ch4_7_DMA2_Ch3_5_IRQn; #else #ifdef DMA2_Channel1 diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/em_device.h b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/em_device.h index e408b796c6d..5668a1de05f 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/em_device.h +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/em_device.h @@ -41,6 +41,12 @@ #ifndef EM_DEVICE_H #define EM_DEVICE_H +// MBED: The CMake scripts always define __FPU_PRESENT, but the MCU CMSIS headers below also define it. +// So, undef it here to prevent multiple definition warning. +#ifdef __FPU_PRESENT +#undef __FPU_PRESENT +#endif + #if defined(EFM32GG11B110F2048GM64) #include "efm32gg11b110f2048gm64.h" From 8ff623131d7f136666a16e09743455bc957e0f3e Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Thu, 26 Sep 2024 23:46:53 -0700 Subject: [PATCH 4/4] STM32F7: add missing casts --- connectivity/drivers/emac/TARGET_STM/stm32xx_emac.cpp | 4 ++-- .../TARGET_MIMXRT105x/device/cmsis_nvic.h | 6 ------ .../TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/PinNames.h | 4 ++++ 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/connectivity/drivers/emac/TARGET_STM/stm32xx_emac.cpp b/connectivity/drivers/emac/TARGET_STM/stm32xx_emac.cpp index 13c9e66a1d6..638202602ae 100644 --- a/connectivity/drivers/emac/TARGET_STM/stm32xx_emac.cpp +++ b/connectivity/drivers/emac/TARGET_STM/stm32xx_emac.cpp @@ -306,13 +306,13 @@ bool STM32_EMAC::low_level_init_successful() tr_info("PHY ID %#X", PHY_ID); /* Initialize Tx Descriptors list: Chain Mode */ - if (HAL_ETH_DMATxDescListInit(&EthHandle, DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB) != HAL_OK) { + if (HAL_ETH_DMATxDescListInit(&EthHandle, DMATxDscrTab, reinterpret_cast(&Tx_Buff[0][0]), ETH_TXBUFNB) != HAL_OK) { tr_error("HAL_ETH_DMATxDescListInit issue"); return false; } /* Initialize Rx Descriptors list: Chain Mode */ - if (HAL_ETH_DMARxDescListInit(&EthHandle, DMARxDscrTab, Rx_Buff[0].data(), ETH_RXBUFNB) != HAL_OK) { + if (HAL_ETH_DMARxDescListInit(&EthHandle, DMARxDscrTab, reinterpret_cast(Rx_Buff[0].data()), ETH_RXBUFNB) != HAL_OK) { tr_error("HAL_ETH_DMARxDescListInit issue"); return false; } diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/device/cmsis_nvic.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/device/cmsis_nvic.h index 36dabbd90a1..1fe4565432e 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/device/cmsis_nvic.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/device/cmsis_nvic.h @@ -42,10 +42,4 @@ extern uint32_t __VECTOR_RAM[]; #define NVIC_NUM_VECTORS (16 + 160) // CORE + MCU Peripherals #define NVIC_RAM_VECTOR_ADDRESS (__VECTOR_RAM) // Vectors positioned at start of RAM -#ifdef MIMXRT105X_BOARD_HAS_EXTERNAL_RAM -#define MBED_RAM_SIZE MIMXRT105X_EXTERNAL_RAM_SIZE -#else -#define MBED_RAM_SIZE 0x00040000 -#endif - #endif diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/PinNames.h b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/PinNames.h index 8c47eb5807c..2d6af66ebd5 100644 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/PinNames.h +++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/PinNames.h @@ -54,6 +54,10 @@ typedef enum { #define LED3 P6_15 #define LED4 P6_12 + LED_RED = LED1, + LED_GREEN= LED2, + LED_BLUE = LED3, + LED_USER = LED4, #define BUTTON0 P6_0 CONSOLE_TX = P6_3,