From b4e915f6b98b28973f8d8327733e577a934f0dbf Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Sat, 22 Jun 2024 14:06:14 -0700 Subject: [PATCH] Fix QSPI flash, add option to use DMA in circular mode --- .../COMPONENT_QSPIF/{mbed_lib.json => mbed_lib.json5} | 6 ++++++ targets/TARGET_STM/qspi_api.c | 4 ++-- targets/TARGET_STM/stm_dma_utils.c | 5 ++--- targets/TARGET_STM/stm_dma_utils.h | 5 +++-- targets/TARGET_STM/stm_spi_api.c | 4 ++-- targets/targets.json5 | 8 +++++++- 6 files changed, 22 insertions(+), 10 deletions(-) rename storage/blockdevice/COMPONENT_QSPIF/{mbed_lib.json => mbed_lib.json5} (88%) diff --git a/storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json b/storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json5 similarity index 88% rename from storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json rename to storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json5 index b8082723fe76..484cf77b7023 100644 --- a/storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json +++ b/storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json5 @@ -54,6 +54,12 @@ "MCU_LPC546XX": { "QSPI_MIN_READ_SIZE": "4", "QSPI_MIN_PROG_SIZE": "4" + }, + "ARDUINO_GIGA": { + "QSPI_POLARITY_MODE": "QSPIF_POLARITY_MODE_1", + // The flash on this board (AT25SF128A) is quite old and does not have reset information in its + // SFDP table. + "enable-and-reset": true } } } diff --git a/targets/TARGET_STM/qspi_api.c b/targets/TARGET_STM/qspi_api.c index c84a4b59ec16..5951162c6eb5 100644 --- a/targets/TARGET_STM/qspi_api.c +++ b/targets/TARGET_STM/qspi_api.c @@ -234,7 +234,7 @@ qspi_status_t qspi_prepare_command(const qspi_command_t *command, OSPI_RegularCm #else /* OCTOSPI */ qspi_status_t qspi_prepare_command(const qspi_command_t *command, QSPI_CommandTypeDef *st_command) { - debug_if(qspi_api_c_debug, "qspi_prepare_command In: instruction.value %x dummy_count %x address.bus_width %x address.disabled %x address.value %x address.size %x\n", + debug_if(qspi_api_c_debug, "qspi_prepare_command In: instruction.value 0x%" PRIx8 " dummy_count 0x%" PRIx8 " address.bus_width 0x%x address.disabled %d address.value 0x%" PRIx32 " address.size %x\n", command->instruction.value, command->dummy_count, command->address.bus_width, command->address.disabled, command->address.value, command->address.size); // TODO: shift these around to get more dynamic mapping @@ -372,7 +372,7 @@ qspi_status_t qspi_prepare_command(const qspi_command_t *command, QSPI_CommandTy st_command->NbData = 0; - debug_if(qspi_api_c_debug, "qspi_prepare_command Out: InstructionMode %x Instruction %x AddressMode %x AddressSize %x Address %x DataMode %x\n", + debug_if(qspi_api_c_debug, "qspi_prepare_command Out: InstructionMode 0x%" PRIx32 " Instruction 0x%" PRIx32 " AddressMode 0x%" PRIx32 " AddressSize 0x%" PRIx32 " Address 0x%" PRIx32 " DataMode %" PRIx32 "\n", st_command->InstructionMode, st_command->Instruction, st_command->AddressMode, st_command->AddressSize, st_command->Address, st_command->DataMode); return QSPI_STATUS_OK; diff --git a/targets/TARGET_STM/stm_dma_utils.c b/targets/TARGET_STM/stm_dma_utils.c index 481b58758585..170b91efbb7d 100644 --- a/targets/TARGET_STM/stm_dma_utils.c +++ b/targets/TARGET_STM/stm_dma_utils.c @@ -572,7 +572,7 @@ DMA_HandleTypeDef *stm_get_dma_handle_for_link(DMALinkInfo const * dmaLink) } DMA_HandleTypeDef *stm_init_dma_link(const DMALinkInfo *dmaLink, uint32_t direction, bool periphInc, bool memInc, - uint8_t periphDataAlignment, uint8_t memDataAlignment){ + uint8_t periphDataAlignment, uint8_t memDataAlignment, uint32_t mode){ #ifdef DMA_IP_VERSION_V2 // Channels start from 1 in IP v2 only @@ -640,6 +640,7 @@ DMA_HandleTypeDef *stm_init_dma_link(const DMALinkInfo *dmaLink, uint32_t direct #endif dmaHandle->Init.Direction = direction; + dmaHandle->Init.Mode = mode; // IP v3 uses different fields for... basically everything in this struct #ifdef DMA_IP_VERSION_V3 @@ -761,8 +762,6 @@ DMA_HandleTypeDef *stm_init_dma_link(const DMALinkInfo *dmaLink, uint32_t direct #endif - dmaHandle->Init.Mode = DMA_NORMAL; - HAL_DMA_Init(dmaHandle); // Set up interrupt diff --git a/targets/TARGET_STM/stm_dma_utils.h b/targets/TARGET_STM/stm_dma_utils.h index 16a549bf0cde..c398818afefb 100644 --- a/targets/TARGET_STM/stm_dma_utils.h +++ b/targets/TARGET_STM/stm_dma_utils.h @@ -122,12 +122,13 @@ DMA_HandleTypeDef * stm_get_dma_handle_for_link(DMALinkInfo const * dmaLink); * @param periphInc Whether the Peripheral address register should be incremented or not. * @param memInc Whether the Memory address register should be incremented or not. * @param periphDataAlignment Alignment value of the peripheral data. 1, 2, or 4. - * @param memDataAlignment \c DMA_MDATAALIGN_BYTE, \c DMA_MDATAALIGN_HALFWORD, or \c DMA_MDATAALIGN_WORD + * @param memDataAlignment Alignment value of the memory data. 1, 2, or 4. + * @param mode Mode of the DMA transaction. DMA_NORMAL, DMA_CIRCULAR, etc * * @return Pointer to DMA handle allocated by this module. * @return NULL if the DMA channel used by the link has already been allocated by something else. */ -DMA_HandleTypeDef * stm_init_dma_link(DMALinkInfo const * dmaLink, uint32_t direction, bool periphInc, bool memInc, uint8_t periphDataAlignment, uint8_t memDataAlignment); +DMA_HandleTypeDef * stm_init_dma_link(DMALinkInfo const * dmaLink, uint32_t direction, bool periphInc, bool memInc, uint8_t periphDataAlignment, uint8_t memDataAlignment, uint32_t mode); /** * @brief Free a DMA link. diff --git a/targets/TARGET_STM/stm_spi_api.c b/targets/TARGET_STM/stm_spi_api.c index d5c49fbcd08a..60f14d8d9380 100644 --- a/targets/TARGET_STM/stm_spi_api.c +++ b/targets/TARGET_STM/stm_spi_api.c @@ -531,7 +531,7 @@ static void spi_init_tx_dma(struct spi_s * obj) DMALinkInfo const *dmaLink = &SPITxDMALinks[obj->spiIndex - 1]; // Initialize DMA channel - DMA_HandleTypeDef *dmaHandle = stm_init_dma_link(dmaLink, DMA_MEMORY_TO_PERIPH, false, true, 1, 1); + DMA_HandleTypeDef *dmaHandle = stm_init_dma_link(dmaLink, DMA_MEMORY_TO_PERIPH, false, true, 1, 1, DMA_NORMAL); if(dmaHandle == NULL) { @@ -564,7 +564,7 @@ static void spi_init_rx_dma(struct spi_s * obj) DMALinkInfo const *dmaLink = &SPIRxDMALinks[obj->spiIndex - 1]; // Initialize DMA channel - DMA_HandleTypeDef *dmaHandle = stm_init_dma_link(dmaLink, DMA_PERIPH_TO_MEMORY, false, true, 1, 1); + DMA_HandleTypeDef *dmaHandle = stm_init_dma_link(dmaLink, DMA_PERIPH_TO_MEMORY, false, true, 1, 1, DMA_NORMAL); if(dmaHandle == NULL) { diff --git a/targets/targets.json5 b/targets/targets.json5 index 5c16a0aa209f..ef6102d346e1 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3684,7 +3684,13 @@ clock_source: "USE_PLL_HSE_XTAL | USE_PLL_HSI", "network-default-interface-type": "WIFI", lpuart_clock_source: "USE_LPUART_CLK_HSI", - "hse_value": 16000000 + "hse_value": 16000000, + + // Arduino Giga connects the primary USB port (USB-C port) to the USB Full Speed pins. + // TODO eventually this needs to be runtime configurable so that the two USB ports + // can use different speeds. With the current setting, Mbed will not be able to use + // the host mode port as that port uses high speed. + "usb_speed": "USE_USB_OTG_FS", }, macros_add: [ "BT_UART_NO_3M_SUPPORT"