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For the following test:
declare void @use1() declare void @use2() define i256 @test(i256 %arg, i256 %arg1, i256 %arg2, i256 %arg3) { entry: %icmp = icmp ult i256 %arg, 5 br i1 %icmp, label %bb1, label %bb2 bb1: call void @use1() br label %bb4 bb2: %icmp2 = icmp ugt i256 %arg, 5 br i1 %icmp2, label %bb3, label %bb4 bb3: call void @use2() br label %bb4 bb4: %phi = phi i256 [ 152, %bb1 ], [ 42, %bb3 ], [ 0, %bb2 ] ret i256 %phi }
Following assembly is generated:
test: ; @test sub.s! 4, r1, r0 jump.gt @.BB0_2 near_call r0, @use1, @DEFAULT_UNWIND add 152, r0, r1 ret .BB0_2: ; %bb2 sub.s! 6, r1, r0 add r0, r0, r1 jump.lt @.BB0_4 near_call r0, @use2, @DEFAULT_UNWIND add 42, r0, r1 .BB0_4: ; %bb4 ret
In this case, if we adjust both compares to:
sub.s! 5, r1, r0 jump.ge @.BB0_2 ... sub.s! 5, r1, r0 jump.le @.BB0_4
Second sub.s! 5, r1, r0 is not needed, and MachineCSE would eliminate it.
sub.s! 5, r1, r0
This optimization opportunity is inspired by AArch64ConditionOptimizer, so implement the same optimization for EraVM.
AArch64ConditionOptimizer
The text was updated successfully, but these errors were encountered:
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For the following test:
Following assembly is generated:
In this case, if we adjust both compares to:
Second
sub.s! 5, r1, r0
is not needed, and MachineCSE would eliminate it.This optimization opportunity is inspired by
AArch64ConditionOptimizer
, so implement the same optimization for EraVM.The text was updated successfully, but these errors were encountered: