Interesting device with SSD202D and how to build kernel for it #71

NoaHimesaka1873 · 2022-10-14T01:21:13Z

NoaHimesaka1873
Oct 14, 2022

I bought an audiophile Digital-to-Analogue Converter called Gustard R26. It has streaming function and after some digging, I found out that it has off the shelf SOM20X with Debian 11. By default it comes with 4.19.84 proprietary kernel. I would like to package open-source and modern 5.19 and later kernel package for Debian. Where should I start?

NoaHimesaka1873 · 2022-10-14T01:46:08Z

NoaHimesaka1873
Oct 14, 2022
Author

EDIT: its kernel version is 4.9.84, not 4.19.84.
Output of /proc/cmdline: panic=3 rootwait root=/dev/mmcblk0p1 rw clk_ignore_unused (I think there's IPL but SPI isn't accessible with this kernel.)
Devicetree from /proc/device-tree:

/dts-v1/;

/ {
	compatible = "sstar,infinity2m";
	model = "INFINITY2M SSC010A-S01A-S";
	#address-cells = <0x01>;
	#size-cells = <0x01>;

	reserved-memory {
		ranges;
		#address-cells = <0x01>;
		#size-cells = <0x01>;
	};

	soc {
		compatible = "simple-bus";
		ranges;
		interrupt-parent = <0x02>;
		#address-cells = <0x01>;
		#size-cells = <0x01>;

		pwm {
			compatible = "sstar,infinity-pwm";
			clocks = <0x0c>;
			pad-ctrl = <0xffff 0xffff 0xffff 0xffff>;
			status = "disabled";
			reg = <0x1f003400 0x600>;
			npwm = <0x04>;
		};

		ir@1F007A00 {
			compatible = "sstar,infinity-ir";
			clocks = <0x71>;
			status = "ok";
			interrupts = <0x00 0x63 0x04>;
			reg = <0x1f007a00 0x1000>;
		};

		aesdma {
			compatible = "sstar,infinity-aes";
			clocks = <0x69>;
			status = "ok";
		};

		clocks {
			ranges;
			#address-cells = <0x01>;
			#size-cells = <0x01>;

			CLK_utmi_480m {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				clock-frequency = <0x1c9c3800>;
			};

			CLK_jpe {
				compatible = "sstar,composite-clock";
				clocks = <0x28 0x28 0x28 0x32 0x06 0x07 0x28 0x28>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				phandle = <0x67>;
				reg = <0x1f2071a8 0x04>;
				linux,phandle = <0x67>;
			};

			CLK_riu_mcu_if {
				compatible = "fixed-factor-clock";
				clocks = <0x1e>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_ir {
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x22 0x2a 0x4e 0x4f 0x2b 0x50 0x51>;
				gate-shift = <0x05>;
				mux-shift = <0x07>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				phandle = <0x71>;
				reg = <0x1f001c84 0x04>;
				linux,phandle = <0x71>;
			};

			CLK_aesdma {
				compatible = "sstar,composite-clock";
				clocks = <0x09 0x2e 0x28 0x28>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x69>;
				glitch-shift = <0x04>;
				reg = <0x1f207184 0x04>;
				linux,phandle = <0x69>;
			};

			CLK_axi2x {
				compatible = "fixed-factor-clock";
				clocks = <0x20>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_riu_sc_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x1a>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_uart2 {
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x2f 0x0c 0x28>;
				gate-shift = <0x0c>;
				mux-shift = <0x0e>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x5c>;
				reg = <0x1f2070c4 0x04>;
				linux,phandle = <0x5c>;
			};

			CLK_upll_384m {
				compatible = "fixed-factor-clock";
				clocks = <0x04>;
				clock-mult = <0x04>;
				#clock-cells = <0x00>;
				phandle = <0x31>;
				linux,phandle = <0x31>;
				clock-div = <0x05>;
			};

			CLK_sc_pixel_p {
				compatible = "fixed-factor-clock";
				clocks = <0x16>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x47>;
				linux,phandle = <0x47>;
				clock-div = <0x01>;
			};

			CLK_mop {
				compatible = "sstar,composite-clock";
				clocks = <0x32 0x31 0x06 0x40>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x74>;
				reg = <0x1f207150 0x04>;
				linux,phandle = <0x74>;
			};

			CLK_lpll_clk {
				compatible = "sstar,complex-clock";
				clocks = <0x27>;
				#clock-cells = <0x00>;
				phandle = <0x0e>;
				linux,phandle = <0x0e>;
			};

			CLK_VOID {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x28>;
				clock-frequency = <0x01>;
				linux,phandle = <0x28>;
			};

			CLK_mcu_pm_p {
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_ddr_syn {
				compatible = "sstar,composite-clock";
				clocks = <0x27 0x07 0x0c 0x28>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x26>;
				reg = <0x1f207064 0x04>;
				linux,phandle = <0x26>;
			};

			CLK_ccir_in_clk {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				clock-frequency = <0x01>;
			};

			CLK_mpll_123m {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x08>;
				clock-frequency = <0x75aef40>;
				linux,phandle = <0x08>;
			};

			CLK_emac1_rx_ref {
				compatible = "sstar,composite-clock";
				clocks = <0x4a 0x28>;
				gate-shift = <0x08>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x64>;
				reg = <0x1f2266cc 0x04>;
				linux,phandle = <0x64>;
			};

			CLK_emac_ahb {
				compatible = "sstar,composite-clock";
				clocks = <0x2f 0x08 0x09 0x38>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x5d>;
				reg = <0x1f207108 0x04>;
				linux,phandle = <0x5d>;
			};

			CLK_sata_phy_432 {
				compatible = "sstar,composite-clock";
				clocks = <0x27 0x28 0x28 0x28>;
				gate-shift = <0x08>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x6d>;
				reg = <0x1f207118 0x04>;
				linux,phandle = <0x6d>;
			};

			CLK_xtali_12m_div4 {
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x51>;
				linux,phandle = <0x51>;
				clock-div = <0x04>;
			};

			CLK_sdio {
				compatible = "sstar,composite-clock";
				clocks = <0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x0c 0x3f>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				phandle = <0x14>;
				reg = <0x1f207114 0x04>;
				linux,phandle = <0x14>;
			};

			CLK_mspi0 {
				compatible = "sstar,composite-clock";
				clocks = <0x33 0x30 0x0c 0x2f>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x10>;
				reg = <0x1f2070cc 0x04>;
				linux,phandle = <0x10>;
			};

			CLK_utmi_160m_div8 {
				compatible = "fixed-factor-clock";
				clocks = <0x0b>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x3e>;
				linux,phandle = <0x3e>;
				clock-div = <0x08>;
			};

			CLK_uart0 {
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x2f 0x0c 0x28>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x59>;
				reg = <0x1f2070c4 0x04>;
				linux,phandle = <0x59>;
			};

			CLK_live_pm {
				compatible = "fixed-factor-clock";
				clocks = <0x23>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_dec_pclk {
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x2f 0x33 0x28>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f207154 0x04>;
			};

			CLK_upll {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x04>;
				clock-frequency = <0x1c9c3800>;
				linux,phandle = <0x04>;
			};

			CLK_pm_riu_w_clk_in {
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x25>;
				linux,phandle = <0x25>;
				clock-div = <0x01>;
			};

			CLK_pm_sleep {
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x22 0x2a 0x4e 0x4f 0x2b 0x50 0x51>;
				auto-enable = <0x01>;
				mux-shift = <0x0c>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				reg = <0x1f001c88 0x04>;
			};

			CLK_miu_miic0 {
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_riu_w_clk_vhe_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_xtali_12m_div12 {
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x4e>;
				linux,phandle = <0x4e>;
				clock-div = <0x0c>;
			};

			CLK_csi2_mac_p {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				clock-frequency = <0x01>;
			};

			CLK_dec_bclk {
				compatible = "sstar,composite-clock";
				clocks = <0x06 0x32 0x07 0x2e 0x09 0x30 0x28 0x28>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				reg = <0x1f2071f8 0x04>;
			};

			CLK_xtali_12m_div40 {
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x3f>;
				linux,phandle = <0x3f>;
				clock-div = <0x28>;
			};

			CLK_pad2isp_sr_pclk {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				clock-frequency = <0x01>;
			};

			CLK_mspi {
				compatible = "sstar,composite-clock";
				clocks = <0x36 0x37>;
				gate-shift = <0x0c>;
				mux-shift = <0x0e>;
				mux-width = <0x01>;
				#clock-cells = <0x00>;
				reg = <0x1f2070cc 0x04>;
			};

			CLK_xtali_12m_div2 {
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x50>;
				linux,phandle = <0x50>;
				clock-div = <0x02>;
			};

			CLK_emac_testrx125_in_lan {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x38>;
				clock-frequency = <0x01>;
				linux,phandle = <0x38>;
			};

			CLK_bist_sc_gp {
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x33 0x30 0x0c>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f20700c 0x04>;
			};

			CLK_mpll_288m_div8 {
				compatible = "fixed-factor-clock";
				clocks = <0x06>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x3c>;
				linux,phandle = <0x3c>;
				clock-div = <0x08>;
			};

			CLK_riu_dec_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x1b>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_sc_pixel {
				compatible = "sstar,composite-clock";
				clocks = <0x40 0x07 0x0a 0x2e 0x2f 0x08 0x33 0x09 0x34 0x30 0x0e 0x41 0x42 0x43 0x3c 0x44>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x04>;
				#clock-cells = <0x00>;
				phandle = <0x16>;
				reg = <0x1f20718c 0x04>;
				linux,phandle = <0x16>;
			};

			CLK_fcie_p {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				clock-frequency = <0x01>;
			};

			CLK_disp_432 {
				compatible = "sstar,composite-clock";
				clocks = <0x27 0x28 0x28 0x28>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x55>;
				reg = <0x1f20714c 0x04>;
				linux,phandle = <0x55>;
			};

			CLK_sata_axi {
				compatible = "sstar,composite-clock";
				clocks = <0x40 0x06 0x28 0x28>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x6a>;
				reg = <0x1f2071b8 0x04>;
				linux,phandle = <0x6a>;
			};

			CLK_rtc_32k_div4 {
				compatible = "fixed-factor-clock";
				clocks = <0x22>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x4f>;
				linux,phandle = <0x4f>;
				clock-div = <0x04>;
			};

			CLK_riu_w_clk_mipi_if_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x1d>;
				linux,phandle = <0x1d>;
				clock-div = <0x01>;
			};

			CLK_mspi0_p {
				compatible = "fixed-factor-clock";
				clocks = <0x10>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x36>;
				linux,phandle = <0x36>;
				clock-div = <0x01>;
			};

			CLK_miic0 {
				compatible = "sstar,composite-clock";
				clocks = <0x34 0x30 0x0c 0x28>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x72>;
				reg = <0x1f2070dc 0x04>;
				linux,phandle = <0x72>;
			};

			CLK_hdmi {
				compatible = "sstar,composite-clock";
				clocks = <0x46 0x47 0x28 0x28>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x52>;
				reg = <0x1f2266d4 0x04>;
				linux,phandle = <0x52>;
			};

			CLK_xtali {
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x28 0x28 0x28>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f207000 0x04>;
			};

			CLK_hemcu_216m {
				compatible = "sstar,composite-clock";
				clocks = <0x07>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				#clock-cells = <0x00>;
				reg = <0x1f2071b4 0x04>;
			};

			CLK_utmi_160m_div4 {
				compatible = "fixed-factor-clock";
				clocks = <0x0b>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x3b>;
				linux,phandle = <0x3b>;
				clock-div = <0x04>;
			};

			CLK_sar {
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x22 0x2a 0x4e 0x4f 0x2b 0x50 0x51>;
				gate-shift = <0x05>;
				auto-enable = <0x01>;
				mux-shift = <0x07>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				phandle = <0x6f>;
				reg = <0x1f001c88 0x04>;
				linux,phandle = <0x6f>;
			};

			CLK_bist_dec_gp {
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x33 0x30 0x0c>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f20715c 0x04>;
			};

			CLK_fuart0_synth_in {
				compatible = "sstar,composite-clock";
				clocks = <0x27 0x07 0x28 0x28>;
				gate-shift = <0x04>;
				auto-enable = <0x01>;
				mux-shift = <0x06>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f2070d0 0x04>;
			};

			CLK_mpll_144m_div4 {
				compatible = "fixed-factor-clock";
				clocks = <0x21>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x4c>;
				linux,phandle = <0x4c>;
				clock-div = <0x04>;
			};

			CLK_rtc {
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x22 0x28 0x28>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x6e>;
				reg = <0x1f001c88 0x04>;
				linux,phandle = <0x6e>;
			};

			CLK_miu_dma0 {
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_armpll_37p125m {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				clock-frequency = <0x19bfcc00>;
			};

			CLK_lpll_clk_div8 {
				compatible = "fixed-factor-clock";
				clocks = <0x0e>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x43>;
				linux,phandle = <0x43>;
				clock-div = <0x08>;
			};

			CLK_mpll_86m_div16 {
				compatible = "fixed-factor-clock";
				clocks = <0x09>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x10>;
			};

			CLK_pwm {
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x22 0x2a 0x4e 0x4f 0x09 0x50 0x51>;
				mux-shift = <0x0c>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				reg = <0x1f001c70 0x04>;
			};

			CLK_mpll_123m_div2 {
				compatible = "fixed-factor-clock";
				clocks = <0x08>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x02>;
			};

			CLK_xtali_24m {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x23>;
				clock-frequency = <0x16e3600>;
				linux,phandle = <0x23>;
			};

			CLK_mpll_288m_div4 {
				compatible = "fixed-factor-clock";
				clocks = <0x06>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x34>;
				linux,phandle = <0x34>;
				clock-div = <0x04>;
			};

			CLK_riu_w_clk_hemcu_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x1c>;
				linux,phandle = <0x1c>;
				clock-div = <0x01>;
			};

			CLK_mpll_144m_div2 {
				compatible = "fixed-factor-clock";
				clocks = <0x21>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x4d>;
				linux,phandle = <0x4d>;
				clock-div = <0x02>;
			};

			CLK_miu_sc_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x17>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x12>;
				linux,phandle = <0x12>;
				clock-div = <0x01>;
			};

			CLK_xtali_12m_div128 {
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x2d>;
				linux,phandle = <0x2d>;
				clock-div = <0x80>;
			};

			CLK_mpll_144m {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x21>;
				clock-frequency = <0x8954400>;
				linux,phandle = <0x21>;
			};

			CLK_eth_buf {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x49>;
				clock-frequency = <0x01>;
				linux,phandle = <0x49>;
			};

			CLK_fuart0_synth_out {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x35>;
				clock-frequency = <0xb71b000>;
				linux,phandle = <0x35>;
			};

			CLK_bist {
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x33 0x30 0x0c>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f207008 0x04>;
			};

			CLK_miu {
				compatible = "sstar,composite-clock";
				clocks = <0x1f 0x28 0x29 0x07>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x0f>;
				glitch-shift = <0x04>;
				reg = <0x1f20705c 0x04>;
				linux,phandle = <0x0f>;
			};

			CLK_riu_hemcu_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x1c>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_riu_pm {
				compatible = "fixed-factor-clock";
				clocks = <0x25>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_dec_aclk {
				compatible = "sstar,composite-clock";
				clocks = <0x32 0x31 0x06 0x07>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f207154 0x04>;
			};

			CLK_miu_urdma {
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_mpll_288m_div2 {
				compatible = "fixed-factor-clock";
				clocks = <0x06>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x2f>;
				linux,phandle = <0x2f>;
				clock-div = <0x02>;
			};

			CLK_mcu_pm {
				compatible = "fixed-factor-clock";
				clocks = <0x24>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_spi_pm {
				compatible = "sstar,composite-clock";
				clocks = <0x22 0x4b 0x4c 0x3a 0x30 0x4d 0x09 0x33 0x2a 0x4e 0x4f 0x2b 0x50 0x51 0x0c 0x23>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				mux-shift = <0x0a>;
				mux-width = <0x04>;
				#clock-cells = <0x00>;
				glitch-shift = <0x0e>;
				reg = <0x1f001c80 0x04>;
			};

			CLK_utmi {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x05>;
				clock-frequency = <0x1c9c3800>;
				linux,phandle = <0x05>;
			};

			CLK_utmi_192m_div4 {
				compatible = "fixed-factor-clock";
				clocks = <0x0a>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x39>;
				linux,phandle = <0x39>;
				clock-div = <0x04>;
			};

			CLK_emac1_tx {
				compatible = "sstar,composite-clock";
				clocks = <0x49 0x4a>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x61>;
				reg = <0x1f2266d0 0x04>;
				linux,phandle = <0x61>;
			};

			CLK_lpll_clk_div4 {
				compatible = "fixed-factor-clock";
				clocks = <0x0e>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x42>;
				linux,phandle = <0x42>;
				clock-div = <0x04>;
			};

			CLK_emac_tx {
				compatible = "sstar,composite-clock";
				clocks = <0x49 0x4a>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x5e>;
				reg = <0x1f22668c 0x04>;
				linux,phandle = <0x5e>;
			};

			CLK_mspi1 {
				compatible = "sstar,composite-clock";
				clocks = <0x33 0x30 0x0c 0x2f>;
				gate-shift = <0x08>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x11>;
				reg = <0x1f2070cc 0x04>;
				linux,phandle = <0x11>;
			};

			CLK_sata_pm {
				compatible = "sstar,composite-clock";
				clocks = <0x33 0x0c 0x23 0x08>;
				gate-shift = <0x08>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x6b>;
				reg = <0x1f2071b0 0x04>;
				linux,phandle = <0x6b>;
			};

			CLK_riu_w_clk_dec_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x1b>;
				linux,phandle = <0x1b>;
				clock-div = <0x01>;
			};

			CLK_uart1 {
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x2f 0x0c 0x28>;
				gate-shift = <0x08>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x5a>;
				reg = <0x1f2070c4 0x04>;
				linux,phandle = <0x5a>;
			};

			CLK_rmii_buf {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x4a>;
				clock-frequency = <0x01>;
				linux,phandle = <0x4a>;
			};

			CLK_emac_tx_ref {
				compatible = "sstar,composite-clock";
				clocks = <0x4a 0x28>;
				gate-shift = <0x08>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				#clock-cells = <0x00>;
				reg = <0x1f22668c 0x04>;
			};

			CLK_mpll_288m_div32 {
				compatible = "fixed-factor-clock";
				clocks = <0x06>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x44>;
				linux,phandle = <0x44>;
				clock-div = <0x20>;
			};

			CLK_mpll_172m {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x2e>;
				clock-frequency = <0xa4cb800>;
				linux,phandle = <0x2e>;
			};

			CLK_miu_miic1 {
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_mipi_tx_dsi_apb {
				compatible = "sstar,composite-clock";
				clocks = <0x24 0x45 0x28 0x28>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x54>;
				reg = <0x1f2266dc 0x04>;
				linux,phandle = <0x54>;
			};

			CLK_miu_sc_gp_p {
				compatible = "fixed-factor-clock";
				clocks = <0x12>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_mpll_216m_div8 {
				compatible = "fixed-factor-clock";
				clocks = <0x07>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x4b>;
				linux,phandle = <0x4b>;
				clock-div = <0x08>;
			};

			CLK_emac1_rx {
				compatible = "sstar,composite-clock";
				clocks = <0x49 0x4a>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x62>;
				reg = <0x1f2266cc 0x04>;
				linux,phandle = <0x62>;
			};

			CLK_utmi_160m {
				compatible = "fixed-factor-clock";
				clocks = <0x05>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x0b>;
				linux,phandle = <0x0b>;
				clock-div = <0x03>;
			};

			CLK_emac_rx {
				compatible = "sstar,composite-clock";
				clocks = <0x49 0x4a>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x5f>;
				reg = <0x1f226688 0x04>;
				linux,phandle = <0x5f>;
			};

			CLK_mcu {
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x2e 0x2f 0x30 0x27 0x31 0x32 0x33>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				phandle = <0x0d>;
				glitch-shift = <0x05>;
				reg = <0x1f207004 0x04>;
				linux,phandle = <0x0d>;
			};

			CLK_miu2x {
				compatible = "fixed-factor-clock";
				clocks = <0x1f>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x13>;
				linux,phandle = <0x13>;
				clock-div = <0x01>;
			};

			CLK_utmi_192m {
				compatible = "fixed-factor-clock";
				clocks = <0x05>;
				clock-mult = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x0a>;
				linux,phandle = <0x0a>;
				clock-div = <0x05>;
			};

			CLK_lpll_clk_div2 {
				compatible = "fixed-factor-clock";
				clocks = <0x0e>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x41>;
				linux,phandle = <0x41>;
				clock-div = <0x02>;
			};

			CLK_miu_p {
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x17>;
				linux,phandle = <0x17>;
				clock-div = <0x01>;
			};

			CLK_mpll_86m {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x09>;
				clock-frequency = <0x5265c00>;
				linux,phandle = <0x09>;
			};

			CLK_mpll_86m_div4 {
				compatible = "fixed-factor-clock";
				clocks = <0x09>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x04>;
			};

			CLK_miupll_clk {
				compatible = "sstar,complex-clock";
				clocks = <0x23>;
				#clock-cells = <0x00>;
				phandle = <0x29>;
				linux,phandle = <0x29>;
			};

			CLK_miu_rec {
				compatible = "sstar,composite-clock";
				clocks = <0x2a 0x2b 0x2c 0x2d>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f207060 0x04>;
			};

			CLK_sdio_p {
				compatible = "fixed-factor-clock";
				clocks = <0x14>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_mcu_p {
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x24>;
				linux,phandle = <0x24>;
				clock-div = <0x01>;
			};

			CLK_xtali_sc_gp {
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x28 0x28 0x28>;
				gate-shift = <0x04>;
				mux-shift = <0x06>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f207000 0x04>;
			};

			CLK_bdma {
				compatible = "sstar,composite-clock";
				clocks = <0x17 0x28 0x28 0x28>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x66>;
				reg = <0x1f207180 0x04>;
				linux,phandle = <0x66>;
			};

			CLK_disp_216 {
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x33>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x56>;
				reg = <0x1f20714c 0x04>;
				linux,phandle = <0x56>;
			};

			CLK_miu2x_p {
				compatible = "fixed-factor-clock";
				clocks = <0x13>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x20>;
				linux,phandle = <0x20>;
				clock-div = <0x01>;
			};

			CLK_mipi_tx_dsi_p {
				compatible = "fixed-factor-clock";
				clocks = <0x15>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x45>;
				linux,phandle = <0x45>;
				clock-div = <0x01>;
			};

			CLK_miic1 {
				compatible = "sstar,composite-clock";
				clocks = <0x34 0x30 0x0c 0x28>;
				gate-shift = <0x08>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x73>;
				reg = <0x1f2070dc 0x04>;
				linux,phandle = <0x73>;
			};

			CLK_miu_ff {
				compatible = "fixed-factor-clock";
				clocks = <0x17>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_riu {
				compatible = "fixed-factor-clock";
				clocks = <0x18>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_xtali_12m {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x0c>;
				clock-frequency = <0xb71b00>;
				linux,phandle = <0x0c>;
			};

			CLK_utmi_160m_div5 {
				compatible = "fixed-factor-clock";
				clocks = <0x0b>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x3d>;
				linux,phandle = <0x3d>;
				clock-div = <0x05>;
			};

			CLK_ge {
				compatible = "sstar,composite-clock";
				clocks = <0x17 0x07 0x2e 0x2f 0x32 0x31 0x27 0x28>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				phandle = <0x57>;
				reg = <0x1f207144 0x04>;
				linux,phandle = <0x57>;
			};

			CLK_mpll_288m {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x06>;
				clock-frequency = <0x112a8800>;
				linux,phandle = <0x06>;
			};

			CLK_mpll_86m_div2 {
				compatible = "fixed-factor-clock";
				clocks = <0x09>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x3a>;
				linux,phandle = <0x3a>;
				clock-div = <0x02>;
			};

			CLK_mpll_432m {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x27>;
				clock-frequency = <0x19bfcc00>;
				linux,phandle = <0x27>;
			};

			CLK_live {
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x28 0x28 0x28>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f207000 0x04>;
			};

			CLK_emac1_tx_ref {
				compatible = "sstar,composite-clock";
				clocks = <0x4a 0x28>;
				gate-shift = <0x08>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x63>;
				reg = <0x1f2266d0 0x04>;
				linux,phandle = <0x63>;
			};

			CLK_mpll_216m_div4 {
				compatible = "fixed-factor-clock";
				clocks = <0x07>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x30>;
				linux,phandle = <0x30>;
				clock-div = <0x04>;
			};

			CLK_cpupll_clk {
				compatible = "sstar,complex-clock";
				clocks = <0x27>;
				#clock-cells = <0x00>;
				phandle = <0x01>;
				linux,phandle = <0x01>;
			};

			CLK_sata_phy_108 {
				compatible = "sstar,composite-clock";
				clocks = <0x33 0x28 0x28 0x28>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x6c>;
				reg = <0x1f207118 0x04>;
				linux,phandle = <0x6c>;
			};

			CLK_miu_dec_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x17>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_tck_buf {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				clock-frequency = <0x01>;
			};

			CLK_riu_w_clk_in {
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x19>;
				linux,phandle = <0x19>;
				clock-div = <0x01>;
			};

			CLK_dec_cclk {
				compatible = "sstar,composite-clock";
				clocks = <0x31 0x27 0x06 0x07 0x33 0x30 0x28 0x28>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				mux-shift = <0x0a>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				reg = <0x1f2071f8 0x04>;
			};

			CLK_RTC_CLK_32K {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				clock-frequency = <0x7d00>;
			};

			CLK_miu_dig {
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_pwr_ctl {
				compatible = "sstar,composite-clock";
				clocks = <0x2b 0x2a 0x0c 0x28>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f207010 0x04>;
			};

			CLK_spi {
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x33 0x09 0x34 0x17 0x28 0x28 0x28>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				mux-shift = <0x0a>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				reg = <0x1f001c80 0x04>;
			};

			CLK_riu_nogating {
				compatible = "fixed-factor-clock";
				clocks = <0x19>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_emac_rx_ref {
				compatible = "sstar,composite-clock";
				clocks = <0x4a 0x28>;
				gate-shift = <0x08>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				#clock-cells = <0x00>;
				reg = <0x1f226688 0x04>;
			};

			CLK_utmi_240m {
				compatible = "fixed-factor-clock";
				clocks = <0x05>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x40>;
				linux,phandle = <0x40>;
				clock-div = <0x02>;
			};

			CLK_ddrpll_clk {
				compatible = "sstar,complex-clock";
				clocks = <0x26>;
				#clock-cells = <0x00>;
				phandle = <0x1f>;
				linux,phandle = <0x1f>;
			};

			CLK_dac {
				compatible = "sstar,composite-clock";
				clocks = <0x48 0x46 0x28 0x28>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x53>;
				reg = <0x1f2266d8 0x04>;
				linux,phandle = <0x53>;
			};

			CLK_mpll_216m_div2 {
				compatible = "fixed-factor-clock";
				clocks = <0x07>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x33>;
				linux,phandle = <0x33>;
				clock-div = <0x02>;
			};

			CLK_xtali_12m_div8 {
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x2a>;
				linux,phandle = <0x2a>;
				clock-div = <0x08>;
			};

			CLK_rtc_32k {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x22>;
				clock-frequency = <0x8000>;
				linux,phandle = <0x22>;
			};

			CLK_fuart {
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x2f 0x0c 0x35>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x5b>;
				reg = <0x1f2070d0 0x04>;
				linux,phandle = <0x5b>;
			};

			CLK_xtali_12m_div64 {
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x2c>;
				linux,phandle = <0x2c>;
				clock-div = <0x40>;
			};

			CLK_live_c {
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x28 0x28 0x28>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f207000 0x04>;
			};

			CLK_riu_w_clk_top {
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x18>;
				linux,phandle = <0x18>;
				clock-div = <0x01>;
			};

			CLK_mipi_tx_dsi {
				compatible = "sstar,composite-clock";
				clocks = <0x0e 0x0b 0x2f 0x33 0x07 0x40 0x28 0x28>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				phandle = <0x15>;
				reg = <0x1f2071bc 0x04>;
				linux,phandle = <0x15>;
			};

			CLK_riu_mipi_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				clock-div = <0x01>;
			};

			CLK_riubrdg {
				compatible = "sstar,composite-clock";
				clocks = <0x24 0x28 0x28 0x28>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				#clock-cells = <0x00>;
				reg = <0x1f207004 0x04>;
			};

			CLK_dac_in {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x48>;
				clock-frequency = <0x19bfcc00>;
				linux,phandle = <0x48>;
			};

			CLK_dip {
				compatible = "sstar,composite-clock";
				clocks = <0x32 0x31 0x07 0x0a 0x2e 0x0b 0x28 0x28>;
				gate-shift = <0x00>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				#clock-cells = <0x00>;
				phandle = <0x58>;
				reg = <0x1f207148 0x04>;
				linux,phandle = <0x58>;
			};

			CLK_miu_xd2miu {
				compatible = "sstar,composite-clock";
				clocks = <0x0f>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				#clock-cells = <0x00>;
				reg = <0x1f203c84 0x04>;
			};

			CLK_mpll_216m {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x07>;
				clock-frequency = <0xcdfe600>;
				linux,phandle = <0x07>;
			};

			CLK_riu_w_clk_sc_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x1a>;
				linux,phandle = <0x1a>;
				clock-div = <0x01>;
			};

			CLK_upll_320m {
				compatible = "fixed-factor-clock";
				clocks = <0x04>;
				clock-mult = <0x02>;
				#clock-cells = <0x00>;
				phandle = <0x32>;
				linux,phandle = <0x32>;
				clock-div = <0x03>;
			};

			CLK_xtali_12m_div16 {
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x2b>;
				linux,phandle = <0x2b>;
				clock-div = <0x10>;
			};

			CLK_riu_w_clk_mcu_if_gp {
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x1e>;
				linux,phandle = <0x1e>;
				clock-div = <0x01>;
			};

			CLK_mspi1_p {
				compatible = "fixed-factor-clock";
				clocks = <0x11>;
				clock-mult = <0x01>;
				#clock-cells = <0x00>;
				phandle = <0x37>;
				linux,phandle = <0x37>;
				clock-div = <0x01>;
			};

			CLK_hdmi_in {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				phandle = <0x46>;
				clock-frequency = <0x19bfcc00>;
				linux,phandle = <0x46>;
			};
		};

		miu {
			compatible = "sstar,miu";
			status = "ok";
			interrupts = <0x00 0x51 0x04>;
		};

		gpioi2c {
			compatible = "sstar,infinity-gpioi2c";
			scl-gpio = <0x12>;
			sda-gpio = <0x11>;
			status = "ok";
		};

		emac1 {
			phy-handle = <0x65>;
			compatible = "sstar-emac";
			clocks = <0x5d 0x61 0x62 0x63 0x64>;
			pad = <0x1f203c38 0xf00 0x300>;
			status = "ok";
			interrupts = <0x00 0x54 0x04 0x00 0x75 0x04>;
			reg = <0x1f2a2800 0x800 0x1f344200 0x600 0x00 0x00>;

			mdio-bus@emac1 {

				ethernet-phy@1 {
					phandle = <0x65>;
					phy-mode = "rmii";
					linux,phandle = <0x65>;
				};
			};
		};

		spidev {
			compatible = "spidev";
			status = "ok";
		};

		gpio {
			compatible = "sstar,gpio";
			gpio-controller;
			#gpio-cells = <0x02>;
		};

		uart2@1F221400 {
			compatible = "sstar,uart";
			clocks = <0x5c>;
			status = "ok";
			interrupts = <0x00 0x47 0x04>;
			reg = <0x1f221400 0x100>;
		};

		bdma2 {
			compatible = "sstar,bdma2";
			clocks = <0x66>;
			status = "ok";
			interrupts = <0x00 0x5d 0x04>;
		};

		Sstar-ehci-3 {
			dpdm_swap = <0x00>;
			compatible = "Sstar-ehci-3";
			clocks = <0x05>;
			status = "ok";
			interrupts = <0x00 0x3f 0x04>;
		};

		cmdq0 {
			compatible = "sstar,cmdq0";
			clocks = <0x0d>;
			status = "ok";
			interrupts = <0x00 0x31 0x04>;
		};

		bdma0 {
			compatible = "sstar,bdma0";
			clocks = <0x66>;
			status = "ok";
			interrupts = <0x00 0x48 0x04>;
		};

		pnl {
			compatible = "sstar,pnl";
			clocks = <0x52 0x53 0x16 0x15 0x54>;
			clock-names = "CLK_hdmi\0CLK_dac\0CLK_sc_pixel\0CLK_mipi_tx_dsi\0CLK_mipi_tx_dsi_apb";
			status = "ok";
		};

		Sstar-ehci-1 {
			dpdm_swap = <0x00>;
			compatible = "Sstar-ehci-1";
			clocks = <0x05>;
			status = "ok";
			interrupts = <0x00 0x57 0x04>;
		};

		dec {
			compatible = "sstar,dec";
			status = "ok";
			interrupts = <0x00 0x35 0x04>;
			banks = <0x1137>;
		};

		ircut {
			compatible = "sstar,infinity-ircut";
			ircut-gpio-num = <0x3b>;
			status = "ok";
			interrupt-parent = <0x70>;
			interrupts = <0x14>;
		};

		sata {
			compatible = "sstar,sata\0sstar,sata-ahci";
			clocks = <0x6a 0x6b 0x6c 0x6d>;
			reg-names = "ahci\0ahci_port0\0ahci_misc";
			interrupts = <0x00 0x32 0x04>;
			reg = <0x1f345000 0x100 0x1f345100 0x100 0x1f2a4a00 0x200>;
		};

		ms_pm_intc {
			compatible = "sstar,pm-intc";
			#interrupt-cells = <0x01>;
			interrupt-parent = <0x02>;
			interrupts = <0x00 0x22 0x04>;
			phandle = <0x70>;
			linux,phandle = <0x70>;
			interrupt-controller;
		};

		emmc {
			compatible = "sstar_mci";
			clocks = <0x14 0x14>;
			reset-pin = <0x00>;
			max-clks = <0x02>;
			status = "ok";
			interrupts = <0x00 0x33 0x04>;
			data-driving = <0x00>;
			bus-width = <0x04>;
			clk-driving = <0x00>;
			cmd-driving = <0x00>;
		};

		spi {
			io_phy_addr = <0x1f000000>;
			compatible = "sstar_spi";
			clocks = <0x10>;
			dma = <0x01>;
			spi0_mode = <0x02>;
			status = "ok";
			interrupts = <0x00 0x46 0x04>;
			banks = <0x1110 0x1111 0x1038 0x101e 0x100b>;
		};

		arch_timer {
			compatible = "arm,armv7-timer";
			always-on;
			interrupt-parent = <0x03>;
			interrupts = <0x01 0x0d 0x308 0x01 0x0e 0x308 0x01 0x0b 0x308 0x01 0x0a 0x308>;
			clock-frequency = <0x5b8d80>;
		};

		gop {
			compatible = "sstar,gop";
			status = "ok";
		};

		rtcpwc {
			compatible = "sstar,infinity-rtcpwc";
			clocks = <0x6e>;
			status = "ok";
			interrupts = <0x00 0x4c 0x04>;
			reg = <0x1f006800 0x200>;
		};

		gic@16000000 {
			compatible = "arm,cortex-a7-gic";
			#interrupt-cells = <0x03>;
			interrupt-parent = <0x03>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			phandle = <0x03>;
			reg = <0x16001000 0x1000 0x16002000 0x1000>;
			linux,phandle = <0x03>;
			interrupt-controller;
		};

		uart1@1F221200 {
			compatible = "sstar,uart";
			clocks = <0x5a>;
			status = "ok";
			interrupts = <0x00 0x43 0x04>;
			reg = <0x1f221200 0x100>;
		};

		jpe@0x1F264000 {
			compatible = "sstar,cedric-jpe";
			clocks = <0x67>;
			clock-names = "CKG_jpe";
			clk-select = <0x00>;
			status = "ok";
			interrupts = <0x00 0x3d 0x04>;
			reg = <0x1f264000 0x100>;
		};

		ms_gpi_intc {
			compatible = "sstar,gpi-intc";
			#interrupt-cells = <0x01>;
			interrupt-parent = <0x02>;
			interrupts = <0x00 0x58 0x04>;
			phandle = <0x68>;
			linux,phandle = <0x68>;
			interrupt-controller;
		};

		dip {
			compatible = "sstar,dip";
			clocks = <0x58>;
			status = "ok";
			interrupts = <0x00 0x5f 0x04>;
		};

		hdmitx {
			compatible = "sstar,hdmitx";
			hpd_gpio = <0x59>;
			clocks = <0x52 0x55 0x56>;
			clock-names = "CLK_hdmi\0CLK_disp_432\0CLK_disp_216";
			i2c_id = <0x00>;
			status = "ok";
			i2c_sw = <0x01>;
			i2c_scl_gpio = <0x57>;
			i2c_sda_gpio = <0x58>;
		};

		disp {
			compatible = "sstar,disp";
			clocks = <0x74 0x52 0x53 0x55 0x56>;
			clock-names = "CLK_mop\0CLK_hdmi\0CLK_dac\0CLK_disp_432\0CLK_disp_216";
			status = "ok";
			interrupts = <0x00 0x34 0x04 0x00 0x52 0x04 0x00 0x5b 0x04>;
		};

		uart2@1F220400 {
			compatible = "sstar,uart";
			clocks = <0x5b>;
			sctp_enable = <0x00>;
			dma = <0x00>;
			status = "ok";
			interrupts = <0x00 0x4f 0x04 0x00 0x50 0x04>;
			reg = <0x1f220400 0x100 0x1f220600 0x100>;
		};

		padmux {
			compatible = "sstar-padmux";
			schematic = <0x11 0x00 0x61001 0x12 0x00 0x61000 0x13 0x30 0x20000 0x1f 0x02 0x50000 0x20 0x02 0x50001 0x21 0x02 0x50002 0x22 0x02 0x50003 0x23 0x18 0xc0000 0x24 0x18 0xc0001 0x25 0x18 0xc0002 0x26 0x18 0xc0003 0x29 0x13 0x60100 0x2a 0x13 0x60101 0x2f 0x24 0x70000 0x30 0x24 0x70001 0x31 0x00 0x30000 0x33 0x30 0x20002 0x34 0x30 0x20003 0x35 0x30 0x20004 0x36 0x30 0x20005 0x37 0x30 0x20006 0x38 0x30 0x20007 0x3a 0x30 0x20001 0x3b 0x7a 0x40000 0x47 0x7c 0xd0000 0x48 0x00 0x30001 0x4f 0x7e 0xe0000 0x50 0x7e 0xe0000 0x51 0x7e 0xe0100 0x52 0x7e 0xe0100 0x53 0x7e 0xe0200 0x54 0x7e 0xe0200 0x57 0x0c 0x60000 0x58 0x0c 0x60001 0x55 0x65 0xb0100 0x56 0x65 0xb0101>;
			status = "ok";
		};

		cpufreq {
			compatible = "sstar,infinity-cpufreq";
			status = "ok";
		};

		spinandflash {
			compatible = "ms-spinand";
			clocks = <0x66>;
			status = "ok";
		};

		emac0 {
			phy-handle = <0x60>;
			compatible = "sstar-emac";
			clocks = <0x5d 0x5e 0x5f>;
			pad = <0x1f203c38 0x01 0x00>;
			status = "ok";
			interrupts = <0x00 0x3a 0x04 0x00 0x75 0x04>;
			reg = <0x1f2a2000 0x800 0x1f343c00 0x600 0x1f006200 0x600>;

			mdio-bus@emac0 {

				ethernet-phy@0 {
					phandle = <0x60>;
					phy-mode = "mii";
					linux,phandle = <0x60>;
				};
			};
		};

		watchdog {
			compatible = "sstar,infinity-wdt";
			status = "ok";
			reg = <0x1f006000 0x40>;
		};

		flashisp {
			compatible = "mtd-flashisp";
			clocks = <0x66>;
			status = "ok";
			quadread = <0x00>;
		};

		i2c0@0 {
			compatible = "sstar,i2c";
			clocks = <0x72>;
			i2c-padmux = <0x01>;
			i2c-group = <0x00>;
			i2c-speed = <0x03>;
			status = "ok";
			#address-cells = <0x01>;
			i2c-en-dma = <0x00>;
			#size-cells = <0x00>;
			reg = <0x1f223000 0x200 0x1f203c00 0x200 0x1f207000 0x200>;
		};

		sdmmc {
			interrupts-extended = <0x02 0x00 0x33 0x04 0x02 0x00 0x33 0x04 0x02 0x00 0x77 0x04 0x68 0x2a 0x02 0x00 0x77 0x04>;
			compatible = "sstar,sdmmc";
			clocks = <0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14>;
			slot-pwr-on-delay = <0x01 0x01 0x01>;
			slotnum = <0x01>;
			slot-ip-orders = <0x00 0x01 0x02>;
			slot-fakecdzs = <0x00 0x00 0x00>;
			slot-sdio-use = <0x00 0x00 0x00>;
			slot-max-clks = <0x2dc6c00 0x2dc6c00 0x2dc6c00>;
			status = "ok";
			slot-intcdzs = <0x01 0x01 0x01>;
			slot-en-pwr-high-valid = <0x01 0x00 0x00>;
			slot-cdzs-gpios = <0x3a 0x00 0x00>;
			slot-pwr-off-delay = <0x1e 0x1e 0x1e>;
			slot-pwr-gpios = <0x00 0x00 0x00>;
			slot-pad-orders = <0x00 0x01 0x02>;
			interrupt-names = "mie0_irq\0mie1_irq\0cdz_slot0_irq\0cdz_slot1_irq\0cdz_slot2_irq";
			revcdz = <0x00>;
		};

		bdma3 {
			compatible = "sstar,bdma3";
			clocks = <0x66>;
			status = "ok";
			interrupts = <0x00 0x5e 0x04>;
		};

		sound {
			compatible = "sstar,audio";
			clocks = <0x31>;
			i2s-padmux = <0x03>;
			linein-gain-level = <0x02>;
			status = "ok";
			playback-volume-level = <0x40>;
			interrupts = <0x00 0x4a 0x04>;
			amp-gpio = <0x0c 0x01 0xffff 0x01>;
			micin-pregain-level = <0x00>;
			dmic-hpf = <0x06>;
			i2s-pcm = <0x00>;
			keep-i2s-clk = <0x00>;
			capture-volume-level = <0x40>;
			micin-gain-level = <0x03>;
			digmic-padmux = <0x01>;
		};

		ms_main_intc {
			compatible = "sstar,main-intc";
			#interrupt-cells = <0x03>;
			interrupt-parent = <0x03>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			phandle = <0x02>;
			linux,phandle = <0x02>;
			interrupt-controller;
		};

		sar-gpio {
			compatible = "sstar,sar-gpio";
			interrupts = <0x00 0x78 0x00 0x00 0x79 0x00 0x00 0x7a 0x00 0x00 0x7b 0x00>;
		};

		movdma {
			compatible = "sstar,movdma";
			clocks = <0x0f>;
			status = "ok";
			interrupts = <0x00 0x5c 0x04>;
		};

		bdma1 {
			compatible = "sstar,bdma1";
			clocks = <0x66>;
			status = "ok";
			interrupts = <0x00 0x49 0x04>;
		};

		Sstar-ehci-2 {
			dpdm_swap = <0x00>;
			compatible = "Sstar-ehci-2";
			clocks = <0x05>;
			status = "ok";
			interrupts = <0x00 0x41 0x04>;
		};

		uart0@1F221000 {
			compatible = "sstar,uart";
			clocks = <0x59>;
			status = "ok";
			interrupts = <0x00 0x42 0x04>;
			reg = <0x1f221000 0x100>;
		};

		ge {
			compatible = "sstar,ge";
			clocks = <0x57>;
			status = "ok";
			interrupts = <0x00 0x39 0x04>;
		};

		i2c1@1 {
			compatible = "sstar,i2c";
			clocks = <0x73>;
			i2c-padmux = <0x04>;
			i2c-group = <0x01>;
			i2c-speed = <0x01>;
			status = "ok";
			#address-cells = <0x01>;
			i2c-en-dma = <0x00>;
			#size-cells = <0x00>;
			reg = <0x1f223200 0x200 0x1f203c00 0x200 0x1f207000 0x200>;
		};

		pmu {
			compatible = "arm,cortex-a7-pmu";
			interrupt-parent = <0x03>;
			interrupts = <0x00 0x0a 0x04 0x00 0x10 0x04 0x00 0x16 0x04 0x00 0x1c 0x04>;
		};

		vip {
			compatible = "sstar,vip";
			CMDQ-mode = <0x01>;
			status = "ok";
		};

		core_voltage {
			vid_gpios = <0x31 0x48>;
			vid_width = <0x02>;
			vid_voltages = <0x352 0x384 0x3b6 0x3e8>;
		};

		sar {
			compatible = "sstar,infinity-sar";
			clocks = <0x6f>;
			status = "ok";
			reg = <0x1f002800 0x200>;
		};

		rtc {
			compatible = "sstar,infinity-rtc";
			clocks = <0x6e>;
			status = "disabled";
			interrupts = <0x00 0x4c 0x04>;
			reg = <0x1f002400 0x40>;
		};

		wakeup {
			compatible = "sstar,wakeup-gpio";
			wakeup_num = <0x01>;
			wakeup_source = <0x00 0xffff 0xffff>;
		};

		mmu {
			compatible = "sstar,mmu";
			status = "ok";
			interrupts = <0x00 0x55 0x04>;
		};
	};

	aliases {
		console = "/soc/uart0@1F221000";
		serial3 = "/soc/uart2@1F221400";
		serial1 = "/soc/uart1@1F221200";
		serial2 = "/soc/uart2@1F220400";
		serial0 = "/soc/uart0@1F221000";
	};

	chosen {
		bootargs = "panic=3 rootwait root=/dev/mmcblk0p1 rw clk_ignore_unused";
	};

	memory {
		device_type = "memory";
		reg = <0x20000000 0x8000000>;
	};

	cpus {
		#address-cells = <0x01>;
		#size-cells = <0x00>;

		cpu@1 {
			compatible = "arm,cortex-a7";
			clocks = <0x01>;
			device_type = "cpu";
			reg = <0x01>;
			clock-frequency = <0x3b9aca00>;
			operating-points = <0xf4240 0xdbba0>;
		};

		cpu@0 {
			compatible = "arm,cortex-a7";
			clocks = <0x01>;
			device_type = "cpu";
			reg = <0x00>;
			clock-frequency = <0x3b9aca00>;
			operating-points = <0xf4240 0xdbba0>;
		};
	};
};

Devicetree from /00 file:

/dts-v1/;

/ {
	#address-cells = <0x01>;
	#size-cells = <0x01>;
	model = "INFINITY2M SSC010A-S01A-S";
	compatible = "sstar,infinity2m";

	chosen {
		bootargs = "ubi.mtd=9,2048 root=ubi:SYSTEM rw rootfstype=ubifs init=/linuxrc rootwait=1 LX_MEM=0xFE00000 mma_heap=mma_heap_name0,miu=0,sz=0x2000000";
	};

	aliases {
		console = "/soc/uart0@1F221000";
		serial0 = "/soc/uart0@1F221000";
		serial1 = "/soc/uart1@1F221200";
		serial2 = "/soc/uart2@1F220400";
		serial3 = "/soc/uart2@1F221400";
	};

	memory {
		device_type = "memory";
		reg = <0x20000000 0xfe00000>;
	};

	cpus {
		#address-cells = <0x01>;
		#size-cells = <0x00>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			clock-frequency = <0x3b9aca00>;
			clocks = <0x01>;
			reg = <0x00>;
			operating-points = <0xf4240 0xdbba0>;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			clock-frequency = <0x3b9aca00>;
			clocks = <0x01>;
			reg = <0x01>;
			operating-points = <0xf4240 0xdbba0>;
		};
	};

	soc {
		compatible = "simple-bus";
		interrupt-parent = <0x02>;
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges;

		gic@16000000 {
			compatible = "arm,cortex-a7-gic";
			#interrupt-cells = <0x03>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			interrupt-controller;
			interrupt-parent = <0x03>;
			reg = <0x16001000 0x1000 0x16002000 0x1000>;
			linux,phandle = <0x03>;
			phandle = <0x03>;
		};

		ms_main_intc {
			compatible = "sstar,main-intc";
			#interrupt-cells = <0x03>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			interrupt-parent = <0x03>;
			interrupt-controller;
			linux,phandle = <0x02>;
			phandle = <0x02>;
		};

		ms_pm_intc {
			compatible = "sstar,pm-intc";
			#interrupt-cells = <0x01>;
			interrupt-parent = <0x02>;
			interrupt-controller;
			interrupts = <0x00 0x22 0x04>;
			linux,phandle = <0x70>;
			phandle = <0x70>;
		};

		ms_gpi_intc {
			compatible = "sstar,gpi-intc";
			#interrupt-cells = <0x01>;
			interrupt-parent = <0x02>;
			interrupt-controller;
			interrupts = <0x00 0x58 0x04>;
			linux,phandle = <0x68>;
			phandle = <0x68>;
		};

		arch_timer {
			compatible = "arm,armv7-timer";
			interrupt-parent = <0x03>;
			interrupts = <0x01 0x0d 0x308 0x01 0x0e 0x308 0x01 0x0b 0x308 0x01 0x0a 0x308>;
			clock-frequency = <0x5b8d80>;
			always-on;
		};

		pmu {
			compatible = "arm,cortex-a7-pmu";
			interrupt-parent = <0x03>;
			interrupts = <0x00 0x0a 0x04 0x00 0x10 0x04 0x00 0x16 0x04 0x00 0x1c 0x04>;
		};

		clocks {
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges;

			CLK_VOID {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
				linux,phandle = <0x28>;
				phandle = <0x28>;
			};

			CLK_utmi_480m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x1c9c3800>;
			};

			CLK_mpll_432m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x19bfcc00>;
				linux,phandle = <0x27>;
				phandle = <0x27>;
			};

			CLK_upll_384m {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x04>;
				clock-div = <0x05>;
				clock-mult = <0x04>;
				linux,phandle = <0x31>;
				phandle = <0x31>;
			};

			CLK_upll_320m {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x04>;
				clock-div = <0x03>;
				clock-mult = <0x02>;
				linux,phandle = <0x32>;
				phandle = <0x32>;
			};

			CLK_mpll_288m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x112a8800>;
				linux,phandle = <0x06>;
				phandle = <0x06>;
			};

			CLK_utmi_240m {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x05>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x40>;
				phandle = <0x40>;
			};

			CLK_mpll_216m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0xcdfe600>;
				linux,phandle = <0x07>;
				phandle = <0x07>;
			};

			CLK_utmi_192m {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x05>;
				clock-div = <0x05>;
				clock-mult = <0x02>;
				linux,phandle = <0x0a>;
				phandle = <0x0a>;
			};

			CLK_mpll_172m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0xa4cb800>;
				linux,phandle = <0x2e>;
				phandle = <0x2e>;
			};

			CLK_utmi_160m {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x05>;
				clock-div = <0x03>;
				clock-mult = <0x01>;
				linux,phandle = <0x0b>;
				phandle = <0x0b>;
			};

			CLK_mpll_123m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x75aef40>;
				linux,phandle = <0x08>;
				phandle = <0x08>;
			};

			CLK_mpll_86m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x5265c00>;
				linux,phandle = <0x09>;
				phandle = <0x09>;
			};

			CLK_mpll_288m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x06>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x2f>;
				phandle = <0x2f>;
			};

			CLK_mpll_288m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x06>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x34>;
				phandle = <0x34>;
			};

			CLK_mpll_288m_div8 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x06>;
				clock-div = <0x08>;
				clock-mult = <0x01>;
				linux,phandle = <0x3c>;
				phandle = <0x3c>;
			};

			CLK_mpll_288m_div32 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x06>;
				clock-div = <0x20>;
				clock-mult = <0x01>;
				linux,phandle = <0x44>;
				phandle = <0x44>;
			};

			CLK_mpll_216m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x07>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x33>;
				phandle = <0x33>;
			};

			CLK_mpll_216m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x07>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x30>;
				phandle = <0x30>;
			};

			CLK_mpll_216m_div8 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x07>;
				clock-div = <0x08>;
				clock-mult = <0x01>;
				linux,phandle = <0x4b>;
				phandle = <0x4b>;
			};

			CLK_mpll_123m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x08>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
			};

			CLK_mpll_86m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x09>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x3a>;
				phandle = <0x3a>;
			};

			CLK_mpll_86m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x09>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
			};

			CLK_mpll_86m_div16 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x09>;
				clock-div = <0x10>;
				clock-mult = <0x01>;
			};

			CLK_utmi_192m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0a>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x39>;
				phandle = <0x39>;
			};

			CLK_utmi_160m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0b>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x3b>;
				phandle = <0x3b>;
			};

			CLK_utmi_160m_div5 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0b>;
				clock-div = <0x05>;
				clock-mult = <0x01>;
				linux,phandle = <0x3d>;
				phandle = <0x3d>;
			};

			CLK_utmi_160m_div8 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0b>;
				clock-div = <0x08>;
				clock-mult = <0x01>;
				linux,phandle = <0x3e>;
				phandle = <0x3e>;
			};

			CLK_xtali_12m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0xb71b00>;
				linux,phandle = <0x0c>;
				phandle = <0x0c>;
			};

			CLK_xtali_12m_div8 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x08>;
				clock-mult = <0x01>;
				linux,phandle = <0x2a>;
				phandle = <0x2a>;
			};

			CLK_xtali_12m_div16 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x10>;
				clock-mult = <0x01>;
				linux,phandle = <0x2b>;
				phandle = <0x2b>;
			};

			CLK_xtali_12m_div40 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x28>;
				clock-mult = <0x01>;
				linux,phandle = <0x3f>;
				phandle = <0x3f>;
			};

			CLK_xtali_12m_div64 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x40>;
				clock-mult = <0x01>;
				linux,phandle = <0x2c>;
				phandle = <0x2c>;
			};

			CLK_xtali_12m_div128 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x80>;
				clock-mult = <0x01>;
				linux,phandle = <0x2d>;
				phandle = <0x2d>;
			};

			CLK_xtali_24m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x16e3600>;
				linux,phandle = <0x23>;
				phandle = <0x23>;
			};

			CLK_RTC_CLK_32K {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x7d00>;
			};

			CLK_pm_riu_w_clk_in {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x25>;
				phandle = <0x25>;
			};

			CLK_lpll_clk_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0e>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x41>;
				phandle = <0x41>;
			};

			CLK_lpll_clk_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0e>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x42>;
				phandle = <0x42>;
			};

			CLK_lpll_clk_div8 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0e>;
				clock-div = <0x08>;
				clock-mult = <0x01>;
				linux,phandle = <0x43>;
				phandle = <0x43>;
			};

			CLK_riu_w_clk_in {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x19>;
				phandle = <0x19>;
			};

			CLK_riu_w_clk_top {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x18>;
				phandle = <0x18>;
			};

			CLK_riu_w_clk_sc_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x1a>;
				phandle = <0x1a>;
			};

			CLK_riu_w_clk_vhe_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_riu_w_clk_dec_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x1b>;
				phandle = <0x1b>;
			};

			CLK_riu_w_clk_hemcu_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x1c>;
				phandle = <0x1c>;
			};

			CLK_riu_w_clk_mipi_if_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x1d>;
				phandle = <0x1d>;
			};

			CLK_riu_w_clk_mcu_if_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x1e>;
				phandle = <0x1e>;
			};

			CLK_miu_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x17>;
				phandle = <0x17>;
			};

			CLK_mspi0_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x10>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x36>;
				phandle = <0x36>;
			};

			CLK_mspi1_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x11>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x37>;
				phandle = <0x37>;
			};

			CLK_miu_sc_gp_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x12>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_miu2x_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x13>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x20>;
				phandle = <0x20>;
			};

			CLK_mcu_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x24>;
				phandle = <0x24>;
			};

			CLK_mcu_pm_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_sdio_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x14>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_fcie_p {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
			};

			CLK_tck_buf {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
			};

			CLK_pad2isp_sr_pclk {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
			};

			CLK_csi2_mac_p {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
			};

			CLK_mipi_tx_dsi_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x15>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x45>;
				phandle = <0x45>;
			};

			CLK_sc_pixel_p {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x16>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x47>;
				phandle = <0x47>;
			};

			CLK_ccir_in_clk {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
			};

			CLK_eth_buf {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
				linux,phandle = <0x49>;
				phandle = <0x49>;
			};

			CLK_rmii_buf {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
				linux,phandle = <0x4a>;
				phandle = <0x4a>;
			};

			CLK_emac_testrx125_in_lan {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x01>;
				linux,phandle = <0x38>;
				phandle = <0x38>;
			};

			CLK_armpll_37p125m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x19bfcc00>;
			};

			CLK_hdmi_in {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x19bfcc00>;
				linux,phandle = <0x46>;
				phandle = <0x46>;
			};

			CLK_dac_in {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x19bfcc00>;
				linux,phandle = <0x48>;
				phandle = <0x48>;
			};

			CLK_miu_ff {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x17>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_miu_sc_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x17>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x12>;
				phandle = <0x12>;
			};

			CLK_miu_dec_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x17>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_miu_dig {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_miu_urdma {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_miu_miic0 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_miu_miic1 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_miu_dma0 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0f>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_riu {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x18>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_riu_nogating {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x19>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_riu_sc_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1a>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_riu_dec_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1b>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_riu_hemcu_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1c>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_riu_mipi_gp {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1d>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_riu_mcu_if {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1e>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_miu2x {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x1f>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
				linux,phandle = <0x13>;
				phandle = <0x13>;
			};

			CLK_axi2x {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x20>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_mpll_144m {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x8954400>;
				linux,phandle = <0x21>;
				phandle = <0x21>;
			};

			CLK_mpll_144m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x21>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x4d>;
				phandle = <0x4d>;
			};

			CLK_mpll_144m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x21>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x4c>;
				phandle = <0x4c>;
			};

			CLK_xtali_12m_div2 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x02>;
				clock-mult = <0x01>;
				linux,phandle = <0x50>;
				phandle = <0x50>;
			};

			CLK_xtali_12m_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x51>;
				phandle = <0x51>;
			};

			CLK_xtali_12m_div12 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x0c>;
				clock-div = <0x0c>;
				clock-mult = <0x01>;
				linux,phandle = <0x4e>;
				phandle = <0x4e>;
			};

			CLK_rtc_32k {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x8000>;
				linux,phandle = <0x22>;
				phandle = <0x22>;
			};

			CLK_rtc_32k_div4 {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x22>;
				clock-div = <0x04>;
				clock-mult = <0x01>;
				linux,phandle = <0x4f>;
				phandle = <0x4f>;
			};

			CLK_live_pm {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x23>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_mcu_pm {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x24>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_riu_pm {
				#clock-cells = <0x00>;
				compatible = "fixed-factor-clock";
				clocks = <0x25>;
				clock-div = <0x01>;
				clock-mult = <0x01>;
			};

			CLK_miupll_clk {
				#clock-cells = <0x00>;
				compatible = "sstar,complex-clock";
				clocks = <0x23>;
				linux,phandle = <0x29>;
				phandle = <0x29>;
			};

			CLK_ddrpll_clk {
				#clock-cells = <0x00>;
				compatible = "sstar,complex-clock";
				clocks = <0x26>;
				linux,phandle = <0x1f>;
				phandle = <0x1f>;
			};

			CLK_lpll_clk {
				#clock-cells = <0x00>;
				compatible = "sstar,complex-clock";
				clocks = <0x27>;
				linux,phandle = <0x0e>;
				phandle = <0x0e>;
			};

			CLK_cpupll_clk {
				#clock-cells = <0x00>;
				compatible = "sstar,complex-clock";
				clocks = <0x27>;
				linux,phandle = <0x01>;
				phandle = <0x01>;
			};

			CLK_utmi {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x1c9c3800>;
				linux,phandle = <0x05>;
				phandle = <0x05>;
			};

			CLK_upll {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0x1c9c3800>;
				linux,phandle = <0x04>;
				phandle = <0x04>;
			};

			CLK_fuart0_synth_out {
				#clock-cells = <0x00>;
				compatible = "fixed-clock";
				clock-frequency = <0xb71b000>;
				linux,phandle = <0x35>;
				phandle = <0x35>;
			};

			CLK_miu {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x1f 0x28 0x29 0x07>;
				reg = <0x1f20705c 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				glitch-shift = <0x04>;
				auto-enable = <0x01>;
				linux,phandle = <0x0f>;
				phandle = <0x0f>;
			};

			CLK_miu_xd2miu {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0f>;
				reg = <0x1f203c84 0x04>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
			};

			CLK_bdma {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x17 0x28 0x28 0x28>;
				reg = <0x1f207180 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x66>;
				phandle = <0x66>;
			};

			CLK_ddr_syn {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x27 0x07 0x0c 0x28>;
				reg = <0x1f207064 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0x26>;
				phandle = <0x26>;
			};

			CLK_miu_rec {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x2a 0x2b 0x2c 0x2d>;
				reg = <0x1f207060 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
			};

			CLK_mcu {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x2e 0x2f 0x30 0x27 0x31 0x32 0x33>;
				reg = <0x1f207004 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				glitch-shift = <0x05>;
				auto-enable = <0x01>;
				linux,phandle = <0x0d>;
				phandle = <0x0d>;
			};

			CLK_riubrdg {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x24 0x28 0x28 0x28>;
				reg = <0x1f207004 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
			};

			CLK_spi {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x33 0x09 0x34 0x17 0x28 0x28 0x28>;
				reg = <0x1f001c80 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x03>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
			};

			CLK_uart0 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x2f 0x0c 0x28>;
				reg = <0x1f2070c4 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x59>;
				phandle = <0x59>;
			};

			CLK_uart1 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x2f 0x0c 0x28>;
				reg = <0x1f2070c4 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				linux,phandle = <0x5a>;
				phandle = <0x5a>;
			};

			CLK_uart2 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x2f 0x0c 0x28>;
				reg = <0x1f2070c4 0x04>;
				mux-shift = <0x0e>;
				mux-width = <0x02>;
				gate-shift = <0x0c>;
				linux,phandle = <0x5c>;
				phandle = <0x5c>;
			};

			CLK_fuart0_synth_in {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x27 0x07 0x28 0x28>;
				reg = <0x1f2070d0 0x04>;
				mux-shift = <0x06>;
				mux-width = <0x02>;
				gate-shift = <0x04>;
				auto-enable = <0x01>;
			};

			CLK_fuart {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x2f 0x0c 0x35>;
				reg = <0x1f2070d0 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x5b>;
				phandle = <0x5b>;
			};

			CLK_mspi0 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x33 0x30 0x0c 0x2f>;
				reg = <0x1f2070cc 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x10>;
				phandle = <0x10>;
			};

			CLK_mspi1 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x33 0x30 0x0c 0x2f>;
				reg = <0x1f2070cc 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				linux,phandle = <0x11>;
				phandle = <0x11>;
			};

			CLK_mspi {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x36 0x37>;
				reg = <0x1f2070cc 0x04>;
				mux-shift = <0x0e>;
				mux-width = <0x01>;
				gate-shift = <0x0c>;
			};

			CLK_miic0 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x34 0x30 0x0c 0x28>;
				reg = <0x1f2070dc 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x72>;
				phandle = <0x72>;
			};

			CLK_miic1 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x34 0x30 0x0c 0x28>;
				reg = <0x1f2070dc 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				linux,phandle = <0x73>;
				phandle = <0x73>;
			};

			CLK_bist {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x33 0x30 0x0c>;
				reg = <0x1f207008 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
			};

			CLK_pwr_ctl {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x2b 0x2a 0x0c 0x28>;
				reg = <0x1f207010 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
			};

			CLK_xtali {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x28 0x28 0x28>;
				reg = <0x1f207000 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
			};

			CLK_live_c {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x28 0x28 0x28>;
				reg = <0x1f207000 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
			};

			CLK_live {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x28 0x28 0x28>;
				reg = <0x1f207000 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
			};

			CLK_sata_phy_108 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x33 0x28 0x28 0x28>;
				reg = <0x1f207118 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x6c>;
				phandle = <0x6c>;
			};

			CLK_sata_phy_432 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x27 0x28 0x28 0x28>;
				reg = <0x1f207118 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				linux,phandle = <0x6d>;
				phandle = <0x6d>;
			};

			CLK_disp_432 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x27 0x28 0x28 0x28>;
				reg = <0x1f20714c 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0x55>;
				phandle = <0x55>;
			};

			CLK_bist_dec_gp {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x33 0x30 0x0c>;
				reg = <0x1f20715c 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
			};

			CLK_dec_pclk {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x2f 0x33 0x28>;
				reg = <0x1f207154 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
			};

			CLK_dec_aclk {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x32 0x31 0x06 0x07>;
				reg = <0x1f207154 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
			};

			CLK_dec_bclk {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x06 0x32 0x07 0x2e 0x09 0x30 0x28 0x28>;
				reg = <0x1f2071f8 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
			};

			CLK_dec_cclk {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x31 0x27 0x06 0x07 0x33 0x30 0x28 0x28>;
				reg = <0x1f2071f8 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x03>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
			};

			CLK_xtali_sc_gp {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x28 0x28 0x28>;
				reg = <0x1f207000 0x04>;
				mux-shift = <0x06>;
				mux-width = <0x02>;
				gate-shift = <0x04>;
			};

			CLK_bist_sc_gp {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x2e 0x33 0x30 0x0c>;
				reg = <0x1f20700c 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
			};

			CLK_emac_ahb {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x2f 0x08 0x09 0x38>;
				reg = <0x1f207108 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x5d>;
				phandle = <0x5d>;
			};

			CLK_jpe {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x28 0x28 0x28 0x32 0x06 0x07 0x28 0x28>;
				reg = <0x1f2071a8 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				linux,phandle = <0x67>;
				phandle = <0x67>;
			};

			CLK_aesdma {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x09 0x2e 0x28 0x28>;
				reg = <0x1f207184 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				glitch-shift = <0x04>;
				linux,phandle = <0x69>;
				phandle = <0x69>;
			};

			CLK_sdio {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x0c 0x3f>;
				reg = <0x1f207114 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				linux,phandle = <0x14>;
				phandle = <0x14>;
			};

			CLK_dip {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x32 0x31 0x07 0x0a 0x2e 0x0b 0x28 0x28>;
				reg = <0x1f207148 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				linux,phandle = <0x58>;
				phandle = <0x58>;
			};

			CLK_ge {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x17 0x07 0x2e 0x2f 0x32 0x31 0x27 0x28>;
				reg = <0x1f207144 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				linux,phandle = <0x57>;
				phandle = <0x57>;
			};

			CLK_mop {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x32 0x31 0x06 0x40>;
				reg = <0x1f207150 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0x74>;
				phandle = <0x74>;
			};

			CLK_disp_216 {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x07 0x33>;
				reg = <0x1f20714c 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				gate-shift = <0x08>;
				auto-enable = <0x01>;
				linux,phandle = <0x56>;
				phandle = <0x56>;
			};

			CLK_sc_pixel {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x40 0x07 0x0a 0x2e 0x2f 0x08 0x33 0x09 0x34 0x30 0x0e 0x41 0x42 0x43 0x3c 0x44>;
				reg = <0x1f20718c 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x04>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0x16>;
				phandle = <0x16>;
			};

			CLK_sata_pm {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x33 0x0c 0x23 0x08>;
				reg = <0x1f2071b0 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x02>;
				gate-shift = <0x08>;
				linux,phandle = <0x6b>;
				phandle = <0x6b>;
			};

			CLK_sata_axi {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x40 0x06 0x28 0x28>;
				reg = <0x1f2071b8 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x6a>;
				phandle = <0x6a>;
			};

			CLK_mipi_tx_dsi {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0e 0x0b 0x2f 0x33 0x07 0x40 0x28 0x28>;
				reg = <0x1f2071bc 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x03>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0x15>;
				phandle = <0x15>;
			};

			CLK_mipi_tx_dsi_apb {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x24 0x45 0x28 0x28>;
				reg = <0x1f2266dc 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0x54>;
				phandle = <0x54>;
			};

			CLK_hdmi {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x46 0x47 0x28 0x28>;
				reg = <0x1f2266d4 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0x52>;
				phandle = <0x52>;
			};

			CLK_dac {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x48 0x46 0x28 0x28>;
				reg = <0x1f2266d8 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
				linux,phandle = <0x53>;
				phandle = <0x53>;
			};

			CLK_emac1_tx {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x49 0x4a>;
				reg = <0x1f2266d0 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x01>;
				gate-shift = <0x00>;
				linux,phandle = <0x61>;
				phandle = <0x61>;
			};

			CLK_emac1_rx {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x49 0x4a>;
				reg = <0x1f2266cc 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x01>;
				gate-shift = <0x00>;
				linux,phandle = <0x62>;
				phandle = <0x62>;
			};

			CLK_emac1_tx_ref {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x4a 0x28>;
				reg = <0x1f2266d0 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				gate-shift = <0x08>;
				linux,phandle = <0x63>;
				phandle = <0x63>;
			};

			CLK_emac1_rx_ref {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x4a 0x28>;
				reg = <0x1f2266cc 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				gate-shift = <0x08>;
				linux,phandle = <0x64>;
				phandle = <0x64>;
			};

			CLK_emac_tx {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x49 0x4a>;
				reg = <0x1f22668c 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x01>;
				gate-shift = <0x00>;
				linux,phandle = <0x5e>;
				phandle = <0x5e>;
			};

			CLK_emac_rx {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x49 0x4a>;
				reg = <0x1f226688 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x01>;
				gate-shift = <0x00>;
				linux,phandle = <0x5f>;
				phandle = <0x5f>;
			};

			CLK_emac_tx_ref {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x4a 0x28>;
				reg = <0x1f22668c 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				gate-shift = <0x08>;
			};

			CLK_emac_rx_ref {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x4a 0x28>;
				reg = <0x1f226688 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x01>;
				gate-shift = <0x08>;
			};

			CLK_hemcu_216m {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x07>;
				reg = <0x1f2071b4 0x04>;
				gate-shift = <0x00>;
				auto-enable = <0x01>;
			};

			CLK_spi_pm {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x22 0x4b 0x4c 0x3a 0x30 0x4d 0x09 0x33 0x2a 0x4e 0x4f 0x2b 0x50 0x51 0x0c 0x23>;
				reg = <0x1f001c80 0x04>;
				mux-shift = <0x0a>;
				mux-width = <0x04>;
				gate-shift = <0x08>;
				glitch-shift = <0x0e>;
				auto-enable = <0x01>;
			};

			CLK_pm_sleep {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x22 0x2a 0x4e 0x4f 0x2b 0x50 0x51>;
				reg = <0x1f001c88 0x04>;
				mux-shift = <0x0c>;
				mux-width = <0x03>;
				auto-enable = <0x01>;
			};

			CLK_pwm {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x22 0x2a 0x4e 0x4f 0x09 0x50 0x51>;
				reg = <0x1f001c70 0x04>;
				mux-shift = <0x0c>;
				mux-width = <0x03>;
			};

			CLK_sar {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x22 0x2a 0x4e 0x4f 0x2b 0x50 0x51>;
				reg = <0x1f001c88 0x04>;
				mux-shift = <0x07>;
				mux-width = <0x03>;
				gate-shift = <0x05>;
				auto-enable = <0x01>;
				linux,phandle = <0x6f>;
				phandle = <0x6f>;
			};

			CLK_rtc {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x22 0x28 0x28>;
				reg = <0x1f001c88 0x04>;
				mux-shift = <0x02>;
				mux-width = <0x02>;
				gate-shift = <0x00>;
				linux,phandle = <0x6e>;
				phandle = <0x6e>;
			};

			CLK_ir {
				#clock-cells = <0x00>;
				compatible = "sstar,composite-clock";
				clocks = <0x0c 0x22 0x2a 0x4e 0x4f 0x2b 0x50 0x51>;
				reg = <0x1f001c84 0x04>;
				mux-shift = <0x07>;
				mux-width = <0x03>;
				gate-shift = <0x05>;
				linux,phandle = <0x71>;
				phandle = <0x71>;
			};
		};

		dec {
			compatible = "sstar,dec";
			banks = <0x1137>;
			interrupts = <0x00 0x35 0x04>;
			status = "ok";
		};

		vip {
			compatible = "sstar,vip";
			status = "ok";
			CMDQ-mode = <0x01>;
		};

		pnl {
			compatible = "sstar,pnl";
			status = "ok";
			clocks = <0x52 0x53 0x16 0x15 0x54>;
			clock-names = "CLK_hdmi\0CLK_dac\0CLK_sc_pixel\0CLK_mipi_tx_dsi\0CLK_mipi_tx_dsi_apb";
		};

		hdmitx {
			compatible = "sstar,hdmitx";
			status = "ok";
			i2c_id = <0x00>;
			hpd_gpio = <0x59>;
			i2c_sw = <0x01>;
			i2c_sda_gpio = <0x58>;
			i2c_scl_gpio = <0x57>;
			clocks = <0x52 0x55 0x56>;
			clock-names = "CLK_hdmi\0CLK_disp_432\0CLK_disp_216";
		};

		ge {
			compatible = "sstar,ge";
			status = "ok";
			clocks = <0x57>;
			interrupts = <0x00 0x39 0x04>;
		};

		gop {
			compatible = "sstar,gop";
			status = "ok";
		};

		dip {
			compatible = "sstar,dip";
			clocks = <0x58>;
			interrupts = <0x00 0x5f 0x04>;
			status = "ok";
		};

		cmdq0 {
			compatible = "sstar,cmdq0";
			clocks = <0x0d>;
			interrupts = <0x00 0x31 0x04>;
			status = "ok";
		};

		uart0@1F221000 {
			compatible = "sstar,uart";
			reg = <0x1f221000 0x100>;
			interrupts = <0x00 0x42 0x04>;
			clocks = <0x59>;
			status = "ok";
		};

		uart1@1F221200 {
			compatible = "sstar,uart";
			reg = <0x1f221200 0x100>;
			interrupts = <0x00 0x43 0x04>;
			clocks = <0x5a>;
			status = "ok";
		};

		uart2@1F220400 {
			compatible = "sstar,uart";
			reg = <0x1f220400 0x100 0x1f220600 0x100>;
			interrupts = <0x00 0x4f 0x04 0x00 0x50 0x04>;
			clocks = <0x5b>;
			dma = <0x00>;
			sctp_enable = <0x00>;
			status = "ok";
		};

		uart2@1F221400 {
			compatible = "sstar,uart";
			reg = <0x1f221400 0x100>;
			interrupts = <0x00 0x47 0x04>;
			clocks = <0x5c>;
			status = "ok";
		};

		emac0 {
			compatible = "sstar-emac";
			interrupts = <0x00 0x3a 0x04 0x00 0x75 0x04>;
			clocks = <0x5d 0x5e 0x5f>;
			reg = <0x1f2a2000 0x800 0x1f343c00 0x600 0x1f006200 0x600>;
			pad = <0x1f203c38 0x01 0x00>;
			phy-handle = <0x60>;
			status = "ok";

			mdio-bus@emac0 {

				ethernet-phy@0 {
					phy-mode = "mii";
					linux,phandle = <0x60>;
					phandle = <0x60>;
				};
			};
		};

		emac1 {
			compatible = "sstar-emac";
			interrupts = <0x00 0x54 0x04 0x00 0x75 0x04>;
			clocks = <0x5d 0x61 0x62 0x63 0x64>;
			reg = <0x1f2a2800 0x800 0x1f344200 0x600 0x00 0x00>;
			pad = <0x1f203c38 0xf00 0x300>;
			status = "ok";
			phy-handle = <0x65>;

			mdio-bus@emac1 {

				ethernet-phy@1 {
					phy-mode = "rmii";
					linux,phandle = <0x65>;
					phandle = <0x65>;
				};
			};
		};

		flashisp {
			compatible = "mtd-flashisp";
			clocks = <0x66>;
			quadread = <0x00>;
			status = "ok";
		};

		spinandflash {
			compatible = "ms-spinand";
			clocks = <0x66>;
			status = "ok";
		};

		spi {
			compatible = "sstar_spi";
			io_phy_addr = <0x1f000000>;
			banks = <0x1110 0x1111 0x1038 0x101e 0x100b>;
			clocks = <0x10>;
			interrupts = <0x00 0x46 0x04>;
			dma = <0x01>;
			spi0_mode = <0x02>;
			status = "ok";
		};

		spidev {
			compatible = "spidev";
			status = "ok";
		};

		Sstar-ehci-1 {
			compatible = "Sstar-ehci-1";
			clocks = <0x05>;
			interrupts = <0x00 0x57 0x04>;
			dpdm_swap = <0x00>;
			status = "ok";
		};

		Sstar-ehci-2 {
			compatible = "Sstar-ehci-2";
			clocks = <0x05>;
			interrupts = <0x00 0x41 0x04>;
			dpdm_swap = <0x00>;
			status = "ok";
		};

		jpe@0x1F264000 {
			compatible = "sstar,cedric-jpe";
			reg = <0x1f264000 0x100>;
			interrupts = <0x00 0x3d 0x04>;
			clocks = <0x67>;
			clock-names = "CKG_jpe";
			clk-select = <0x00>;
			status = "ok";
		};

		gpio {
			compatible = "sstar,gpio";
			#gpio-cells = <0x02>;
			gpio-controller;
		};

		sar-gpio {
			compatible = "sstar,sar-gpio";
			interrupts = <0x00 0x78 0x00 0x00 0x79 0x00 0x00 0x7a 0x00 0x00 0x7b 0x00>;
		};

		wakeup {
			compatible = "sstar,wakeup-gpio";
			wakeup_num = <0x01>;
			wakeup_source = <0x00 0xffff 0xffff>;
		};

		sound {
			compatible = "sstar,audio";
			interrupts = <0x00 0x4a 0x04>;
			playback-volume-level = <0x40>;
			capture-volume-level = <0x40>;
			micin-pregain-level = <0x00>;
			micin-gain-level = <0x03>;
			linein-gain-level = <0x02>;
			amp-gpio = <0x0c 0x01 0xffff 0x01>;
			clocks = <0x31>;
			digmic-padmux = <0x01>;
			i2s-padmux = <0x03>;
			keep-i2s-clk = <0x00>;
			i2s-pcm = <0x00>;
			dmic-hpf = <0x06>;
			status = "ok";
		};

		emmc {
			compatible = "sstar_mci";
			clocks = <0x14 0x14>;
			interrupts = <0x00 0x33 0x04>;
			bus-width = <0x04>;
			reset-pin = <0x00>;
			max-clks = <0x02>;
			clk-driving = <0x00>;
			cmd-driving = <0x00>;
			data-driving = <0x00>;
			status = "ok";
		};

		sdmmc {
			compatible = "sstar,sdmmc";
			slotnum = <0x01>;
			revcdz = <0x00>;
			slot-ip-orders = <0x00 0x01 0x02>;
			slot-pad-orders = <0x00 0x01 0x02>;
			slot-max-clks = <0x2dc6c00 0x2dc6c00 0x2dc6c00>;
			slot-intcdzs = <0x01 0x01 0x01>;
			slot-fakecdzs = <0x00 0x00 0x00>;
			slot-cdzs-gpios = <0x3a 0x00 0x00>;
			slot-pwr-gpios = <0x00 0x00 0x00>;
			slot-en-pwr-high-valid = <0x01 0x00 0x00>;
			slot-pwr-off-delay = <0x1e 0x1e 0x1e>;
			slot-pwr-on-delay = <0x01 0x01 0x01>;
			slot-sdio-use = <0x00 0x00 0x00>;
			interrupts-extended = <0x02 0x00 0x33 0x04 0x02 0x00 0x33 0x04 0x02 0x00 0x77 0x04 0x68 0x2a 0x02 0x00 0x77 0x04>;
			interrupt-names = "mie0_irq\0mie1_irq\0cdz_slot0_irq\0cdz_slot1_irq\0cdz_slot2_irq";
			clocks = <0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14>;
			status = "ok";
		};

		aesdma {
			compatible = "sstar,infinity-aes";
			clocks = <0x69>;
			status = "ok";
		};

		bdma0 {
			compatible = "sstar,bdma0";
			interrupts = <0x00 0x48 0x04>;
			clocks = <0x66>;
			status = "ok";
		};

		bdma1 {
			compatible = "sstar,bdma1";
			interrupts = <0x00 0x49 0x04>;
			clocks = <0x66>;
			status = "ok";
		};

		bdma2 {
			compatible = "sstar,bdma2";
			interrupts = <0x00 0x5d 0x04>;
			clocks = <0x66>;
			status = "ok";
		};

		bdma3 {
			compatible = "sstar,bdma3";
			interrupts = <0x00 0x5e 0x04>;
			clocks = <0x66>;
			status = "ok";
		};

		movdma {
			compatible = "sstar,movdma";
			interrupts = <0x00 0x5c 0x04>;
			clocks = <0x0f>;
			status = "ok";
		};

		sata {
			compatible = "sstar,sata\0sstar,sata-ahci";
			reg-names = "ahci\0ahci_port0\0ahci_misc";
			reg = <0x1f345000 0x100 0x1f345100 0x100 0x1f2a4a00 0x200>;
			interrupts = <0x00 0x32 0x04>;
			clocks = <0x6a 0x6b 0x6c 0x6d>;
		};

		rtc {
			compatible = "sstar,infinity-rtc";
			reg = <0x1f002400 0x40>;
			interrupts = <0x00 0x4c 0x04>;
			clocks = <0x6e>;
			status = "disabled";
		};

		rtcpwc {
			compatible = "sstar,infinity-rtcpwc";
			reg = <0x1f006800 0x200>;
			interrupts = <0x00 0x4c 0x04>;
			clocks = <0x6e>;
			status = "ok";
		};

		cpufreq {
			compatible = "sstar,infinity-cpufreq";
			status = "ok";
		};

		core_voltage {
			vid_width = <0x02>;
			vid_gpios = <0x31 0x48>;
			vid_voltages = <0x352 0x384 0x3b6 0x3e8>;
		};

		watchdog {
			compatible = "sstar,infinity-wdt";
			reg = <0x1f006000 0x40>;
			status = "ok";
		};

		sar {
			compatible = "sstar,infinity-sar";
			reg = <0x1f002800 0x200>;
			clocks = <0x6f>;
			status = "ok";
		};

		ircut {
			compatible = "sstar,infinity-ircut";
			ircut-gpio-num = <0x3b>;
			interrupt-parent = <0x70>;
			interrupts = <0x14>;
			status = "ok";
		};

		ir@1F007A00 {
			compatible = "sstar,infinity-ir";
			reg = <0x1f007a00 0x1000>;
			clocks = <0x71>;
			interrupts = <0x00 0x63 0x04>;
			status = "ok";
		};

		pwm {
			compatible = "sstar,infinity-pwm";
			reg = <0x1f003400 0x600>;
			clocks = <0x0c>;
			npwm = <0x04>;
			pad-ctrl = <0xffff 0xffff 0xffff 0xffff>;
			status = "disabled";
		};

		miu {
			compatible = "sstar,miu";
			interrupts = <0x00 0x51 0x04>;
			status = "ok";
		};

		mmu {
			compatible = "sstar,mmu";
			interrupts = <0x00 0x55 0x04>;
			status = "ok";
		};

		i2c0@0 {
			compatible = "sstar,i2c";
			reg = <0x1f223000 0x200 0x1f203c00 0x200 0x1f207000 0x200>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x72>;
			i2c-group = <0x00>;
			i2c-padmux = <0x01>;
			i2c-speed = <0x03>;
			i2c-en-dma = <0x00>;
			status = "ok";
		};

		i2c1@1 {
			compatible = "sstar,i2c";
			reg = <0x1f223200 0x200 0x1f203c00 0x200 0x1f207000 0x200>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x73>;
			i2c-group = <0x01>;
			i2c-padmux = <0x04>;
			i2c-speed = <0x01>;
			i2c-en-dma = <0x00>;
			status = "ok";
		};

		gpioi2c {
			compatible = "sstar,infinity-gpioi2c";
			sda-gpio = <0x11>;
			scl-gpio = <0x12>;
			status = "ok";
		};

		Sstar-ehci-3 {
			compatible = "Sstar-ehci-3";
			clocks = <0x05>;
			interrupts = <0x00 0x3f 0x04>;
			dpdm_swap = <0x00>;
			status = "ok";
		};

		disp {
			compatible = "sstar,disp";
			status = "ok";
			interrupts = <0x00 0x34 0x04 0x00 0x52 0x04 0x00 0x5b 0x04>;
			clocks = <0x74 0x52 0x53 0x55 0x56>;
			clock-names = "CLK_mop\0CLK_hdmi\0CLK_dac\0CLK_disp_432\0CLK_disp_216";
		};

		padmux {
			compatible = "sstar-padmux";
			schematic = <0x11 0x00 0x61001 0x12 0x00 0x61000 0x13 0x30 0x20000 0x1f 0x02 0x50000 0x20 0x02 0x50001 0x21 0x02 0x50002 0x22 0x02 0x50003 0x23 0x18 0xc0000 0x24 0x18 0xc0001 0x25 0x18 0xc0002 0x26 0x18 0xc0003 0x29 0x13 0x60100 0x2a 0x13 0x60101 0x2f 0x24 0x70000 0x30 0x24 0x70001 0x31 0x00 0x30000 0x33 0x30 0x20002 0x34 0x30 0x20003 0x35 0x30 0x20004 0x36 0x30 0x20005 0x37 0x30 0x20006 0x38 0x30 0x20007 0x3a 0x30 0x20001 0x3b 0x7a 0x40000 0x47 0x7c 0xd0000 0x48 0x00 0x30001 0x4f 0x7e 0xe0000 0x50 0x7e 0xe0000 0x51 0x7e 0xe0100 0x52 0x7e 0xe0100 0x53 0x7e 0xe0200 0x54 0x7e 0xe0200 0x57 0x0c 0x60000 0x58 0x0c 0x60001 0x55 0x65 0xb0100 0x56 0x65 0xb0101>;
			status = "ok";
		};
	};

	reserved-memory {
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges;
	};
};

Kernel file is located in /GustardCore

You can download full filesystem from here.

0 replies

fifteenhex · 2022-10-15T05:19:15Z

fifteenhex
Oct 15, 2022
Maintainer

Hi,

This looks like it's based on the wireless tag ssd202d module.
The info here should help: https://github.com/fifteenhex/buildroot_idosom2d01

1 reply

NoaHimesaka1873 Oct 15, 2022
Author

Hi,

This looks like it's based on the wireless tag ssd202d module.

The info here should help: https://github.com/fifteenhex/buildroot_idosom2d01

Thanks. But how can I utilize this to compile and package kernel to Debian? I'm planning to reuse vendor-provided Debian. I'm new to ARM/embedded Linux so sorry for noob question.

ltrsunny · 2022-10-27T10:12:05Z

ltrsunny
Oct 27, 2022

The kernel from this project cannot work stably on R26 for now because of the bugs in SDIO’s driver. We will be happy if you can help to fix it.

0 replies

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Interesting device with SSD202D and how to build kernel for it #71

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