From 056c1859f8d4427024f426878be59a787cff0e7c Mon Sep 17 00:00:00 2001 From: Kuai Wei Date: Wed, 24 Jan 2024 21:33:10 +0800 Subject: [PATCH] Add AlwaysMergeDMB option --- src/hotspot/cpu/aarch64/globals_aarch64.hpp | 2 ++ src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp | 4 ++-- src/hotspot/cpu/aarch64/vm_version_aarch64.cpp | 3 +++ 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/hotspot/cpu/aarch64/globals_aarch64.hpp b/src/hotspot/cpu/aarch64/globals_aarch64.hpp index b26eaa4bfcdd8..f4b081dd702b5 100644 --- a/src/hotspot/cpu/aarch64/globals_aarch64.hpp +++ b/src/hotspot/cpu/aarch64/globals_aarch64.hpp @@ -127,6 +127,8 @@ define_pd_global(intx, InlineSmallCode, 1000); range(1, 99) \ product(ccstr, UseBranchProtection, "none", \ "Branch Protection to use: none, standard, pac-ret") \ + product(bool, AlwaysMergeDMB, false, \ + "Always merge DMB instructions in code emission") \ // end of ARCH_FLAGS diff --git a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp index 006787a3b01f7..1c1e2e28942f2 100644 --- a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp @@ -2067,9 +2067,9 @@ void MacroAssembler::membar(Membar_mask_bits order_constraint) { if (last != nullptr && nativeInstruction_at(last)->is_Membar() && prev == last) { NativeMembar *bar = NativeMembar_at(prev); // Don't promote DMB ST|DMB LD to DMB (a full barrier) because - // doing so would introduce a StoreLoad which the caller did not + // doing so would introduce a StoreLoad which the caller did not // intend - if (bar->get_kind() == order_constraint + if (AlwaysMergeDMB || bar->get_kind() == order_constraint || bar->get_kind() == AnyAny || order_constraint == AnyAny) { // We are merging two memory barrier instructions. On AArch64 we diff --git a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp index f7fe2f7dec81a..baf8ba59476d0 100644 --- a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp @@ -183,6 +183,9 @@ void VM_Version::initialize() { if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) { FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true); } + if (FLAG_IS_DEFAULT(AlwaysMergeDMB)) { + FLAG_SET_DEFAULT(AlwaysMergeDMB, true); + } } // Cortex A53