From 8a67181de3d2d65a245db9bd7fcf3b7d9ffdde61 Mon Sep 17 00:00:00 2001 From: Kuai Wei Date: Thu, 11 Jul 2024 11:45:56 +0800 Subject: [PATCH] poc of lightweight native memory barrier --- src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp b/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp index 02bb1d90607..6704e9ed1a4 100644 --- a/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp @@ -1881,10 +1881,15 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, if(os::is_MP()) { if (UseMembar) { - __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset())); + if(UseNewCode2) { + __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset())); + __ stlrw(rscratch1, rscratch2); + } else { + __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset())); - // Force this write out before the read below - __ dmb(Assembler::ISH); + // Force this write out before the read below + __ dmb(Assembler::ISH); + } } else { __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset())); __ stlrw(rscratch1, rscratch2);