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musca_a.sct
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musca_a.sct
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#! armclang --target=arm-arm-none-eabi -march=armv8-m.main -E -xc
;/*
; * Copyright (c) 2017 ARM Limited
; *
; * Licensed under the Apache License, Version 2.0 (the "License");
; * you may not use this file except in compliance with the License.
; * You may obtain a copy of the License at
; *
; * http://www.apache.org/licenses/LICENSE-2.0
; *
; * Unless required by applicable law or agreed to in writing, software
; * distributed under the License is distributed on an "AS IS" BASIS,
; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; * See the License for the specific language governing permissions and
; * limitations under the License.
; *
; */
#include "./common/region_defs.h"
LR_CODE 0x10200000 {
ER_CODE 0x10200000 0x10000 {
*.o (VECTOR +First)
*.o (RESET)
.ANY (+RO)
}
/*
* Place the CMSE Veneers (containing the SG instruction) after the code, in a
* separate 32 bytes aligned region so that the SAU can programmed to just set
* this region as Non-Secure Callable. The maximum size of this executable
* region makes it only used the space left over by the ER_CODE region
* so that you can rely on code+veneer size combined will not exceed the
* S_CODE_SIZE value. We also substract from the available space the
* area used to align this section on 32 bytes boundary (for SAU conf).
*/
ER_CODE_CMSE_VENEER +0 ALIGN 32 VENEER_SIZE {
*(Veneer$$CMSE)
}
/*
* This dummy region ensures that the next one will be aligned on a 32 bytes boundary,
* so that the following region will not be mistakenly configured as Non-Secure Callable
* by the SAU.
*/
/*
ER_CODE_CMSE_VENEER_DUMMY +0 ALIGN 32 {}
*/
ER_DATA 0x30000000 0x3000 {
.ANY (+ZI +RW)
}
}
TEST_CODE 0x10210000 0x20000
{
TEST_ROM +0
{
test_code_image.o(_image)
}
}