From 22e404a2c81aa1d4510603459b9921a336973715 Mon Sep 17 00:00:00 2001
From: Jiaan Lu <jiaan.lu@intel.com>
Date: Fri, 31 May 2024 23:12:24 +0800
Subject: [PATCH] prefetchi: add 1 BAT case

Signed-off-by: Jiaan Lu <jiaan.lu@intel.com>
---
 BM/README.md                       |  1 +
 BM/cmpccxadd/.vscode/settings.json |  5 -----
 BM/prefetchi/Makefile              | 12 ++++++++++++
 BM/prefetchi/README.md             | 13 +++++++++++++
 BM/prefetchi/prefetchi.c           | 29 +++++++++++++++++++++++++++++
 README.md                          |  1 +
 6 files changed, 56 insertions(+), 5 deletions(-)
 delete mode 100644 BM/cmpccxadd/.vscode/settings.json
 create mode 100644 BM/prefetchi/Makefile
 create mode 100644 BM/prefetchi/README.md
 create mode 100644 BM/prefetchi/prefetchi.c

diff --git a/BM/README.md b/BM/README.md
index 6915820f..45246368 100644
--- a/BM/README.md
+++ b/BM/README.md
@@ -13,6 +13,7 @@
   * [IFS(In Field Scan)](ifs/README.md)
   * [ISST](isst/README.md)
   * [PMU](pmu/README.md)
+  * [PREFETCHI(Code SW Prefetch)](prefetchi/README.md)
   * [pstate](pstate/README.md)
   * [Intel_PT](pt/README.md)
   * [RAPL](rapl/README.md)
diff --git a/BM/cmpccxadd/.vscode/settings.json b/BM/cmpccxadd/.vscode/settings.json
deleted file mode 100644
index 61168feb..00000000
--- a/BM/cmpccxadd/.vscode/settings.json
+++ /dev/null
@@ -1,5 +0,0 @@
-{
-    "files.associations": {
-        "limits.h": "c"
-    }
-}
\ No newline at end of file
diff --git a/BM/prefetchi/Makefile b/BM/prefetchi/Makefile
new file mode 100644
index 00000000..78a08187
--- /dev/null
+++ b/BM/prefetchi/Makefile
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0-only
+# Copyright (c) 2024 Intel Corporation.
+
+CC = gcc
+CFLAGS = -g -Wall 
+TARGET = prefetchi
+
+$(TARGET): prefetchi.c
+	$(CC) $(CFLAGS) -o $@ $<
+
+clean:
+	rm -f $(TARGET)
diff --git a/BM/prefetchi/README.md b/BM/prefetchi/README.md
new file mode 100644
index 00000000..4036f6bc
--- /dev/null
+++ b/BM/prefetchi/README.md
@@ -0,0 +1,13 @@
+# PREFETCHI (Code SW Prefetch)
+
+## Description
+PREFETCHI is a new set of instructions in the latest Intel platform Granite Rapids. This new instruction set moves code to memory (cache) closer to the processor depending on specific hints. The encodings stay NOPs in processors that do not enumerate these instructions.
+
+This is a basic test to ensure PREFETCHIT0/1 is supported on your platform.
+
+## Usage
+```
+make
+./prefetchi
+```
+Test result will be printed out.
diff --git a/BM/prefetchi/prefetchi.c b/BM/prefetchi/prefetchi.c
new file mode 100644
index 00000000..eff319d0
--- /dev/null
+++ b/BM/prefetchi/prefetchi.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// Copyright (c) 2024 Intel Corporation.
+
+#include <stdio.h>
+#include <stdint.h>
+#include "../common/kselftest.h"
+
+#define CPUID_LEAF7_EDX_PREFETCHI_MASK	(1 << 14) /* PREFETCHI instructions */
+
+static void check_cpuid_prefetchi(void)
+{
+	uint32_t eax, ebx, ecx, edx;
+
+	/*
+	 * CPUID.(EAX=07H, ECX=01H).EDX.PREFETCHI[bit 14] enumerates
+	 * support for PREFETCHIT0/1 instructions.
+	 */
+	__cpuid_count(7, 1, eax, ebx, ecx, edx);
+	if (!(edx & CPUID_LEAF7_EDX_PREFETCHI_MASK))
+		printf("cpuid: CPU doesn't support PREFETCHIT0/1.\n");
+	else
+		printf("Test passed\n");
+}
+
+int main(void)
+{
+	check_cpuid_prefetchi();
+	return 0;
+}
diff --git a/README.md b/README.md
index 69305302..b2f24f35 100644
--- a/README.md
+++ b/README.md
@@ -21,6 +21,7 @@ More details please refer to following.
   * [IFS(In Field Scan)](BM/ifs/README.md)
   * [ISST](BM/isst/README.md)
   * [PMU](BM/pmu/README.md)
+  * [PREFETCHI(Code SW Prefetch)](BM/prefetchi/README.md)
   * [pstate](BM/pstate/README.md)
   * [Intel_PT](BM/pt/README.md)
   * [RAPL](BM/rapl/README.md)