From b0ed3e00188d0a33e0aa50974819a7136892d22a Mon Sep 17 00:00:00 2001
From: Mariusz Merecki <mariusz.merecki@intel.com>
Date: Wed, 4 Oct 2023 10:46:59 +0000
Subject: [PATCH]  Add DriverInfo flag to disable hoisting of convergent
 instructions

Add a knob to force adding`GenIntrinsicsTTI` to codegen passes.
---
 IGC/Compiler/CISACodeGen/DriverInfo.hpp    | 3 +++
 IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp | 7 +++++--
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/IGC/Compiler/CISACodeGen/DriverInfo.hpp b/IGC/Compiler/CISACodeGen/DriverInfo.hpp
index 62fc1732e0e0..b4476bc72907 100644
--- a/IGC/Compiler/CISACodeGen/DriverInfo.hpp
+++ b/IGC/Compiler/CISACodeGen/DriverInfo.hpp
@@ -370,6 +370,9 @@ namespace IGC
         // Informs if LSC immediate global offset for A32 is supported
         virtual bool supportsLSCImmediateGlobalBaseOffsetForA32() const { return true; }
 
+        // If enabled IGC must not hoist convergent instructions.
+        virtual bool DisableConvergentInstructionsHoisting() const { return false; }
+
 protected:
     bool autoGRFSelection = false;
     };
diff --git a/IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp b/IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp
index c01c73f9a04b..386efe3cd892 100644
--- a/IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp
+++ b/IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp
@@ -397,8 +397,11 @@ void AddLegalizationPasses(CodeGenContext& ctx, IGCPassManager& mpm, PSSignature
         ctx.m_instrTypes.hasUnmaskedRegion) {
         IGC_SET_FLAG_VALUE(allowLICM, false);
     }
-
-    if (IGC_IS_FLAG_ENABLED(ForceAllPrivateMemoryToSLM) ||
+    bool disableConvergentInstructionsHoisting =
+        ctx.m_DriverInfo.DisableConvergentInstructionsHoisting() &&
+        ctx.m_instrTypes.numWaveIntrinsics > 0;
+    if (disableConvergentInstructionsHoisting ||
+        IGC_IS_FLAG_ENABLED(ForceAllPrivateMemoryToSLM) ||
         IGC_IS_FLAG_ENABLED(ForcePrivateMemoryToSLMOnBuffers))
     {
         DummyPass* dummypass = new DummyPass();