diff --git a/visa/iga/IGALibrary/Backend/GED/Decoder.cpp b/visa/iga/IGALibrary/Backend/GED/Decoder.cpp
index 6ac973aaa2a5..428d137609de 100644
--- a/visa/iga/IGALibrary/Backend/GED/Decoder.cpp
+++ b/visa/iga/IGALibrary/Backend/GED/Decoder.cpp
@@ -939,9 +939,8 @@ static Region retrieveReducedRegionTernary(Type srcType, Type dstType,
       dstRegion.h * TypeSizeInBits(dstType) / TypeSizeInBits(srcType);
   switch (sVertStride) {
   case 1: return Region::SRC1X0;
-  case 2: return Region::SRC2X0;
-  case 4: return Region::SRC4X0;
-  case 8: return Region::SRC8X0;
+  case 2: return Region::SRC4X2;
+  case 4: return Region::SRC8X4;
   default:
     break;
   }
@@ -1756,10 +1755,11 @@ static Region retrieveReducedRegionVWH(Type srcType, Type dstType,
   auto sVertStride =
       dstRegion.h * TypeSizeInBits(dstType) / TypeSizeInBits(srcType);
   switch (sVertStride) {
-  case 1: return Region::SRC110;
-  case 2: return Region::SRC210;
-  case 4: return Region::SRC410;
-  case 8: return Region::SRC810;
+  case 1:  return Region::SRC110;
+  case 2:  return Region::SRC210;
+  case 4:  return Region::SRC410;
+  case 8:  return Region::SRC810;
+  case 16: return Region::SRC1610;
   default:
     break;
   }
diff --git a/visa/iga/IGALibrary/Frontend/KernelParser.cpp b/visa/iga/IGALibrary/Frontend/KernelParser.cpp
index 0a210d9115dd..7e78e986ca49 100644
--- a/visa/iga/IGALibrary/Frontend/KernelParser.cpp
+++ b/visa/iga/IGALibrary/Frontend/KernelParser.cpp
@@ -2231,11 +2231,6 @@ class KernelParser : GenParser {
       rgn = ParseSrcOpRegionVWH(ri, srcOpIx, hasExplicitSubreg);
     }
 
-    // Verify if the region is valid
-    if (m_model.srcHasReducedRegion(srcOpIx) &&
-        !rgn.isScalar() && !rgn.isFlat())
-      ErrorAtT(opStart, "Invalid region");
-
     // :t
     Type sty = Type::INVALID;
     if (m_opSpec->isAnySendFormat()) {
@@ -2441,10 +2436,6 @@ class KernelParser : GenParser {
     } else {
       rgn = Region::SRC110;
     }
-    // Verify if the region is valid
-    if (m_model.srcHasReducedRegion(srcOpIx) &&
-        !rgn.isScalar() && !rgn.isFlat())
-      ErrorAtT(opStart, "Invalid region");
     return rgn;
   }
 
diff --git a/visa/iga/IGALibrary/IR/Checker/IRChecker.cpp b/visa/iga/IGALibrary/IR/Checker/IRChecker.cpp
index 007edf0673bc..835614eeb7b6 100644
--- a/visa/iga/IGALibrary/IR/Checker/IRChecker.cpp
+++ b/visa/iga/IGALibrary/IR/Checker/IRChecker.cpp
@@ -214,6 +214,7 @@ struct SemanticChecker : LOCChecker {
     }
   }
 
+
   void checkRegRegioningRestrictions(ExecSize es, const Operand &dst,
                                      const Operand &src) {
     // only for the form:
diff --git a/visa/iga/IGALibrary/IR/Types.cpp b/visa/iga/IGALibrary/IR/Types.cpp
index 6e1db6fccbe1..fce59189dbcf 100644
--- a/visa/iga/IGALibrary/IR/Types.cpp
+++ b/visa/iga/IGALibrary/IR/Types.cpp
@@ -26,25 +26,24 @@ const Region Region::DST1 = REGION_VWH(VT_INVALID, WI_INVALID, HZ_1);
 const Region Region::DST2 = REGION_VWH(VT_INVALID, WI_INVALID, HZ_2);
 const Region Region::DST4 = REGION_VWH(VT_INVALID, WI_INVALID, HZ_4);
 // basic srcs
-const Region Region::SRC010 = REGION_VWH(VT_0, WI_1, HZ_0);
-const Region Region::SRC110 = REGION_VWH(VT_1, WI_1, HZ_0);
-const Region Region::SRC210 = REGION_VWH(VT_2, WI_1, HZ_0);
-const Region Region::SRC410 = REGION_VWH(VT_4, WI_1, HZ_0);
-const Region Region::SRC810 = REGION_VWH(VT_8, WI_1, HZ_0);
-const Region Region::SRC221 = REGION_VWH(VT_2, WI_2, HZ_1);
-const Region Region::SRC441 = REGION_VWH(VT_4, WI_4, HZ_1);
-const Region Region::SRC881 = REGION_VWH(VT_8, WI_8, HZ_1);
-const Region Region::SRCFF1 = REGION_VWH(VT_16, WI_16, HZ_1);
+const Region Region::SRC010  = REGION_VWH(VT_0, WI_1, HZ_0);
+const Region Region::SRC110  = REGION_VWH(VT_1, WI_1, HZ_0);
+const Region Region::SRC210  = REGION_VWH(VT_2, WI_1, HZ_0);
+const Region Region::SRC410  = REGION_VWH(VT_4, WI_1, HZ_0);
+const Region Region::SRC810  = REGION_VWH(VT_8, WI_1, HZ_0);
+const Region Region::SRC1610 = REGION_VWH(VT_16, WI_1, HZ_0);
+const Region Region::SRC221  = REGION_VWH(VT_2, WI_2, HZ_1);
+const Region Region::SRC441  = REGION_VWH(VT_4, WI_4, HZ_1);
+const Region Region::SRC881  = REGION_VWH(VT_8, WI_8, HZ_1);
+const Region Region::SRCFF1  = REGION_VWH(VT_16, WI_16, HZ_1);
 // ternary align1 src0 and src1
 const Region Region::SRC0X0 = REGION_VWH(VT_0, WI_INVALID, HZ_0);
 const Region Region::SRC1X0 = REGION_VWH(VT_1, WI_INVALID, HZ_0);
 const Region Region::SRC2X1 = REGION_VWH(VT_2, WI_INVALID, HZ_1);
 const Region Region::SRC4X1 = REGION_VWH(VT_4, WI_INVALID, HZ_1);
 const Region Region::SRC8X1 = REGION_VWH(VT_8, WI_INVALID, HZ_1);
-// ternery flat src1
-const Region Region::SRC2X0 = REGION_VWH(VT_2, WI_INVALID, HZ_0);
-const Region Region::SRC4X0 = REGION_VWH(VT_4, WI_INVALID, HZ_0);
-const Region Region::SRC8X0 = REGION_VWH(VT_8, WI_INVALID, HZ_0);
+const Region Region::SRC4X2 = REGION_VWH(VT_4, WI_INVALID, HZ_2);
+const Region Region::SRC8X4 = REGION_VWH(VT_8, WI_INVALID, HZ_4);
 // ternary align src2
 const Region Region::SRCXX0 = REGION_VWH(VT_INVALID, WI_INVALID, HZ_0);
 const Region Region::SRCXX1 = REGION_VWH(VT_INVALID, WI_INVALID, HZ_1);
diff --git a/visa/iga/IGALibrary/IR/Types.hpp b/visa/iga/IGALibrary/IR/Types.hpp
index 8185e3745e5d..0e6531916de9 100644
--- a/visa/iga/IGALibrary/IR/Types.hpp
+++ b/visa/iga/IGALibrary/IR/Types.hpp
@@ -239,16 +239,8 @@ struct Region {
   }
 
   bool isScalar() const {
-    if (bits == SRC010.bits || bits == SRC0X0.bits || bits == SRCXX0.bits)
-      return true;
-    return false;
-  }
-
-  bool isFlat() const {
-    if (bits == SRC1X0.bits || bits == SRC2X0.bits || bits == SRC4X0.bits ||
-        bits == SRC8X0.bits ||
-        bits == SRC110.bits || bits == SRC210.bits || bits == SRC410.bits ||
-        bits == SRC810.bits)
+    if ((v == 0 && h == 0) || (v == 0 && w == 1) ||
+        bits == SRCXX0.bits)
       return true;
     return false;
   }
@@ -269,11 +261,12 @@ struct Region {
   static const Region DST4; // <4>
   //
   // generalized src regions
-  static const Region SRC010; // <0;1,0> (broadcast scalar)
-  static const Region SRC110; // <1;1,0> (packed access)
-  static const Region SRC210; // <2;1,0> (even strided access)
-  static const Region SRC410; // <4;1,0> (quarter stided access)
-  static const Region SRC810; // <8;1,0>
+  static const Region SRC010;  // <0;1,0> (broadcast scalar)
+  static const Region SRC110;  // <1;1,0> (packed access)
+  static const Region SRC210;  // <2;1,0> (even strided access)
+  static const Region SRC410;  // <4;1,0> (quarter stided access)
+  static const Region SRC810;  // <8;1,0>
+  static const Region SRC1610; // <16;1,0>
   //
   // older src regions
   static const Region SRC221; // <2;2,1>
@@ -287,10 +280,8 @@ struct Region {
   static const Region SRC2X1; // <2;1> (ternary align1 src0 and src1)
   static const Region SRC1X0; // <1;0> XE_LP changes 2 to 1 in encoding
   static const Region SRC4X1; // <4;1> (ternary align1 src0 and src1)
-  // ternery flat src1
-  static const Region SRC2X0; // <2;0>
-  static const Region SRC4X0; // <4;0>
-  static const Region SRC8X0; // <8;0>
+  static const Region SRC4X2; // <4;2> single-stride 2
+  static const Region SRC8X4; // <8;4> single-stride 4
   // ternary src2
   static const Region SRC8X1; // <8;1> (ternary align1 src0 and src1)
   static const Region SRCXX0; // <0>   (ternary align1 src2)