From 154b3811ac0900d112c4397aadd875988b126584 Mon Sep 17 00:00:00 2001 From: 0xd4d Date: Tue, 26 May 2020 19:25:08 +0200 Subject: [PATCH] bndmov: show mem size by default --- src/UnitTests/Intel/Formatter/Intel/Test16_MemAlways.txt | 4 ++-- src/UnitTests/Intel/Formatter/Intel/Test16_MemDefault.txt | 4 ++-- src/UnitTests/Intel/Formatter/Intel/Test32_MemAlways.txt | 4 ++-- src/UnitTests/Intel/Formatter/Intel/Test32_MemDefault.txt | 4 ++-- src/UnitTests/Intel/Formatter/Intel/Test64_MemAlways.txt | 4 ++-- src/UnitTests/Intel/Formatter/Intel/Test64_MemDefault.txt | 4 ++-- .../Intel/Generator/Formatters/Intel/CtorInfosData.cs | 8 ++++---- .../Iced/Intel/IntelFormatterInternal/InstrInfos.g.cs | 4 ++-- src/rust/iced-x86/src/formatter/intel/fmt_data.rs | 4 ++-- 9 files changed, 20 insertions(+), 20 deletions(-) diff --git a/src/UnitTests/Intel/Formatter/Intel/Test16_MemAlways.txt b/src/UnitTests/Intel/Formatter/Intel/Test16_MemAlways.txt index 578485d12..ca860f056 100644 --- a/src/UnitTests/Intel/Formatter/Intel/Test16_MemAlways.txt +++ b/src/UnitTests/Intel/Formatter/Intel/Test16_MemAlways.txt @@ -124,13 +124,13 @@ jmp dword ptr [bx+si] push esi push dword ptr [bx+si] bndmov bnd1, bnd2 -bndmov bnd1, [eax] +bndmov bnd1, qword ptr [eax] bndcl bnd1, edx bndcl bnd1, [eax] bndcu bnd1, edx bndcu bnd1, [eax] bndmov bnd2, bnd1 -bndmov [eax], bnd1 +bndmov qword ptr [eax], bnd1 bndmk bnd1, [eax] bndcn bnd1, edx bndcn bnd1, [eax] diff --git a/src/UnitTests/Intel/Formatter/Intel/Test16_MemDefault.txt b/src/UnitTests/Intel/Formatter/Intel/Test16_MemDefault.txt index 8a024664b..cbfcc828d 100644 --- a/src/UnitTests/Intel/Formatter/Intel/Test16_MemDefault.txt +++ b/src/UnitTests/Intel/Formatter/Intel/Test16_MemDefault.txt @@ -124,13 +124,13 @@ jmp dword ptr [bx+si] push esi push dword ptr [bx+si] bndmov bnd1,bnd2 -bndmov bnd1,[eax] +bndmov bnd1,qword ptr [eax] bndcl bnd1,edx bndcl bnd1,[eax] bndcu bnd1,edx bndcu bnd1,[eax] bndmov bnd2,bnd1 -bndmov [eax],bnd1 +bndmov qword ptr [eax],bnd1 bndmk bnd1,[eax] bndcn bnd1,edx bndcn bnd1,[eax] diff --git a/src/UnitTests/Intel/Formatter/Intel/Test32_MemAlways.txt b/src/UnitTests/Intel/Formatter/Intel/Test32_MemAlways.txt index 17ad897e2..5b26542ac 100644 --- a/src/UnitTests/Intel/Formatter/Intel/Test32_MemAlways.txt +++ b/src/UnitTests/Intel/Formatter/Intel/Test32_MemAlways.txt @@ -185,13 +185,13 @@ jmp dword ptr [eax] push esi push dword ptr [eax] bndmov bnd1, bnd2 -bndmov bnd1, [eax] +bndmov bnd1, qword ptr [eax] bndcl bnd1, edx bndcl bnd1, [eax] bndcu bnd1, edx bndcu bnd1, [eax] bndmov bnd2, bnd1 -bndmov [eax], bnd1 +bndmov qword ptr [eax], bnd1 bndmk bnd1, [eax] bndcn bnd1, edx bndcn bnd1, [eax] diff --git a/src/UnitTests/Intel/Formatter/Intel/Test32_MemDefault.txt b/src/UnitTests/Intel/Formatter/Intel/Test32_MemDefault.txt index c89ee0078..e7bf09751 100644 --- a/src/UnitTests/Intel/Formatter/Intel/Test32_MemDefault.txt +++ b/src/UnitTests/Intel/Formatter/Intel/Test32_MemDefault.txt @@ -185,13 +185,13 @@ jmp dword ptr [eax] push esi push dword ptr [eax] bndmov bnd1,bnd2 -bndmov bnd1,[eax] +bndmov bnd1,qword ptr [eax] bndcl bnd1,edx bndcl bnd1,[eax] bndcu bnd1,edx bndcu bnd1,[eax] bndmov bnd2,bnd1 -bndmov [eax],bnd1 +bndmov qword ptr [eax],bnd1 bndmk bnd1,[eax] bndcn bnd1,edx bndcn bnd1,[eax] diff --git a/src/UnitTests/Intel/Formatter/Intel/Test64_MemAlways.txt b/src/UnitTests/Intel/Formatter/Intel/Test64_MemAlways.txt index fcb0dc20e..12a32f44b 100644 --- a/src/UnitTests/Intel/Formatter/Intel/Test64_MemAlways.txt +++ b/src/UnitTests/Intel/Formatter/Intel/Test64_MemAlways.txt @@ -1407,14 +1407,14 @@ prefetcht1 byte ptr [rax] prefetcht2 byte ptr [rax] bndldx bnd1, [rax] bndmov bnd1, bnd2 -bndmov bnd1, [rax] +bndmov bnd1, xmmword ptr [rax] bndcl bnd1, rdx bndcl bnd1, [rax] bndcu bnd1, rdx bndcu bnd1, [rax] bndstx [rax], bnd1 bndmov bnd2, bnd1 -bndmov [rax], bnd1 +bndmov xmmword ptr [rax], bnd1 bndmk bnd1, [rax] bndcn bnd1, rdx bndcn bnd1, [rax] diff --git a/src/UnitTests/Intel/Formatter/Intel/Test64_MemDefault.txt b/src/UnitTests/Intel/Formatter/Intel/Test64_MemDefault.txt index e9996ede6..cf5495882 100644 --- a/src/UnitTests/Intel/Formatter/Intel/Test64_MemDefault.txt +++ b/src/UnitTests/Intel/Formatter/Intel/Test64_MemDefault.txt @@ -1407,14 +1407,14 @@ prefetcht1 [rax] prefetcht2 [rax] bndldx bnd1,[rax] bndmov bnd1,bnd2 -bndmov bnd1,[rax] +bndmov bnd1,xmmword ptr [rax] bndcl bnd1,rdx bndcl bnd1,[rax] bndcu bnd1,rdx bndcu bnd1,[rax] bndstx [rax],bnd1 bndmov bnd2,bnd1 -bndmov [rax],bnd1 +bndmov xmmword ptr [rax],bnd1 bndmk bnd1,[rax] bndcn bnd1,rdx bndcn bnd1,[rax] diff --git a/src/csharp/Intel/Generator/Formatters/Intel/CtorInfosData.cs b/src/csharp/Intel/Generator/Formatters/Intel/CtorInfosData.cs index 68f9e1a91..d4092ffb1 100644 --- a/src/csharp/Intel/Generator/Formatters/Intel/CtorInfosData.cs +++ b/src/csharp/Intel/Generator/Formatters/Intel/CtorInfosData.cs @@ -1074,15 +1074,15 @@ public static object[][] GetData(GenTypes genTypes) { new object[] { ctorKind[nameof(CtorKind.Normal_1)], code[nameof(Code.Prefetcht1_m8)], "prefetcht1" }, new object[] { ctorKind[nameof(CtorKind.Normal_1)], code[nameof(Code.Prefetcht2_m8)], "prefetcht2" }, new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndldx_bnd_mib)], "bndldx", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, - new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndmov_bnd_bndm64)], "bndmov", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, - new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndmov_bnd_bndm128)], "bndmov", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, + new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndmov_bnd_bndm64)], "bndmov", instrOpInfoFlags[nameof(InstrOpInfoFlags.ShowNoMemSize_ForceSize)] }, + new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndmov_bnd_bndm128)], "bndmov", instrOpInfoFlags[nameof(InstrOpInfoFlags.ShowNoMemSize_ForceSize)] }, new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndcl_bnd_rm32)], "bndcl", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndcl_bnd_rm64)], "bndcl", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndcu_bnd_rm32)], "bndcu", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndcu_bnd_rm64)], "bndcu", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndstx_mib_bnd)], "bndstx", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, - new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndmov_bndm64_bnd)], "bndmov", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, - new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndmov_bndm128_bnd)], "bndmov", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, + new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndmov_bndm64_bnd)], "bndmov", instrOpInfoFlags[nameof(InstrOpInfoFlags.ShowNoMemSize_ForceSize)] }, + new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndmov_bndm128_bnd)], "bndmov", instrOpInfoFlags[nameof(InstrOpInfoFlags.ShowNoMemSize_ForceSize)] }, new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndmk_bnd_m32)], "bndmk", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndmk_bnd_m64)], "bndmk", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, new object[] { ctorKind[nameof(CtorKind.Normal_2)], code[nameof(Code.Bndcn_bnd_rm32)], "bndcn", instrOpInfoFlags[nameof(InstrOpInfoFlags.MemSize_Nothing)] }, diff --git a/src/csharp/Intel/Iced/Intel/IntelFormatterInternal/InstrInfos.g.cs b/src/csharp/Intel/Iced/Intel/IntelFormatterInternal/InstrInfos.g.cs index 8dd6f6f36..6ee175f7b 100644 --- a/src/csharp/Intel/Iced/Intel/IntelFormatterInternal/InstrInfos.g.cs +++ b/src/csharp/Intel/Iced/Intel/IntelFormatterInternal/InstrInfos.g.cs @@ -4355,7 +4355,7 @@ static byte[] GetSerializedInstrInfos() => // Bndmov_bnd_bndm64 0x02,// Normal_2 0xD3, 0x03,// 467 = "bndmov" - 0x01,// 0x1 = MemSize_Nothing + 0x02,// 0x2 = ShowNoMemSize_ForceSize // Bndmov_bnd_bndm128 0x00,// Previous @@ -4384,7 +4384,7 @@ static byte[] GetSerializedInstrInfos() => // Bndmov_bndm64_bnd 0x02,// Normal_2 0xD3, 0x03,// 467 = "bndmov" - 0x01,// 0x1 = MemSize_Nothing + 0x02,// 0x2 = ShowNoMemSize_ForceSize // Bndmov_bndm128_bnd 0x00,// Previous diff --git a/src/rust/iced-x86/src/formatter/intel/fmt_data.rs b/src/rust/iced-x86/src/formatter/intel/fmt_data.rs index e8ee8a591..d15456560 100644 --- a/src/rust/iced-x86/src/formatter/intel/fmt_data.rs +++ b/src/rust/iced-x86/src/formatter/intel/fmt_data.rs @@ -4346,7 +4346,7 @@ pub(super) static FORMATTER_TBL_DATA: &[u8] = &[ // Bndmov_bnd_bndm64 0x02,// Normal_2 0xD3, 0x03,// 467 = "bndmov" - 0x01,// 0x1 = MemSize_Nothing + 0x02,// 0x2 = ShowNoMemSize_ForceSize // Bndmov_bnd_bndm128 0x00,// Previous @@ -4375,7 +4375,7 @@ pub(super) static FORMATTER_TBL_DATA: &[u8] = &[ // Bndmov_bndm64_bnd 0x02,// Normal_2 0xD3, 0x03,// 467 = "bndmov" - 0x01,// 0x1 = MemSize_Nothing + 0x02,// 0x2 = ShowNoMemSize_ForceSize // Bndmov_bndm128_bnd 0x00,// Previous