From 5e1ebecd00b3c646f1dc617c7e5f4e0abbff1550 Mon Sep 17 00:00:00 2001 From: xoviat Date: Sun, 24 Sep 2023 16:20:48 -0500 Subject: [PATCH 1/3] stm32: remove low-power wakeup bug --- embassy-stm32/src/rtc/v2.rs | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs index 05b85ef46c..2a46ec0137 100644 --- a/embassy-stm32/src/rtc/v2.rs +++ b/embassy-stm32/src/rtc/v2.rs @@ -75,15 +75,7 @@ impl super::Rtc { #[cfg(any(rcc_wb, rcc_f4, rcc_f410))] unsafe { crate::rcc::get_freqs() }.rtc.unwrap(); - /* - If the requested duration is u64::MAX, don't even set the alarm - - Otherwise clamp the requested duration to u32::MAX so that we can do math - */ - if requested_duration.as_ticks() == u64::MAX { - return; - } - + // Clamp requested_duration to prevent an overflow let requested_duration = requested_duration.as_ticks().clamp(0, u32::MAX as u64); let rtc_hz = Self::frequency().0 as u64; let rtc_ticks = requested_duration * rtc_hz / TICK_HZ; From 220645be6f4e5790c1f89a8ceb21e5751920f6e7 Mon Sep 17 00:00:00 2001 From: xoviat Date: Sun, 24 Sep 2023 16:22:27 -0500 Subject: [PATCH 2/3] stm32: extract peripheral clock logic to bd --- embassy-stm32/src/rcc/bd.rs | 28 ++++++++++++++++++++++++++-- embassy-stm32/src/rtc/mod.rs | 2 -- embassy-stm32/src/rtc/v2.rs | 25 ------------------------- embassy-stm32/src/rtc/v3.rs | 17 ----------------- 4 files changed, 26 insertions(+), 46 deletions(-) diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs index 4915d5e2a6..36898dd53a 100644 --- a/embassy-stm32/src/rcc/bd.rs +++ b/embassy-stm32/src/rcc/bd.rs @@ -82,6 +82,31 @@ impl BackupDomain { r } + fn enable_peripheral_clk() { + #[cfg(any(rtc_v2l4, rtc_v2wb))] + { + crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true)); + crate::pac::PWR.cr1().read(); + } + #[cfg(any(rtc_v2f2))] + { + crate::pac::RCC.apb1enr().modify(|w| w.set_pwren(true)); + crate::pac::PWR.cr().read(); + } + + #[cfg(any(rtc_v2f0, rtc_v2l0))] + crate::pac::RCC.apb1enr().modify(|w| w.set_pwren(true)); + + #[cfg(any(rcc_wle, rcc_wl5, rcc_g4))] + crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true)); + + #[cfg(rcc_g0)] + crate::pac::RCC.apbenr1().modify(|w| w.set_rtcapben(true)); + + #[cfg(any(rtc_v3, rtc_v3u5))] + crate::pac::PWR.cr1().read(); + } + #[cfg(any( rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3, rtc_v3u5 @@ -89,8 +114,7 @@ impl BackupDomain { #[allow(dead_code, unused_variables)] pub fn configure_ls(clock_source: RtcClockSource, lsi: bool, lse: Option) { if lsi || lse.is_some() { - use crate::rtc::sealed::Instance; - crate::peripherals::RTC::enable_peripheral_clk(); + Self::enable_peripheral_clk(); } if lsi { diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs index 7eafedec4e..28d24c2d49 100644 --- a/embassy-stm32/src/rtc/mod.rs +++ b/embassy-stm32/src/rtc/mod.rs @@ -292,8 +292,6 @@ pub(crate) mod sealed { crate::pac::RTC } - fn enable_peripheral_clk(); - /// Read content of the backup register. /// /// The registers retain their values during wakes from standby mode or system resets. They also diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs index 2a46ec0137..5eb52b98c8 100644 --- a/embassy-stm32/src/rtc/v2.rs +++ b/embassy-stm32/src/rtc/v2.rs @@ -278,31 +278,6 @@ impl sealed::Instance for crate::peripherals::RTC { #[cfg(all(feature = "low-power", stm32l0))] type WakeupInterrupt = crate::interrupt::typelevel::RTC; - fn enable_peripheral_clk() { - #[cfg(any(rtc_v2l4, rtc_v2wb))] - { - // enable peripheral clock for communication - crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true)); - - // read to allow the pwr clock to enable - crate::pac::PWR.cr1().read(); - } - #[cfg(any(rtc_v2f2))] - { - // enable peripheral clock for communication - crate::pac::RCC.apb1enr().modify(|w| w.set_pwren(true)); - - // read to allow the pwr clock to enable - crate::pac::PWR.cr().read(); - } - - #[cfg(any(rtc_v2f0, rtc_v2l0))] - { - // enable peripheral clock for communication - crate::pac::RCC.apb1enr().modify(|w| w.set_pwren(true)); - } - } - fn read_backup_register(rtc: &Rtc, register: usize) -> Option { if register < Self::BACKUP_REGISTER_COUNT { Some(rtc.bkpr(register).read().bkp()) diff --git a/embassy-stm32/src/rtc/v3.rs b/embassy-stm32/src/rtc/v3.rs index 9ac9f9f855..a6b2655d82 100644 --- a/embassy-stm32/src/rtc/v3.rs +++ b/embassy-stm32/src/rtc/v3.rs @@ -128,23 +128,6 @@ impl super::Rtc { impl sealed::Instance for crate::peripherals::RTC { const BACKUP_REGISTER_COUNT: usize = 32; - fn enable_peripheral_clk() { - #[cfg(any(rcc_wle, rcc_wl5, rcc_g4))] - { - // enable peripheral clock for communication - crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true)); - } - - #[cfg(rcc_g0)] - { - // enable peripheral clock for communication - crate::pac::RCC.apbenr1().modify(|w| w.set_rtcapben(true)); - } - - // read to allow the pwr clock to enable - crate::pac::PWR.cr1().read(); - } - fn read_backup_register(_rtc: &Rtc, register: usize) -> Option { #[allow(clippy::if_same_then_else)] if register < Self::BACKUP_REGISTER_COUNT { From 32260d83d0e7fc71099505f1ad4d3cd33dad2418 Mon Sep 17 00:00:00 2001 From: xoviat Date: Sun, 24 Sep 2023 16:23:31 -0500 Subject: [PATCH 3/3] rustfmt --- embassy-stm32/src/rcc/bd.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs index 36898dd53a..a77873d09c 100644 --- a/embassy-stm32/src/rcc/bd.rs +++ b/embassy-stm32/src/rcc/bd.rs @@ -82,6 +82,7 @@ impl BackupDomain { r } + #[allow(dead_code, unused_variables)] fn enable_peripheral_clk() { #[cfg(any(rtc_v2l4, rtc_v2wb))] {