New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Multi-master Wishbone bus unsupported #43

Open

jean-m-cyr opened this issue Feb 27, 2021 · 1 comment

jean-m-cyr commented Feb 27, 2021

creation of useful IP such as DMA controller of high-speed capture IP not possible.

mballance commented Feb 27, 2021

What issue(s) did you encounter? I had the following interconnect, configured with two masters, in my MPW-one submission:
https://github.com/Featherweight-IP/fw-wishbone-interconnect

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment