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mips_eabi.txt
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mips_eabi.txt
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MIPS EABI
=========
Sizes and alignments
--------------------
Type Size (bytes) Alignment (bytes)
char 1 1
short 2 2
int 4 4
unsigned 4 4
long 4 4 (32-bit mode)
8 8 (64-bit mode)
long long 8 8
float 4 4
double 8 8
pointers 4 4 (32-bit mode)
8 8 (64-bit mode)
* alignment within aggregates (structs and unions) is as above, with
padding added if needed
* aggregates have alignment equal to that of their most aligned
member
* aggregates have sizes which are a multiple of their alignment
Subroutine calls
----------------
Parameter registers:
general-purpose r4-r11
floating point f12-f19
Register usage:
fixed 0 value r0
volatile r1-r15, r24, r25
non-volatile r16-r23, r30
kernel reserved r26, r27
gp (SDA base) r28
stack pointer r29
frame pointer r30 (if needed)
return address r31
Stack alignment 8 bytes
Parameter register allocation integer/floating independently (see below)
Structures passed <= 32 bits as values, else as pointers
Homing area none
Stack Frame
-----------
+-----------------------+
| Saved Registers |
+-----------------------+
| ... |
+-----------------------+
| Local Variables |
+-----------------------+
| ... |
+-----------------------+
| Parameter Word 2 |
+-----------------------+
SP --> | Parameter Word 1 |
+-----------------------+
Parameter Assignment to Registers
---------------------------------
Consider the parameters in a function call as ordered from left (first
parameter) to right. In this algorithm, FR contains the number of the
next available floating-point register (or register pair for modes in
which floating-point registers hold only 32 bits). GR contains the
number of the next available general-purpose register. STARG is the
address of the next available stack parameter word.
INITIALIZE:
Set GR=r4, FR=f12, and STARG to point to parameter word 1.
SCAN:
If there are no more parameters, terminate.
Otherwise, select one of the following depending on the type
of the next parameter:
DOUBLE OR FLOAT:
If FR > f19, go to STACK. Otherwise, load the parameter value
into floating-point register FR and advance FR to the next
floating-point register (or register pair in 32-bit mode).
Then go to SCAN.
SIMPLE ARG:
A SIMPLE ARG is one of the following:
* One of the simple integer types which will fit into a
general-purpose register,
* A pointer to an object of any type,
* A struct or union small enough to fit in a register
(<= 32 bits in 32-bit mode, <= 64 bits in 64-bit mode)
* A larger struct or union, which shall be treated as a
pointer to the object or to a copy of the object.
(See below for when copies are made.)
If GR > r11, go to STACK. Otherwise, load the parameter
value into general-purpose register GR and advance GR
to the next general-purpose register. Values shorter than
the register size are sign-extended or zero-extended depending
on whether they are signed or unsigned. Then go to SCAN.
LONG LONG in 32-bit mode:
If GR > r10, go to STACK. Otherwise, if GR is odd, advance
GR to the next register. Load the 64-bit long long value into
register pair GR and GR+1. Advance GR to GR+2 and go to SCAN.
STACK:
Parameters not otherwise handled above are passed in the
parameter words of the caller's stack frame. SIMPLE ARGs,
as defined above, are considered to have size and alignment
equal to the size of a general-purpose register, with
simple argument types shorter than this sign- or zero-extended
to this width. float arguments are considered to have size
and alignment equal to the size of a floating-point register.
In 64-bit mode, floats are stored in the low-order 32 bits
of the 64-bit space allocated to them. double and long long
are considered to have 64-bit size and alignment. Round
STARG up to a multiple of the alignment requirement of
the parameter and copy the argument byte-for-byte into
STARG, STARG+1, ... STARG+size-1. Set STARG to STARG+size
and go to SCAN.
Structure passing
-----------------
As noted above, code which passes structures and unions by value is
implemented specially. (In this section, "struct" will refer to
structs and unions inclusively.) Structs small enough to fit in a
register are passed by value in a single register or in a stack frame
slot the size of a register. Larger structs are handled by passing
the address of the structure. In this case, a copy of the structure
will be made if necessary in order to preserve the pass-by-value
semantics.
Copies of large structs are made under the following rules:
ANSI mode K&R Mode
--------- --------
Normal param Callee copies if needed Caller copies
Varargs (...) param Caller copies Caller copies
In the case of normal (non-varargs) large-struct parameters in ANSI
mode, the callee is responsible for producing the same effect as if a
copy of the structure were passed, preserving the pass-by-value
semantics. This may be accomplished by having the callee make a copy,
but in some cases the callee may be able to determine that a copy is
not necessary in order to produce the same results. In such cases,
the callee may choose to avoid making a copy of the parameter.
Varargs handling
----------------
No special changes are needed for handling varargs parameters other
than the caller knowing that a copy is needed on struct parameters
larger than a register (see above).
The varargs macros set up a two-part register save area, one part for
the general-purpose registers and one part for floating-point
registers, and maintain separate pointers for these two areas and for
the stack parameter area. The register save area lies between the
caller and callee stack frame areas.
In the case of software floating-point only the general-purpose
registers need to be saved. Because the save area lies between the
two stack frames, the saved register parameters are contiguous with
parameters passed on the stack. This allows the varargs macros to be
much simpler. Only one pointer is needed, which advances from the
register save area into the caller's stack frame.
Function return values
----------------------
Type Register
---- --------
int r2
short r2
long r2
long long r2-r3 (32-bit mode)
r2 (64-bit mode)
float f0
double f0-f1 (32-bit mode)
f0 (64-bit mode)
struct/union see below
Structs/unions which will fit into two general-purpose registers are
returned in r2, or in r2-r3 if necessary. They are aligned within the
register according to the endianness of the processor; e.g. on a
big-endian processor the first byte of the struct is returned in the
most significant byte of r2, while on a little-endian processor the
first byte is returned in the least significant byte of r2. Larger
structs/unions are handled by the caller passing as a "hidden" first
argument a pointer to space allocated to receive the return value.
Software floating-point
-----------------------
For software floating-point implementations, floats shall be passed
and returned like ints, and doubles shall be passed and returned like
long longs.
This implies that, in 32-bit mode, floats will be passed in a single
integer register and doubles will be passed in an even/odd register
pair. Similarly, floats will be returned in a single register, r2,
and doubles will be returned in register pair r2-r3.