Add 3.3V and 5V output control (#72)

* Update README.md
* add 3.3V and 5V output control
* fix command name and log timing
* integrate into subcommand

CHANGELOG.md

@@ -10,6 +10,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 ### Fixed
 
 - Rename ChipUID response to ESignature, #58
+- Add functions to control 3.3V and 5V outputs of probe
 
 ## [0.0.8] - 2024-03-30
 

README.md

@@ -25,6 +25,7 @@
 - [x] Read chip memory(flash)
 - [x] Read/write chip register - very handy for debugging
 - [x] Code-Protect & Code-Unprotect for supported chips
+- [x] Enable or Disable 3.3V, 5V output
 - [x] [SDI print](https://www.cnblogs.com/liaigu/p/17628184.html) support, requires 2.10+ firmware
 - [x] [Serial port watching](https://github.com/ch32-rs/wlink/pull/36) for a smooth development experience
 - [x] Windows native driver support, no need to install libusb manually (requires x86 build)

src/commands/control.rs

@@ -160,22 +160,26 @@ impl Command for OptEnd {
 }
 
 /// Set Power, from pow3v3, pow5v fn
-#[derive(Debug)]
+#[derive(clap::Subcommand, PartialEq, Clone, Copy, Debug)]
 pub enum SetPower {
-    Enable3V3,
-    Disable3V3,
-    Enable5V,
-    Disable5V,
+    /// Enable 3.3V output
+    Enable3v3,
+    /// Disable 3.3V output
+    Disable3v3,
+    /// Enable 5V output
+    Enable5v,
+    /// Disable 5V output
+    Disable5v,
 }
 impl Command for SetPower {
     type Response = ();
     const COMMAND_ID: u8 = 0x0d;
     fn payload(&self) -> Vec<u8> {
         match self {
-            SetPower::Enable3V3 => vec![0x09],
-            SetPower::Disable3V3 => vec![0x0A],
-            SetPower::Enable5V => vec![0x0B],
-            SetPower::Disable5V => vec![0x0C],
+            SetPower::Enable3v3 => vec![0x09],
+            SetPower::Disable3v3 => vec![0x0A],
+            SetPower::Enable5v => vec![0x0B],
+            SetPower::Disable5v => vec![0x0C],
         }
     }
 }

src/commands/mod.rs

@@ -425,4 +425,4 @@ impl Command for DisableDebug {
 // 81 0D 01 0F ClearCodeFlashB
 // 81 0D 02 08 xx ClearCodeFlash
 // 81 11 01 0D unknown in query info, before GetChipRomRamSplit
-// 81 0d 02 ee 00 stop flash ?
+// 81 0D 02 EE 00 stop flash ?

src/main.rs

@@ -148,6 +148,11 @@ enum Commands {
     },
     /// List probes
     List {},
+    /// Enable or disable power output
+    SetPower {
+        #[command(subcommand)]
+        cmd: commands::control::SetPower,
+    },
     /// SDI virtual serial port,
     #[command(subcommand)]
     SdiPrint(SdiPrint),
@@ -204,6 +209,9 @@ fn main() -> Result<()> {
         Some(Commands::List {}) => {
             WchLink::list_probes()?;
         }
+        Some(Commands::SetPower { cmd }) => {
+            WchLink::set_power_output_enabled(device_index, cmd)?;
+        }
 
         Some(Commands::Erase { method }) if method != EraseMode::Default => {
             // Special handling for non-default erase: bypass attach chip

src/probe.rs

@@ -173,6 +173,27 @@ impl WchLink {
         Ok(())
     }
 
+    pub fn set_power_output_enabled(nth: usize, cmd: commands::control::SetPower) -> Result<()> {
+        let mut probe = Self::open_nth(nth)?;
+
+        if !probe.info.variant.support_power_funcs() {
+            return Err(Error::Custom(
+                "Probe doesn't support power control".to_string(),
+            ));
+        }
+
+        probe.send_command(cmd)?;
+
+        match cmd {
+            commands::control::SetPower::Enable3v3 => log::info!("Enable 3.3V Output"),
+            commands::control::SetPower::Disable3v3 => log::info!("Disable 3.3V Output"),
+            commands::control::SetPower::Enable5v => log::info!("Enable 5V Output"),
+            commands::control::SetPower::Disable5v => log::info!("Disable 5V Output"),
+        }
+
+        Ok(())
+    }
+
     fn write_raw_cmd(&mut self, buf: &[u8]) -> Result<()> {
         log::trace!("send {} {}", hex::encode(&buf[..3]), hex::encode(&buf[3..]));
         self.device.write_endpoint(ENDPOINT_OUT, buf)?;