From 1b8aa3826b3a02dd8a05b375b6e66c39aaea4c8c Mon Sep 17 00:00:00 2001 From: Tristan Seifert Date: Sat, 3 Aug 2024 18:57:27 -0700 Subject: [PATCH] hacky fix for FDCAN2 --- drivers/can/can_mcan.c | 1 + dts/arm/st/h7/stm32h7.dtsi | 17 +++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/drivers/can/can_mcan.c b/drivers/can/can_mcan.c index 4afae019f9f6cd..9414765cc3e2e7 100644 --- a/drivers/can/can_mcan.c +++ b/drivers/can/can_mcan.c @@ -380,6 +380,7 @@ int can_mcan_init(const struct device *dev) uint32_t mrba = 0; #ifdef CONFIG_CAN_STM32H7 mrba = (uint32_t)msg_ram; + mrba = 0x4000ac00; #endif #ifdef CONFIG_CAN_MCUX_MCAN mrba = (uint32_t)msg_ram & CAN_MCAN_MRBA_BA_MSK; diff --git a/dts/arm/st/h7/stm32h7.dtsi b/dts/arm/st/h7/stm32h7.dtsi index dac3dd2569e50b..c7a53ac8170d1d 100644 --- a/dts/arm/st/h7/stm32h7.dtsi +++ b/dts/arm/st/h7/stm32h7.dtsi @@ -479,6 +479,23 @@ sjw-data = <1>; sample-point-data = <875>; }; + + can2: can@4000a400 { + compatible = "st,stm32h7-fdcan"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4000a400 0x400>, <0x4000af50 0x350>; + reg-names = "m_can", "message_ram"; + clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>; + interrupts = <20 0>, <22 0>, <63 0>; + interrupt-names = "LINE_0", "LINE_1", "CALIB"; + status = "disabled"; + label = "CAN_2"; + sjw = <1>; + sample-point = <875>; + sjw-data = <1>; + sample-point-data = <875>; + }; }; timers1: timers@40010000 {