From f2730ee37b5d886fe346339744c3fc3628ee85bc Mon Sep 17 00:00:00 2001
From: Saro Amirkhanyan <37337234+saroamirkhanyan@users.noreply.github.com>
Date: Mon, 11 Oct 2021 01:03:14 +0400
Subject: [PATCH] Changed reqister  to register

---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index 705385d..a1dfe51 100644
--- a/README.md
+++ b/README.md
@@ -99,7 +99,7 @@ The Clang assembler does not understand `MOV X1, X2, LSL #1`, instead `LSL X1, X
 
 ### Register and Extension
 
-Clang requires the source register to be 32-Bit. This makes sense, because with these extensions, the upper 32 Bit of a 64-Bit reqister will never be touched:
+Clang requires the source register to be 32-Bit. This makes sense, because with these extensions, the upper 32 Bit of a 64-Bit register will never be touched:
 ```
 ADD X2, X1, W0, SXTB
 ```