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HardwareProfile.h
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/*********************************************************************
*
* Hardware specific definitions
*
*********************************************************************
* FileName: HardwareProfile.h
* Dependencies: None
* Processor: PIC18, PIC24F, PIC24H, dsPIC30F, dsPIC33F, PIC32
* Compiler: Microchip C32 v1.10 or higher
* Microchip C30 v3.12 or higher
* Microchip C18 v3.34 or higher
* HI-TECH PICC-18 PRO 9.63PL2 or higher
* Company: Microchip Technology, Inc.
*
* Software License Agreement
*
* Copyright (C) 2002-2010 Microchip Technology Inc. All rights
* reserved.
*
* Microchip licenses to you the right to use, modify, copy, and
* distribute:
* (i) the Software when embedded on a Microchip microcontroller or
* digital signal controller product ("Device") which is
* integrated into Licensee's product; or
* (ii) ONLY the Software driver source files ENC28J60.c, ENC28J60.h,
* ENCX24J600.c and ENCX24J600.h ported to a non-Microchip device
* used in conjunction with a Microchip ethernet controller for
* the sole purpose of interfacing with the ethernet controller.
*
* You should refer to the license agreement accompanying this
* Software for additional information regarding your rights and
* obligations.
*
* THE SOFTWARE AND DOCUMENTATION ARE PROVIDED "AS IS" WITHOUT
* WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT
* LIMITATION, ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* MICROCHIP BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF
* PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS
* BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE
* THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER
* SIMILAR COSTS, WHETHER ASSERTED ON THE BASIS OF CONTRACT, TORT
* (INCLUDING NEGLIGENCE), BREACH OF WARRANTY, OR OTHERWISE.
*
*
* Author Date Comment
*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* Howard Schlunder 10/03/06 Original, copied from Compiler.h
* Ken Hesky 01/xx/10 Added MRF24WB0M-specific features
********************************************************************/
#ifndef __HARDWARE_PROFILE_H
#define __HARDWARE_PROFILE_H
#include "GenericTypeDefs.h"
#include "Compiler.h"
// Choose which hardware profile to compile for here. See
// the hardware profiles below for meaning of various options.
//#define PICDEMNET2
//#define PIC18_EXPLORER
//#define HPC_EXPLORER
//#define PIC24FJ64GA004_PIM // Explorer 16, but with the PIC24FJ64GA004 PIM module, which has significantly differnt pin mappings
//#define EXPLORER_16 // PIC24FJ128GA010, PIC24HJ256GP610, dsPIC33FJ256GP710, PIC32MX360F512L, PIC32MX460F512L, PIC32MX795F512L, etc. PIMs
//#define DSPICDEM11
//#define PIC32_GP_SK_DM320001 // PIC32MX360F512L General Purpose Starter Kit (for purposes of TCP/IP, defining this macro is the same as defining PIC32_USB_DM320003_1 or PIC32_USB_SK_DM320003_2)
//#define PIC32_USB_DM320003_1 // PIC32MX460F512L USB Starter Board (for purposes of TCP/IP, defining this macro is the same as defining PIC32_GP_SK_DM320001 or PIC32_USB_SK_DM320003_2)
//#define PIC32_USB_SK_DM320003_2 // PIC32MX795F512L USB Starter Kit II (for purposes of TCP/IP, defining this macro is the same as defining PIC32_GP_SK_DM320001 or PIC32_USB_DM320003_1)
#define PIC32_ENET_SK_DM320004 // PIC32MX795F512L Ethernet Starter Kit board with embedded Ethernet controller
//#define PIC24FJ256DA210_DEV_BOARD // PIC24FJ256DA210 Development Board (Graphics)
//#define YOUR_BOARD
// If no hardware profiles are defined, assume that we are using
// a Microchip demo board and try to auto-select the correct profile
// based on processor selected in MPLAB
#if !defined(PICDEMNET2) && !defined(PIC18_EXPLORER) && !defined(HPC_EXPLORER) && !defined(EXPLORER_16) && !defined(PIC24FJ64GA004_PIM) && !defined(DSPICDEM11) && !defined(PICDEMNET2) && !defined(INTERNET_RADIO) && !defined(YOUR_BOARD) && !defined(__PIC24FJ128GA006__) && !defined(PIC32_GP_SK_DM320001) && !defined(PIC32_USB_DM320003_1) && !defined(PIC32_USB_SK_DM320003_2) && !defined(PIC32_ENET_SK_DM320004) && !defined(PIC24FJ256DA210_DEV_BOARD)
#if defined(__18F97J60) || defined(_18F97J60)
#define PICDEMNET2
#elif defined(__18F67J60) || defined(_18F67J60)
#define INTERNET_RADIO
#elif defined(__18F8722) || defined(__18F87J10) || defined(_18F8722) || defined(_18F87J10) || defined(__18F87J11) || defined(_18F87J11)|| defined(__18F87J50) || defined(_18F87J50)
#define PIC18_EXPLORER
//#define HPC_EXPLORER
#elif defined(__PIC24FJ64GA004__)
#define PIC24FJ64GA004_PIM
#elif defined(__PIC24FJ256DA210__)
#define PIC24FJ256DA210_DEV_BOARD
#elif defined(__PIC24F__) || defined(__PIC24H__) || defined(__dsPIC33F__) || defined(__PIC32MX__)
#define EXPLORER_16
#elif defined(__dsPIC30F__)
#define DSPICDEM11
#endif
#endif
// Set configuration fuses (but only once)
#if defined(THIS_IS_STACK_APPLICATION)
#if defined(__18CXX)
#if defined(__EXTENDED18__)
#pragma config XINST=ON
#elif !defined(HI_TECH_C)
#pragma config XINST=OFF
#endif
#if defined(__18F8722) && !defined(HI_TECH_C)
// PICDEM HPC Explorer or PIC18 Explorer board
#pragma config OSC=HSPLL, FCMEN=OFF, IESO=OFF, PWRT=OFF, WDT=OFF, LVP=OFF
#elif defined(_18F8722) // HI-TECH PICC-18 compiler
// PICDEM HPC Explorer or PIC18 Explorer board with HI-TECH PICC-18 compiler
__CONFIG(1, HSPLL);
__CONFIG(2, WDTDIS);
__CONFIG(3, MCLREN);
__CONFIG(4, XINSTDIS & LVPDIS);
#elif defined(__18F87J10) && !defined(HI_TECH_C)
// PICDEM HPC Explorer or PIC18 Explorer board
#pragma config WDTEN=OFF, FOSC2=ON, FOSC=HSPLL
#elif defined(__18F87J11) && !defined(HI_TECH_C)
// PICDEM HPC Explorer or PIC18 Explorer board
#pragma config WDTEN=OFF, FOSC=HSPLL
#elif defined(__18F87J50) && !defined(HI_TECH_C)
// PICDEM HPC Explorer or PIC18 Explorer board
#pragma config WDTEN=OFF, FOSC=HSPLL, PLLDIV=3, CPUDIV=OSC1
#elif (defined(__18F97J60) || defined(__18F96J65) || defined(__18F96J60) || defined(__18F87J60) || defined(__18F86J65) || defined(__18F86J60) || defined(__18F67J60) || defined(__18F66J65) || defined(__18F66J60)) && !defined(HI_TECH_C)
// PICDEM.net 2 or any other PIC18F97J60 family device
#pragma config WDT=OFF, FOSC2=ON, FOSC=HSPLL, ETHLED=ON
#elif defined(_18F97J60) || defined(_18F96J65) || defined(_18F96J60) || defined(_18F87J60) || defined(_18F86J65) || defined(_18F86J60) || defined(_18F67J60) || defined(_18F66J65) || defined(_18F66J60)
// PICDEM.net 2 board with HI-TECH PICC-18 compiler
__CONFIG(1, WDTDIS & XINSTDIS);
__CONFIG(2, HSPLL);
__CONFIG(3, ETHLEDEN);
#elif defined(__18F4620) && !defined(HI_TECH_C)
#pragma config OSC=HSPLL, WDT=OFF, MCLRE=ON, PBADEN=OFF, LVP=OFF
#endif
#elif defined(__PIC24FJ256DA210__) || defined(__PIC24FJ256GB210__)
// PIC24FJ256DA210 Development Board (Graphics) or PIC24FJ256GB210 PIM on Explorer 16
_CONFIG3(ALTPMP_ALPMPDIS & SOSCSEL_EC); // PMP in default location, disable Timer1 oscillator so that RC13 can be used as a GPIO
_CONFIG2(FNOSC_PRIPLL & POSCMOD_XT & IOL1WAY_OFF & PLL96MHZ_ON & PLLDIV_DIV2); // Primary XT OSC with 96MHz PLL (8MHz crystal input), IOLOCK can be set and cleared
_CONFIG1(FWDTEN_OFF & ICS_PGx2 & JTAGEN_OFF & ALTVREF_ALTVREDIS); // Watchdog timer off, ICD debugging on PGEC2/PGED2 pins, JTAG off, AVREF and CVREF in default locations
#elif defined(__PIC24FJ256GB110__)
// PIC24FJ256GB110 PIM on Explorer 16
_CONFIG2(PLLDIV_DIV2 & PLL_96MHZ_ON & FNOSC_PRIPLL & IOL1WAY_OFF & POSCMOD_XT); // Primary XT OSC with 96MHz PLL (8MHz crystal input), IOLOCK can be set and cleared
_CONFIG1(JTAGEN_OFF & ICS_PGx2 & FWDTEN_OFF); // Watchdog timer off, ICD debugging on PGEC2/PGED2 pins, JTAG off
#elif defined(__PIC24FJ256GA110__)
// PIC24FJ256GA110 PIM on Explorer 16
_CONFIG2(FNOSC_PRIPLL & IOL1WAY_OFF & POSCMOD_XT); // Primary XT OSC with PLL, IOLOCK can be set and cleared
_CONFIG1(JTAGEN_OFF & ICS_PGx2 & FWDTEN_OFF); // Watchdog timer off, ICD debugging on PGEC2/PGED2 pins, JTAG off
#elif defined(__PIC24F__)
// Explorer 16 board
_CONFIG2(FNOSC_PRIPLL & POSCMOD_XT) // Primary XT OSC with 4x PLL
_CONFIG1(JTAGEN_OFF & FWDTEN_OFF) // JTAG off, watchdog timer off
#elif defined(__dsPIC33F__) || defined(__PIC24H__)
// Explorer 16 board
_FOSCSEL(FNOSC_PRIPLL) // PLL enabled
_FOSC(OSCIOFNC_OFF & POSCMD_XT) // XT Osc
_FWDT(FWDTEN_OFF) // Disable Watchdog timer
// JTAG should be disabled as well
#elif defined(__dsPIC30F__)
// dsPICDEM 1.1 board
_FOSC(XT_PLL16) // XT Osc + 16X PLL
_FWDT(WDT_OFF) // Disable Watchdog timer
_FBORPOR(MCLR_EN & PBOR_OFF & PWRT_OFF)
#elif defined(__PIC32MX__)
#pragma config FPLLODIV = DIV_1, FPLLMUL = MUL_20, FPLLIDIV = DIV_2, FWDTEN = OFF, FPBDIV = DIV_1, POSCMOD = XT, FNOSC = PRIPLL, CP = OFF
#if defined(PIC32_ENET_SK_DM320004)
#pragma config FMIIEN = OFF, FETHIO = OFF // external PHY in RMII/alternate configuration
#endif
#endif
#endif // Prevent more than one set of config fuse definitions
// Clock frequency value.
// This value is used to calculate Tick Counter value
#if defined(__18CXX)
// All PIC18 processors
#if defined(PICDEMNET2) || defined(INTERNET_RADIO)
#define GetSystemClock() (41666667ul) // Hz
#define GetInstructionClock() (GetSystemClock()/4)
#define GetPeripheralClock() GetInstructionClock()
#elif defined(__18F87J50) || defined(_18F87J50)
#define GetSystemClock() (48000000ul) // Hz
#define GetInstructionClock() (GetSystemClock()/4)
#define GetPeripheralClock() GetInstructionClock()
#else
#define GetSystemClock() (40000000ul) // Hz
#define GetInstructionClock() (GetSystemClock()/4)
#define GetPeripheralClock() GetInstructionClock()
#endif
#elif defined(__PIC24F__) || defined(__PIC24FK__)
// PIC24F processor
#define GetSystemClock() (32000000ul) // Hz
#define GetInstructionClock() (GetSystemClock()/2)
#define GetPeripheralClock() GetInstructionClock()
#elif defined(__PIC24H__)
// PIC24H processor
#define GetSystemClock() (80000000ul) // Hz
#define GetInstructionClock() (GetSystemClock()/2)
#define GetPeripheralClock() GetInstructionClock()
#elif defined(__dsPIC33F__)
// dsPIC33F processor
#define GetSystemClock() (80000000ul) // Hz
#define GetInstructionClock() (GetSystemClock()/2)
#define GetPeripheralClock() GetInstructionClock()
#elif defined(__dsPIC30F__)
// dsPIC30F processor
#define GetSystemClock() (117920000ul) // Hz
#define GetInstructionClock() (GetSystemClock()/4)
#define GetPeripheralClock() GetInstructionClock()
#elif defined(__PIC32MX__)
// PIC32MX processor
#define GetSystemClock() (80000000ul) // Hz
#define GetInstructionClock() (GetSystemClock()/1)
#define GetPeripheralClock() (GetInstructionClock()/1) // Set your divider according to your Peripheral Bus Frequency configuration fuse setting
#endif
// Hardware mappings
#if defined(PIC18_EXPLORER) && !defined(HI_TECH_C)
// PIC18 Explorer + Fast 100Mbps Ethernet PICtail Plus or Ethernet PICtail
// I/O pins
#define LED0_TRIS (TRISDbits.TRISD0)
#define LED0_IO (LATDbits.LATD0)
#define LED1_TRIS (TRISDbits.TRISD1)
#define LED1_IO (LATDbits.LATD1)
#define LED2_TRIS (TRISDbits.TRISD2)
#define LED2_IO (LATDbits.LATD2)
#define LED3_TRIS (TRISDbits.TRISD3)
#define LED3_IO (LATDbits.LATD3)
#define LED4_TRIS (TRISDbits.TRISD4)
#define LED4_IO (LATDbits.LATD4)
#define LED5_TRIS (TRISDbits.TRISD5)
#define LED5_IO (LATDbits.LATD5)
#define LED6_TRIS (TRISDbits.TRISD6)
#define LED6_IO (LATDbits.LATD6)
#define LED7_TRIS (TRISDbits.TRISD7)
#define LED7_IO (LATDbits.LATD7)
#define LED_GET() (LATD)
#define LED_PUT(a) (LATD = (a))
#define BUTTON0_TRIS (TRISAbits.TRISA5)
#define BUTTON0_IO (PORTAbits.RA5)
#define BUTTON1_TRIS (TRISBbits.TRISB0)
#define BUTTON1_IO (PORTBbits.RB0)
#define BUTTON2_TRIS (PRODL) // No Button2 on this board
#define BUTTON2_IO (1u)
#define BUTTON3_TRIS (PRODL) // No Button3 on this board
#define BUTTON3_IO (1u)
// // ENC424J600/624J600 Fast 100Mbps Ethernet PICtail Plus defines
// #define ENC100_INTERFACE_MODE 0 // Uncomment this line to use the ENC424J600/624J600 Ethernet controller (SPI mode) or comment it out to use some other network controller
//
// // ENC100_MDIX, ENC100_POR, and ENC100_INT are all optional. Simply leave
// // them commented out if you don't have such a hardware feature on your
// // board.
// #define ENC100_MDIX_TRIS (TRISBbits.TRISB4)
// #define ENC100_MDIX_IO (LATBbits.LATB4)
//// #define ENC100_POR_TRIS (TRISBbits.TRISB5)
//// #define ENC100_POR_IO (LATBbits.LATB5)
//// #define ENC100_INT_TRIS (TRISBbits.TRISB2)
//// #define ENC100_INT_IO (PORTBbits.RB2)
//
// // ENC424J600/624J600 SPI pinout
// #define ENC100_CS_TRIS (TRISBbits.TRISB3)
// #define ENC100_CS_IO (LATBbits.LATB3)
// #define ENC100_SO_WR_B0SEL_EN_TRIS (TRISCbits.TRISC4) // NOTE: SO is ENC624J600 Serial Out, which needs to connect to the PIC SDI pin for SPI mode
// #define ENC100_SO_WR_B0SEL_EN_IO (PORTCbits.RC4)
// #define ENC100_SI_RD_RW_TRIS (TRISCbits.TRISC5) // NOTE: SI is ENC624J600 Serial In, which needs to connect to the PIC SDO pin for SPI mode
// #define ENC100_SI_RD_RW_IO (LATCbits.LATC5)
// #define ENC100_SCK_AL_TRIS (TRISCbits.TRISC3)
// #define ENC100_SCK_AL_IO (PORTCbits.RC3) // NOTE: This must be the PORT, not the LATch like it is for the PSP interface.
//
// // ENC424J600/624J600 SPI SFR register selection (controls which SPI
// // peripheral to use on PICs with multiple SPI peripherals).
//// #define ENC100_ISR_ENABLE (INTCON3bits.INT2IE)
//// #define ENC100_ISR_FLAG (INTCON3bits.INT2IF)
//// #define ENC100_ISR_POLARITY (INTCON2bits.INTEDG2)
//// #define ENC100_ISR_PRIORITY (INTCON3bits.INT2IP)
// #define ENC100_SPI_ENABLE (ENC100_SPISTATbits.SPIEN)
// #define ENC100_SPI_IF (PIR1bits.SSPIF)
// #define ENC100_SSPBUF (SSP1BUF)
// #define ENC100_SPISTAT (SSP1STAT)
// #define ENC100_SPISTATbits (SSP1STATbits)
// #define ENC100_SPICON1 (SSP1CON1)
// #define ENC100_SPICON1bits (SSP1CON1bits)
// #define ENC100_SPICON2 (SSP1CON2)
// // ENC28J60 I/O pins
// #define ENC_RST_TRIS (TRISBbits.TRISB5)
// #define ENC_RST_IO (LATBbits.LATB5)
// #define ENC_CS_TRIS (TRISBbits.TRISB3) // Uncomment this line to use the ENC28J60 Ethernet controller or comment it out to use some other network controller
// #define ENC_CS_IO (LATBbits.LATB3)
// #define ENC_SCK_TRIS (TRISCbits.TRISC3)
// #define ENC_SDI_TRIS (TRISCbits.TRISC4)
// #define ENC_SDO_TRIS (TRISCbits.TRISC5)
// #define ENC_SPI_IF (PIR1bits.SSPIF)
// #define ENC_SSPBUF (SSP1BUF)
// #define ENC_SPISTAT (SSP1STAT)
// #define ENC_SPISTATbits (SSP1STATbits)
// #define ENC_SPICON1 (SSP1CON1)
// #define ENC_SPICON1bits (SSP1CON1bits)
// #define ENC_SPICON2 (SSP1CON2)
// //----------------
// // MRF24WB0M I/O pins
// //----------------
// #define WF_CS_TRIS (TRISCbits.TRISC2) // Uncomment this line if you wish to use the MRF24WB0M on the PICDEM.net 2 board instead of the internal PIC18F97J60 Ethernet module
// #define WF_SDI_TRIS (TRISCbits.TRISC4)
// #define WF_SCK_TRIS (TRISCbits.TRISC3)
// #define WF_SDO_TRIS (TRISCbits.TRISC5)
// #define WF_RESET_TRIS (TRISBbits.TRISB1)
// #define WF_RESET_IO (LATBbits.LATB1)
// #define WF_INT_TRIS (TRISBbits.TRISB0)
// #define WF_INT_IO (PORTBbits.RB0)
// #define WF_CS_IO (LATCbits.LATC2)
// #define WF_HIBERNATE_TRIS (TRISBbits.TRISB2)
// #define WF_HIBERNATE_IO (PORTBbits.RB2)
// #define WF_INT_EDGE (INTCON2bits.INTEDG0)
// #define WF_INT_IE (INTCONbits.INT0IE)
// #define WF_INT_IF (INTCONbits.INT0IF)
// #define WF_SPI_IF (PIR1bits.SSPIF)
// #define WF_SSPBUF (SSP1BUF)
// #define WF_SPISTAT (SSP1STAT)
// #define WF_SPISTATbits (SSP1STATbits)
// #define WF_SPICON1 (SSP1CON1)
// #define WF_SPICON1bits (SSP1CON1bits)
// #define WF_SPICON2 (SSP1CON2)
// #define WF_SPI_IE (PIE1bits.SSPIE)
// #define WF_SPI_IP (IPR1bits.SSPIP)
// // 25LC256 I/O pins
// #define EEPROM_CS_TRIS (TRISAbits.TRISA3)
// #define EEPROM_CS_IO (LATAbits.LATA3)
// #define EEPROM_SCK_TRIS (TRISCbits.TRISC3)
// #define EEPROM_SDI_TRIS (TRISCbits.TRISC4)
// #define EEPROM_SDO_TRIS (TRISCbits.TRISC5)
// #define EEPROM_SPI_IF (PIR1bits.SSPIF)
// #define EEPROM_SSPBUF (SSP1BUF)
// #define EEPROM_SPICON1 (SSP1CON1)
// #define EEPROM_SPICON1bits (SSP1CON1bits)
// #define EEPROM_SPICON2 (SSP1CON2)
// #define EEPROM_SPISTAT (SSP1STAT)
// #define EEPROM_SPISTATbits (SSP1STATbits)
// LCD I/O pins
// TODO: Need to add support for LCD behind MCP23S17 I/O expander. This
// requires code that isn't in the TCP/IP stack, not just a hardware
// profile change.
// Serial Flash/SRAM/UART PICtail
// #define SPIRAM_CS_TRIS (TRISBbits.TRISB5)
// #define SPIRAM_CS_IO (LATBbits.LATB5)
// #define SPIRAM_SCK_TRIS (TRISCbits.TRISC3)
// #define SPIRAM_SDI_TRIS (TRISCbits.TRISC4)
// #define SPIRAM_SDO_TRIS (TRISCbits.TRISC5)
// #define SPIRAM_SPI_IF (PIR1bits.SSPIF)
// #define SPIRAM_SSPBUF (SSP1BUF)
// #define SPIRAM_SPICON1 (SSP1CON1)
// #define SPIRAM_SPICON1bits (SSP1CON1bits)
// #define SPIRAM_SPICON2 (SSP1CON2)
// #define SPIRAM_SPISTAT (SSP1STAT)
// #define SPIRAM_SPISTATbits (SSP1STATbits)
//
// // NOTE: You must also set the SPI_FLASH_SST/SPI_FLASH_SPANSION,
// // SPI_FLASH_SECTOR_SIZE, and SPI_FLASH_PAGE_SIZE macros in
// // SPIFlash.h to match your particular Flash memory chip!!!
// #define SPIFLASH_CS_TRIS (TRISBbits.TRISB4)
// #define SPIFLASH_CS_IO (LATBbits.LATB4)
// #define SPIFLASH_SCK_TRIS (TRISCbits.TRISC3)
// #define SPIFLASH_SDI_TRIS (TRISCbits.TRISC4)
// #define SPIFLASH_SDI_IO (PORTCbits.RC4)
// #define SPIFLASH_SDO_TRIS (TRISCbits.TRISC5)
// #define SPIFLASH_SPI_IF (PIR1bits.SSPIF)
// #define SPIFLASH_SSPBUF (SSP1BUF)
// #define SPIFLASH_SPICON1 (SSP1CON1)
// #define SPIFLASH_SPICON1bits (SSP1CON1bits)
// #define SPIFLASH_SPICON2 (SSP1CON2)
// #define SPIFLASH_SPISTAT (SSP1STAT)
// #define SPIFLASH_SPISTATbits (SSP1STATbits)
// Register name fix up for certain processors
#define SPBRGH SPBRGH1
#if defined(__18F87J50) || defined(_18F87J50) || defined(__18F87J11) || defined(_18F87J11)
#define ADCON2 ADCON1
#endif
#elif defined(PIC18_EXPLORER) && defined(HI_TECH_C)
// PIC18 Explorer + Fast 100Mbps Ethernet PICtail Plus or Ethernet PICtail + HI-TECH PICC-18 compiler
// I/O pins
#define LED0_TRIS (TRISD0)
#define LED0_IO (LATD0)
#define LED1_TRIS (TRISD1)
#define LED1_IO (LATD1)
#define LED2_TRIS (TRISD2)
#define LED2_IO (LATD2)
#define LED3_TRIS (TRISD3)
#define LED3_IO (LATD3)
#define LED4_TRIS (TRISD4)
#define LED4_IO (LATD4)
#define LED5_TRIS (TRISD5)
#define LED5_IO (LATD5)
#define LED6_TRIS (TRISD6)
#define LED6_IO (LATD6)
#define LED7_TRIS (TRISD7)
#define LED7_IO (LATD7)
#define LED_GET() (LATD)
#define LED_PUT(a) (LATD = (a))
#define BUTTON0_TRIS (TRISA5)
#define BUTTON0_IO (RA5)
#define BUTTON1_TRIS (TRISB0)
#define BUTTON1_IO (RB0)
#define BUTTON2_TRIS (PRODL) // No Button2 on this board
#define BUTTON2_IO (1u)
#define BUTTON3_TRIS (PRODL) // No Button3 on this board
#define BUTTON3_IO (1u)
// // ENC424J600/624J600 Fast 100Mbps Ethernet PICtail Plus defines
// #define ENC100_INTERFACE_MODE 0 // Uncomment this line to use the ENC424J600/624J600 Ethernet controller (SPI mode) or comment it out to use some other network controller
//
// // ENC100_MDIX, ENC100_POR, and ENC100_INT are all optional. Simply leave
// // them commented out if you don't have such a hardware feature on your
// // hardware.
// #define ENC100_MDIX_TRIS (TRISB4)
// #define ENC100_MDIX_IO (LATB4)
//// #define ENC100_POR_TRIS (TRISB5)
//// #define ENC100_POR_IO (LATB5)
//// #define ENC100_INT_TRIS (TRISB2)
//// #define ENC100_INT_IO (RB2)
//
// // ENC424J600/624J600 SPI pinout
// #define ENC100_CS_TRIS (TRISB3)
// #define ENC100_CS_IO (LATB3)
// #define ENC100_SO_WR_B0SEL_EN_TRIS (TRISC4) // NOTE: SO is ENC624J600 Serial Out, which needs to connect to the PIC SDI pin for SPI mode
// #define ENC100_SO_WR_B0SEL_EN_IO (RC4)
// #define ENC100_SI_RD_RW_TRIS (TRISC5) // NOTE: SI is ENC624J600 Serial In, which needs to connect to the PIC SDO pin for SPI mode
// #define ENC100_SI_RD_RW_IO (LATC5)
// #define ENC100_SCK_AL_TRIS (TRISC3)
// #define ENC100_SCK_AL_IO (RC3) // NOTE: This must be the PORT, not the LATch like it is for the PSP interface.
//
// // ENC424J600/624J600 SPI SFR register selection (controls which SPI
// // peripheral to use on PICs with multiple SPI peripherals).
//// #define ENC100_ISR_ENABLE (INT2IE)
//// #define ENC100_ISR_FLAG (INT2IF)
//// #define ENC100_ISR_POLARITY (INTEDG2)
//// #define ENC100_ISR_PRIORITY (INT2IP)
// #define ENC100_SPI_ENABLE (ENC100_SPISTATbits.SPIEN)
// #define ENC100_SPI_IF (SSP1IF)
// #define ENC100_SSPBUF (SSP1BUF)
// #define ENC100_SPISTAT (SSP1STAT)
// #define ENC100_SPISTATbits (SSP1STATbits)
// #define ENC100_SPICON1 (SSP1CON1)
// #define ENC100_SPICON1bits (SSP1CON1bits)
// #define ENC100_SPICON2 (SSP1CON2)
// // ENC28J60 I/O pins
// #define ENC_RST_TRIS (TRISB5)
// #define ENC_RST_IO (LATB5)
// #define ENC_CS_TRIS (TRISB3) // Uncomment this line to use the ENC28J60 Ethernet controller or comment it out to use some other network controller
// #define ENC_CS_IO (LATB3)
// #define ENC_SCK_TRIS (TRISC3)
// #define ENC_SDI_TRIS (TRISC4)
// #define ENC_SDO_TRIS (TRISC5)
// #define ENC_SPI_IF (SSP1IF)
// #define ENC_SSPBUF (SSP1BUF)
// #define ENC_SPISTAT (SSP1STAT)
// #define ENC_SPISTATbits (SSP1STATbits)
// #define ENC_SPICON1 (SSP1CON1)
// #define ENC_SPICON1bits (SSP1CON1bits)
// #define ENC_SPICON2 (SSP1CON2)
// //----------------
// // MRF24WB0M I/O pins
// //----------------
// #define WF_CS_TRIS (TRISCbits.TRISC2) // Uncomment this line if you wish to use the MRF24WB0M on the PICDEM.net 2 board instead of the internal PIC18F97J60 Ethernet module
// #define WF_SDI_TRIS (TRISCbits.TRISC4)
// #define WF_SCK_TRIS (TRISCbits.TRISC3)
// #define WF_SDO_TRIS (TRISCbits.TRISC5)
// #define WF_RESET_TRIS (TRISBbits.TRISB1)
// #define WF_RESET_IO (LATBbits.LATB1)
// #define WF_INT_TRIS (TRISBbits.TRISB0)
// #define WF_INT_IO (PORTBbits.RB0)
// #define WF_CS_IO (LATCbits.LATC2)
// #define WF_HIBERNATE_TRIS (TRISBbits.TRISB2)
// #define WF_HIBERNATE_IO (PORTBbits.RB2)
// #define WF_INT_EDGE (INTCON2bits.INTEDG0)
// #define WF_INT_IE (INTCONbits.INT0IE)
// #define WF_INT_IF (INTCONbits.INT0IF)
// #define WF_SPI_IF (PIR1bits.SSPIF)
// #define WF_SSPBUF (SSP1BUF)
// #define WF_SPISTAT (SSP1STAT)
// #define WF_SPISTATbits (SSP1STATbits)
// #define WF_SPICON1 (SSP1CON1)
// #define WF_SPICON1bits (SSP1CON1bits)
// #define WF_SPICON2 (SSP1CON2)
// #define WF_SPI_IE (PIE1bits.SSPIE)
// #define WF_SPI_IP (IPR1bits.SSPIP)
// // 25LC256 I/O pins
// #define EEPROM_CS_TRIS (TRISA3)
// #define EEPROM_CS_IO (LATA3)
// #define EEPROM_SCK_TRIS (TRISC3)
// #define EEPROM_SDI_TRIS (TRISC4)
// #define EEPROM_SDO_TRIS (TRISC5)
// #define EEPROM_SPI_IF (SSP1IF)
// #define EEPROM_SSPBUF (SSP1BUF)
// #define EEPROM_SPICON1 (SSP1CON1)
// #define EEPROM_SPICON1bits (SSP1CON1bits)
// #define EEPROM_SPICON2 (SSP1CON2)
// #define EEPROM_SPISTAT (SSP1STAT)
// #define EEPROM_SPISTATbits (SSP1STATbits)
// LCD I/O pins
// TODO: Need to add support for LCD behind MCP23S17 I/O expander. This
// requires code that isn't in the TCP/IP stack, not just a hardware
// profile change.
// Register name fix up for certain processors
#define SPBRGH SPBRGH1
#define TXSTAbits TXSTA1bits
#define RCSTAbits RCSTA1bits
#define BAUDCONbits BAUDCON1bits
#define GO GODONE
#if defined(__18F87J50) || defined(_18F87J50) || defined(__18F87J11) || defined(_18F87J11)
#define ADCON2 ADCON1
#endif
#elif defined(HPC_EXPLORER) && !defined(HI_TECH_C)
// PICDEM HPC Explorer + Fast 100Mbps Ethernet PICtail Plus or Ethernet PICtail
// I/O pins
#define LED0_TRIS (TRISDbits.TRISD0)
#define LED0_IO (LATDbits.LATD0)
#define LED1_TRIS (TRISDbits.TRISD1)
#define LED1_IO (LATDbits.LATD1)
#define LED2_TRIS (TRISDbits.TRISD2)
#define LED2_IO (LATDbits.LATD2)
#define LED3_TRIS (TRISDbits.TRISD3)
#define LED3_IO (LATDbits.LATD3)
#define LED4_TRIS (TRISDbits.TRISD4)
#define LED4_IO (LATDbits.LATD4)
#define LED5_TRIS (TRISDbits.TRISD5)
#define LED5_IO (LATDbits.LATD5)
#define LED6_TRIS (TRISDbits.TRISD6)
#define LED6_IO (LATDbits.LATD6)
#define LED7_TRIS (TRISDbits.TRISD7)
#define LED7_IO (LATDbits.LATD7)
#define LED_GET() (LATD)
#define LED_PUT(a) (LATD = (a))
#define BUTTON0_TRIS (TRISBbits.TRISB0)
#define BUTTON0_IO (PORTBbits.RB0)
#define BUTTON1_TRIS (TRISBbits.TRISB0) // No Button1 on this board, remap to Button0
#define BUTTON1_IO (PORTBbits.RB0)
#define BUTTON2_TRIS (TRISBbits.TRISB0) // No Button2 on this board, remap to Button0
#define BUTTON2_IO (PORTBbits.RB0)
#define BUTTON3_TRIS (TRISBbits.TRISB0) // No Button3 on this board, remap to Button0
#define BUTTON3_IO (PORTBbits.RB0)
// // ENC424J600/624J600 Fast 100Mbps Ethernet PICtail Plus defines
// #define ENC100_INTERFACE_MODE 0 // Uncomment this line to use the ENC424J600/624J600 Ethernet controller (SPI mode) or comment it out to use some other network controller
//
// // ENC424J600/624J600 Fast 100Mbps Ethernet PICtail Plus I/O pins
// #define ENC100_MDIX_TRIS (TRISBbits.TRISB4)
// #define ENC100_MDIX_IO (LATBbits.LATB4)
// #define ENC100_POR_TRIS (TRISBbits.TRISB5)
// #define ENC100_POR_IO (LATBbits.LATB5)
//// #define ENC100_INT_TRIS (TRISBbits.TRISB2)
//// #define ENC100_INT_IO (PORTBbits.RB2)
//
// // ENC424J600/624J600 SPI pinout
// #define ENC100_CS_TRIS (TRISBbits.TRISB3)
// #define ENC100_CS_IO (LATBbits.LATB3)
// #define ENC100_SO_WR_B0SEL_EN_TRIS (TRISCbits.TRISC4) // NOTE: SO is ENC624J600 Serial Out, which needs to connect to the PIC SDI pin for SPI mode
// #define ENC100_SO_WR_B0SEL_EN_IO (PORTCbits.RC4)
// #define ENC100_SI_RD_RW_TRIS (TRISCbits.TRISC5) // NOTE: SI is ENC624J600 Serial In, which needs to connect to the PIC SDO pin for SPI mode
// #define ENC100_SI_RD_RW_IO (LATCbits.LATC5)
// #define ENC100_SCK_AL_TRIS (TRISCbits.TRISC3)
// #define ENC100_SCK_AL_IO (PORTCbits.RC3) // NOTE: This must be the PORT, not the LATch like it is for the PSP interface.
//
// // ENC424J600/624J600 SPI SFR register selection (controls which SPI
// // peripheral to use on PICs with multiple SPI peripherals).
//// #define ENC100_ISR_ENABLE (INTCON3bits.INT2IE)
//// #define ENC100_ISR_FLAG (INTCON3bits.INT2IF)
//// #define ENC100_ISR_POLARITY (INTCON2bits.INTEDG2)
//// #define ENC100_ISR_PRIORITY (INTCON3bits.INT2IP)
// #define ENC100_SPI_ENABLE (ENC100_SPISTATbits.SPIEN)
// #define ENC100_SPI_IF (PIR1bits.SSPIF)
// #define ENC100_SSPBUF (SSP1BUF)
// #define ENC100_SPISTAT (SSP1STAT)
// #define ENC100_SPISTATbits (SSP1STATbits)
// #define ENC100_SPICON1 (SSP1CON1)
// #define ENC100_SPICON1bits (SSP1CON1bits)
// #define ENC100_SPICON2 (SSP1CON2)
// // ENC28J60 I/O pins
// #define ENC_RST_TRIS (TRISBbits.TRISB5)
// #define ENC_RST_IO (LATBbits.LATB5)
// #define ENC_CS_TRIS (TRISBbits.TRISB3) // Uncomment this line to use the ENC28J60 Ethernet controller or comment it out to use some other network controller
// #define ENC_CS_IO (LATBbits.LATB3)
// #define ENC_SCK_TRIS (TRISCbits.TRISC3)
// #define ENC_SDI_TRIS (TRISCbits.TRISC4)
// #define ENC_SDO_TRIS (TRISCbits.TRISC5)
// #define ENC_SPI_IF (PIR1bits.SSPIF)
// #define ENC_SSPBUF (SSP1BUF)
// #define ENC_SPISTAT (SSP1STAT)
// #define ENC_SPISTATbits (SSP1STATbits)
// #define ENC_SPICON1 (SSP1CON1)
// #define ENC_SPICON1bits (SSP1CON1bits)
// #define ENC_SPICON2 (SSP1CON2)
// // 25LC256 I/O pins
// #define EEPROM_CS_TRIS (TRISBbits.TRISB4)
// #define EEPROM_CS_IO (LATBbits.LATB4)
// #define EEPROM_SCK_TRIS (TRISCbits.TRISC3)
// #define EEPROM_SDI_TRIS (TRISCbits.TRISC4)
// #define EEPROM_SDO_TRIS (TRISCbits.TRISC5)
// #define EEPROM_SPI_IF (PIR1bits.SSPIF)
// #define EEPROM_SSPBUF (SSP1BUF)
// #define EEPROM_SPICON1 (SSP1CON1)
// #define EEPROM_SPICON1bits (SSP1CON1bits)
// #define EEPROM_SPICON2 (SSP1CON2)
// #define EEPROM_SPISTAT (SSP1STAT)
// #define EEPROM_SPISTATbits (SSP1STATbits)
// Register name fix up for certain processors
#define SPBRGH SPBRGH1
#if defined(__18F87J50) || defined(_18F87J50) || defined(__18F87J11) || defined(_18F87J11)
#define ADCON2 ADCON1
#endif
#elif defined(HPC_EXPLORER) && defined(HI_TECH_C)
// PICDEM HPC Explorer + Ethernet PICtail
#define TXSTA TXSTA1
#define RCSTA RCSTA1
#define SPBRG SPBRG1
#define SPBRGH SPBRGH1
#define RCREG RCREG1
#define TXREG TXREG1
// I/O pins
#define LED0_TRIS (TRISD0)
#define LED0_IO (LATD0)
#define LED1_TRIS (TRISD1)
#define LED1_IO (LATD1)
#define LED2_TRIS (TRISD2)
#define LED2_IO (LATD2)
#define LED3_TRIS (TRISD3)
#define LED3_IO (LATD3)
#define LED4_TRIS (TRISD4)
#define LED4_IO (LATD4)
#define LED5_TRIS (TRISD5)
#define LED5_IO (LATD5)
#define LED6_TRIS (TRISD6)
#define LED6_IO (LATD6)
#define LED7_TRIS (TRISD7)
#define LED7_IO (LATD7)
#define LED_GET() (LATD)
#define LED_PUT(a) (LATD = (a))
#define BUTTON0_TRIS (TRISB0)
#define BUTTON0_IO (RB0)
#define BUTTON1_TRIS (TRISB0) // No Button1 on this board, remap to Button0
#define BUTTON1_IO (RB0)
#define BUTTON2_TRIS (TRISB0) // No Button2 on this board, remap to Button0
#define BUTTON2_IO (RB0)
#define BUTTON3_TRIS (TRISB0) // No Button3 on this board, remap to Button0
#define BUTTON3_IO (RB0)
// // ENC28J60 I/O pins
// #define ENC_RST_TRIS (TRISB5)
// #define ENC_RST_IO (LATB5)
// #define ENC_CS_TRIS (TRISB3)
// #define ENC_CS_IO (LATB3)
// #define ENC_SCK_TRIS (TRISC3)
// #define ENC_SDI_TRIS (TRISC4)
// #define ENC_SDO_TRIS (TRISC5)
// #define ENC_SPI_IF (SSP1IF)
// #define ENC_SSPBUF (SSP1BUF)
// #define ENC_SPISTAT (SSP1STAT)
// #define ENC_SPISTATbits (SSP1STATbits)
// #define ENC_SPICON1 (SSP1CON1)
// #define ENC_SPICON1bits (SSP1CON1bits)
// #define ENC_SPICON2 (SSP1CON2)
// // 25LC256 I/O pins
// #define EEPROM_CS_TRIS (TRISB4)
// #define EEPROM_CS_IO (LATB4)
// #define EEPROM_SCK_TRIS (TRISC3)
// #define EEPROM_SDI_TRIS (TRISC4)
// #define EEPROM_SDO_TRIS (TRISC5)
// #define EEPROM_SPI_IF (SSP1IF)
// #define EEPROM_SSPBUF (SSP1BUF)
// #define EEPROM_SPICON1 (SSP1CON1)
// #define EEPROM_SPICON1bits (SSP1CON1bits)
// #define EEPROM_SPICON2 (SSP1CON2)
// #define EEPROM_SPISTAT (SSP1STAT)
// #define EEPROM_SPISTATbits (SSP1STATbits)
#elif defined(PIC24FJ64GA004_PIM)
// Explorer 16 + PIC24FJ64GA004 PIM + Ethernet PICtail Plus
// Push Button I/O pins
#define BUTTON3_TRIS TRISAbits.TRISA10 // Mutliplexed with LED0
#define BUTTON3_IO PORTAbits.RA10
#define BUTTON2_TRIS TRISAbits.TRISA9 // Multiplexed with LED4
#define BUTTON2_IO PORTAbits.RA9
#define BUTTON1_TRIS TRISCbits.TRISC6 // Multiplexed with LED7
#define BUTTON1_IO PORTCbits.RC6
#define BUTTON0_TRIS TRISAbits.TRISA7 // Multiplexed with LED1
#define BUTTON0_IO PORTAbits.RA7
// LED I/O pins
#define LED0_TRIS TRISAbits.TRISA10 // Multiplexed with BUTTON3
#define LED0_IO LATAbits.LATA10
#define LED1_TRIS TRISAbits.TRISA7 // Multiplexed with BUTTON0
#define LED1_IO LATAbits.LATA7
#define LED2_TRIS TRISBbits.TRISB8 // Multiplexed with LCD_DATA4
#define LED2_IO LATBbits.LATB8
#define LED3_TRIS TRISBbits.TRISB9 // Multiplexed with LCD_DATA3
#define LED3_IO LATBbits.LATB9
#define LED4_TRIS TRISAbits.TRISA9 // Multiplexed with BUTTON2
#define LED4_IO LATAbits.LATA9
#define LED5_TRIS TRISAbits.TRISA8 // Multiplexed with EEPROM_CS
#define LED5_IO LATAbits.LATA8
#define LED6_TRIS TRISBbits.TRISB12 // Multiplexed with LCD_DATA0
#define LED6_IO LATBbits.LATB12
#define LED7_TRIS TRISCbits.TRISC6 // Multiplexed with BUTTON1
#define LED7_IO LATCbits.LATC6
#define LED_GET() (0u)
#define LED_PUT(a)
// UART I/O Mapping
#define UARTTX_TRIS (TRISCbits.TRISC9)
#define UARTTX_IO (PORTCbits.RC9)
#define UARTRX_TRIS (TRISCbits.TRISC3)
#define UARTRX_IO (PORTCbits.RC3)
// // ENC28J60 I/O pins
// #define ENC_RST_TRIS (TRISCbits.TRISC8) // Not connected by default
// #define ENC_RST_IO (PORTCbits.RC8)
// #define ENC_CS_TRIS (TRISBbits.TRISB3)
// #define ENC_CS_IO (PORTBbits.RB3)
// // SPI SCK, SDI, SDO pins are automatically controlled by the
// // PIC24/dsPIC/PIC32 SPI module
// #define ENC_SPI_IF (IFS0bits.SPI1IF)
// #define ENC_SSPBUF (SPI1BUF)
// #define ENC_SPISTAT (SPI1STAT)
// #define ENC_SPISTATbits (SPI1STATbits)
// #define ENC_SPICON1 (SPI1CON1)
// #define ENC_SPICON1bits (SPI1CON1bits)
// #define ENC_SPICON2 (SPI1CON2)
// // 25LC256 I/O pins
// #define EEPROM_CS_TRIS (TRISAbits.TRISA8)
// #define EEPROM_CS_IO (PORTAbits.RA8)
// #define EEPROM_SCK_TRIS (TRISCbits.TRISC8)
// #define EEPROM_SDI_TRIS (TRISCbits.TRISC4)
// #define EEPROM_SDO_TRIS (TRISCbits.TRISC5)
// #define EEPROM_SPI_IF (IFS2bits.SPI2IF)
// #define EEPROM_SSPBUF (SPI2BUF)
// #define EEPROM_SPICON1 (SPI2CON1)
// #define EEPROM_SPICON1bits (SPI2CON1bits)
// #define EEPROM_SPICON2 (SPI2CON2)
// #define EEPROM_SPISTAT (SPI2STAT)
// #define EEPROM_SPISTATbits (SPI2STATbits)
// LCD Module I/O pins
#define LCD_DATA0_TRIS (TRISBbits.TRISB12) // Multiplexed with LED6
#define LCD_DATA0_IO (LATBbits.LATB12)
#define LCD_DATA1_TRIS (TRISBbits.TRISB11)
#define LCD_DATA1_IO (LATBbits.LATB11)
#define LCD_DATA2_TRIS (TRISBbits.TRISB10)
#define LCD_DATA2_IO (LATBbits.LATB10)
#define LCD_DATA3_TRIS (TRISBbits.TRISB9) // Multiplexed with LED3
#define LCD_DATA3_IO (LATBbits.LATB9)
#define LCD_DATA4_TRIS (TRISBbits.TRISB8) // Multiplexed with LED2
#define LCD_DATA4_IO (LATBbits.LATB8)
#define LCD_DATA5_TRIS (TRISBbits.TRISB7)
#define LCD_DATA5_IO (LATBbits.LATB7)
#define LCD_DATA6_TRIS (TRISBbits.TRISB6)
#define LCD_DATA6_IO (LATBbits.LATB6)
#define LCD_DATA7_TRIS (TRISBbits.TRISB5)
#define LCD_DATA7_IO (LATBbits.LATB5)
#define LCD_RD_WR_TRIS (TRISBbits.TRISB13)
#define LCD_RD_WR_IO (LATBbits.LATB13)
#define LCD_RS_TRIS (TRISCbits.TRISC7)
#define LCD_RS_IO (LATCbits.LATC7)
#define LCD_E_TRIS (TRISBbits.TRISB14)
#define LCD_E_IO (LATBbits.LATB14)
// Peripheral Pin Select Outputs
#define NULL_IO 0
#define C1OUT_IO 1
#define C2OUT_IO 2
#define U1TX_IO 3
#define U1RTS_IO 4
#define U2TX_IO 5
#define U2RTS_IO 6
#define SDO1_IO 7
#define SCK1OUT_IO 8
#define SS1OUT_IO 9
#define SDO2_IO 10
#define SCK2OUT_IO 11
#define SS2OUT_IO 12
#define OC1_IO 18
#define OC2_IO 19
#define OC3_IO 20
#define OC4_IO 21
#define OC5_IO 22
#elif defined(EXPLORER_16)
// Explorer 16 + PIC24FJ128GA010/PIC24HJ256GP610/dsPIC33FJ256GP710/
// PIC32MX460F512L/PIC32MX360F512L/PIC32MX795F512L PIM +
// Fast 100Mbps Ethernet PICtail Plus or Ethernet PICtail Plus or MRF24WB0M WiFi PICtail Plus
#define LED0_TRIS (TRISAbits.TRISA0) // Ref D3
#define LED0_IO (LATAbits.LATA0)
#define LED1_TRIS (TRISAbits.TRISA1) // Ref D4
#define LED1_IO (LATAbits.LATA1)
#define LED2_TRIS (TRISAbits.TRISA2) // Ref D5
#define LED2_IO (LATAbits.LATA2)
#define LED3_TRIS (TRISAbits.TRISA3) // Ref D6
#define LED3_IO (LATAbits.LATA3)
#define LED4_TRIS (TRISAbits.TRISA4) // Ref D7
#define LED4_IO (LATAbits.LATA4)
#define LED5_TRIS (TRISAbits.TRISA5) // Ref D8
#define LED5_IO (LATAbits.LATA5)
#define LED6_TRIS (TRISAbits.TRISA6) // Ref D9
#define LED6_IO (LATAbits.LATA6)
#define LED7_TRIS (TRISAbits.TRISA7) // Ref D10 // Note: This is multiplexed with BUTTON1
#define LED7_IO (LATAbits.LATA7)
#define LED_GET() (*((volatile unsigned char*)(&LATA)))
#define LED_PUT(a) (*((volatile unsigned char*)(&LATA)) = (a))
#define BUTTON0_TRIS (TRISDbits.TRISD13) // Ref S4
#define BUTTON0_IO (PORTDbits.RD13)
#define BUTTON1_TRIS (TRISAbits.TRISA7) // Ref S5 // Note: This is multiplexed with LED7
#define BUTTON1_IO (PORTAbits.RA7)
#define BUTTON2_TRIS (TRISDbits.TRISD7) // Ref S6
#define BUTTON2_IO (PORTDbits.RD7)
#define BUTTON3_TRIS (TRISDbits.TRISD6) // Ref S3
#define BUTTON3_IO (PORTDbits.RD6)
#define UARTTX_TRIS (TRISFbits.TRISF5)
#define UARTTX_IO (PORTFbits.RF5)
#define UARTRX_TRIS (TRISFbits.TRISF4)
#define UARTRX_IO (PORTFbits.RF4)
// // ENC28J60 I/O pins
// #if defined(__PIC24FJ256GA110__) // PIC24FJ256GA110 must place the ENC28J60 on SPI2 because PIC rev A3 SCK1 output pin is a PPS input only (fixed on A5, but demos use SPI2 for simplicity)
// #define ENC_CS_TRIS (TRISFbits.TRISF12) // Comment this line out if you are using the ENC424J600/624J600, MRF24WB0M, or other network controller.
// #define ENC_CS_IO (LATFbits.LATF12)
// // SPI SCK, SDI, SDO pins are automatically controlled by the
// // PIC24/dsPIC/PIC32 SPI module
// #define ENC_SPI_IF (IFS2bits.SPI2IF)
// #define ENC_SSPBUF (SPI2BUF)
// #define ENC_SPISTAT (SPI2STAT)
// #define ENC_SPISTATbits (SPI2STATbits)
// #define ENC_SPICON1 (SPI2CON1)
// #define ENC_SPICON1bits (SPI2CON1bits)
// #define ENC_SPICON2 (SPI2CON2)
// #else // SPI1 for all other processors
// #define ENC_CS_TRIS (TRISDbits.TRISD14) // Comment this line out if you are using the ENC424J600/624J600, MRF24WB0M, or other network controller.
// #define ENC_CS_IO (LATDbits.LATD14)
// // SPI SCK, SDI, SDO pins are automatically controlled by the
// // PIC24/dsPIC/PIC32 SPI module
// #if defined(__C30__) // PIC24F, PIC24H, dsPIC30, dsPIC33
// #define ENC_SPI_IF (IFS0bits.SPI1IF)
// #define ENC_SSPBUF (SPI1BUF)
// #define ENC_SPISTAT (SPI1STAT)
// #define ENC_SPISTATbits (SPI1STATbits)
// #define ENC_SPICON1 (SPI1CON1)
// #define ENC_SPICON1bits (SPI1CON1bits)
// #define ENC_SPICON2 (SPI1CON2)
// #else // PIC32
// #define ENC_SPI_IF (IFS0bits.SPI1RXIF)
// #define ENC_SSPBUF (SPI1BUF)
// #define ENC_SPISTATbits (SPI1STATbits)
// #define ENC_SPICON1 (SPI1CON)
// #define ENC_SPICON1bits (SPI1CONbits)
// #define ENC_SPIBRG (SPI1BRG)
// #endif
// #endif
// // ENC624J600 Interface Configuration
// // Comment out ENC100_INTERFACE_MODE if you don't have an ENC624J600 or
// // ENC424J600. Otherwise, choose the correct setting for the interface you
// // are using. Legal values are:
// // - Commented out: No ENC424J600/624J600 present or used. All other
// // ENC100_* macros are ignored.
// // - 0: SPI mode using CS, SCK, SI, and SO pins
// // - 1: 8-bit demultiplexed PSP Mode 1 with RD and WR pins
// // - 2: *8-bit demultiplexed PSP Mode 2 with R/Wbar and EN pins
// // - 3: *16-bit demultiplexed PSP Mode 3 with RD, WRL, and WRH pins
// // - 4: *16-bit demultiplexed PSP Mode 4 with R/Wbar, B0SEL, and B1SEL pins
// // - 5: 8-bit multiplexed PSP Mode 5 with RD and WR pins
// // - 6: *8-bit multiplexed PSP Mode 6 with R/Wbar and EN pins
// // - 9: 16-bit multiplexed PSP Mode 9 with AL, RD, WRL, and WRH pins
// // - 10: *16-bit multiplexed PSP Mode 10 with AL, R/Wbar, B0SEL, and B1SEL
// // pins
// // *IMPORTANT NOTE: DO NOT USE PSP MODE 2, 4, 6, OR 10 ON EXPLORER 16!
// // Attempting to do so will cause bus contention with the LCD module which
// // shares the PMP. Also, PSP Mode 3 is risky on the Explorer 16 since it
// // can randomly cause bus contention with the 25LC256 EEPROM.
// #define ENC100_INTERFACE_MODE 0
//
// // If using a parallel interface, direct RAM addressing can be used (if all
// // addresses wires are connected), or a reduced number of pins can be used
// // for indirect addressing. If using an SPI interface or PSP Mode 9 or 10
// // (multiplexed 16-bit modes), which require all address lines to always be
// // connected, then this option is ignored. Comment out or uncomment this
// // macro to match your hardware connections.
// #define ENC100_PSP_USE_INDIRECT_RAM_ADDRESSING
//
// // ENC424J600/624J600 parallel indirect address remapping macro function.
// // This section translates SFR and RAM addresses presented to the
// // ReadMemory() and WriteMemory() APIs in ENCX24J600.c to the actual
// // addresses that must be presented on the parallel interface. This macro
// // must be modified to match your hardware if you are using an indirect PSP
// // addressing mode (ENC100_PSP_USE_INDIRECT_RAM_ADDRESSING is defined) and
// // have some of your address lines tied off to Vdd. If you are using the
// // SPI interface, then this section can be ignored or deleted.
// #if (ENC100_INTERFACE_MODE == 1) || (ENC100_INTERFACE_MODE == 2) || (ENC100_INTERFACE_MODE == 5) || (ENC100_INTERFACE_MODE == 6) // 8-bit PSP
// #define ENC100_TRANSLATE_TO_PIN_ADDR(a) ((((a)&0x0100)<<6) | ((a)&0x00FF))
// #elif (ENC100_INTERFACE_MODE == 3) || (ENC100_INTERFACE_MODE == 4) // 16-bit PSP
// #define ENC100_TRANSLATE_TO_PIN_ADDR(a) (a)
// #endif
//
// // Auto-crossover pins on Fast 100Mbps Ethernet PICtail/PICtail Plus. If
// // your circuit doesn't have such a feature, delete these two defines.
// #define ENC100_MDIX_TRIS (TRISBbits.TRISB3)
// #define ENC100_MDIX_IO (LATBbits.LATB3)
//
// // ENC624J600 I/O control and status pins
// // If a pin is not required for your selected ENC100_INTERFACE_MODE
// // interface selection (ex: WRH/B1SEL for PSP modes 1, 2, 5, and 6), then
// // you can ignore, delete, or put anything for the pin definition. Also,
// // the INT and POR pins are entirely optional. If not connected, comment
// // them out.
// #if defined(__dsPIC33FJ256GP710__) || defined(__PIC24HJ256GP610__)
// #define ENC100_INT_TRIS (TRISAbits.TRISA13) // INT signal is optional and currently unused in the Microchip TCP/IP Stack. Leave this pin disconnected and comment out this pin definition if you don't want it.
// #define ENC100_INT_IO (PORTAbits.RA13)
// #else
// #define ENC100_INT_TRIS (TRISEbits.TRISE9) // INT signal is optional and currently unused in the Microchip TCP/IP Stack. Leave this pin disconnected and comment out this pin definition if you don't want it.
// #define ENC100_INT_IO (PORTEbits.RE9)
// #endif
// #if (ENC100_INTERFACE_MODE >= 1) // Parallel mode
// // PSP control signal pinout
// #define ENC100_CS_TRIS (TRISAbits.TRISA5) // CS is optional in PSP mode. If you are not sharing the parallel bus with another device, tie CS to Vdd and comment out this pin definition.
// #define ENC100_CS_IO (LATAbits.LATA5)
// #define ENC100_POR_TRIS (TRISCbits.TRISC1) // POR signal is optional. If your application doesn't have a power disconnect feature, comment out this pin definition.
// #define ENC100_POR_IO (LATCbits.LATC1)
// #define ENC100_SO_WR_B0SEL_EN_TRIS (TRISDbits.TRISD4)
// #define ENC100_SO_WR_B0SEL_EN_IO (LATDbits.LATD4)
// #define ENC100_SI_RD_RW_TRIS (TRISDbits.TRISD5)
// #define ENC100_SI_RD_RW_IO (LATDbits.LATD5)
// #define ENC100_SCK_AL_TRIS (TRISBbits.TRISB15)
// #define ENC100_SCK_AL_IO (LATBbits.LATB15)
// #else
// // SPI pinout
// #if defined(__PIC24FJ256GA110__) // The PIC24FJ256GA110 must use SPI2 slot on Explorer 16. If you don't have a PIC24FJ256GA110 but want to use SPI2 for some reason, you can use these definitions.
// #define ENC100_CS_TRIS (TRISFbits.TRISF12) // CS is mandatory when using the SPI interface
// #define ENC100_CS_IO (LATFbits.LATF12)
// #define ENC100_POR_TRIS (TRISFbits.TRISF13) // POR signal is optional. If your application doesn't have a power disconnect feature, comment out this pin definition.
// #define ENC100_POR_IO (LATFbits.LATF13)
// #else // All other PIC24s, dsPICs, and PIC32s use SPI1 slot (top most closest to LCD)
// #define ENC100_CS_TRIS (TRISDbits.TRISD14) // CS is mandatory when using the SPI interface
// #define ENC100_CS_IO (LATDbits.LATD14)
// #define ENC100_POR_TRIS (TRISDbits.TRISD15) // POR signal is optional. If your application doesn't have a power disconnect feature, comment out this pin definition.
// #define ENC100_POR_IO (LATDbits.LATD15)
// #endif
// #endif
//
// // ENC624J600 Bit Bang PSP I/O macros and pin configuration for address and
// // data. If using the SPI interface (ENC100_INTERFACE_MODE is 0) then this
// // section is not used and can be ignored or deleted. If using the PIC PMP
// // hardware module (if present), then ENC100_BIT_BANG_PMP must be commented
// // out and the remaining definitions will be ignored/can be deleted.
// // Otherwise, if you are using a parallel interface mode, but do not have a
// // PMP (or want to interface using different pins), define
// // ENC100_BIT_BANG_PMP and properly configure the applicable macros.
// //#define ENC100_BIT_BANG_PMP
// #if defined(ENC100_BIT_BANG_PMP)
// #if ENC100_INTERFACE_MODE == 1 || ENC100_INTERFACE_MODE == 2 // Dumultiplexed 8-bit address/data modes
// // SPI2 CANNOT BE ENABLED WHEN ACCESSING THE ENC624J600 FOR THESE TWO MODES AS THE PINS OVERLAP WITH ADDRESS LINES.
// #if defined(ENC100_PSP_USE_INDIRECT_RAM_ADDRESSING) // Only ENC624J600 address pins A0-A8 connected (A9-A14 tied to Vdd)
// #if defined(__PIC24FJ256GB210__)
// #define ENC100_INIT_PSP_BIT_BANG() do{ANSA &= 0xF9E7; ANSB &= 0x3FFF; ANSG &= 0xFCFF;} while(0) // RE0-RE7, RF12, RD11, RD4, RD5 (AD0-AD7, A5, A8, WR, RD) pins are already digital only pins.
// #else
// #define ENC100_INIT_PSP_BIT_BANG() do{((volatile BYTE*)&AD1PCFGH)[1] = 0xFF; ((volatile BYTE*)&AD1PCFGL)[1] |= 0xC0;}while(0) // Disable AN24-AN31 and AN14-AN15 analog inputs on RE0-RE7 and RB14-RB15 pins (ENCX24J600 AD0-AD7, A1-A0)
// #endif
// #define ENC100_SET_ADDR_TRIS_OUT() do{TRISA &= 0xF9E7; TRISB &= 0x3FFF; TRISFbits.TRISF12 = 0; TRISGbits.TRISG9 = 0; TRISDbits.TRISD11 = 0;}while(0)
// #define ENC100_SET_ADDR_IO(a) do{WORD _SetMacro = (a); LATBbits.LATB15 = 0; LATBbits.LATB14 = 0; LATGbits.LATG9 = 0; LATA &= 0xF9E7; LATFbits.LATF12 = 0; LATDbits.LATD11 = 0; if(_SetMacro & 0x0001) LATBbits.LATB15 = 1; if(_SetMacro & 0x0002) LATBbits.LATB14 = 1; if(_SetMacro & 0x0004) LATGbits.LATG9 = 1; if(_SetMacro & 0x0008) LATAbits.LATA4 = 1; if(_SetMacro & 0x0010) LATAbits.LATA3 = 1; if(_SetMacro & 0x0020) LATFbits.LATF12 = 1; if(_SetMacro & 0x0040) LATAbits.LATA10 = 1; if(_SetMacro & 0x0080) LATAbits.LATA9 = 1; if(_SetMacro & 0x4000) LATDbits.LATD11 = 1;}while(0)
// #define ENC100_SET_AD_TRIS_IN() (((volatile BYTE*)&TRISE)[0] = 0xFF)
// #define ENC100_SET_AD_TRIS_OUT() (((volatile BYTE*)&TRISE)[0] = 0x00)
// #define ENC100_GET_AD_IO() (((volatile BYTE*)&PORTE)[0])
// #define ENC100_SET_AD_IO(data) (((volatile BYTE*)&LATE)[0] = (BYTE)(data))
// #else // All ENC624J600 address pins A0-A14 connected
// #if defined(__PIC24FJ256GB210__)
// #define ENC100_INIT_PSP_BIT_BANG() do{ANSA &= 0xF9E7; ANSB &= 0x03FF; ANSG &= 0xFCFF;} while(0) // RE0-RE7, RF12, RD11, RD4, RD5 (AD0-AD7, A5, A14, WR, RD) pins are already digital only pins.
// #else