diff --git a/Examples/MAX32655/Bluetooth/Bootloader/Makefile b/Examples/MAX32655/Bluetooth/Bootloader/Makefile index 141e75f32f..5f0c187063 100644 --- a/Examples/MAX32655/Bluetooth/Bootloader/Makefile +++ b/Examples/MAX32655/Bluetooth/Bootloader/Makefile @@ -260,7 +260,7 @@ MXC_OPTIMIZE_CFLAGS ?= -Og # Set compiler flags PROJ_CFLAGS += -Wall # Enable warnings -PROJ_CFLAGS += -DMXC_ASSERT_ENABLE +# PROJ_CFLAGS += -DMXC_ASSERT_ENABLE # Set hardware floating point acceleration. # Options are: diff --git a/Examples/MAX32662/SCPA_OTP_Dump/Makefile b/Examples/MAX32662/SCPA_OTP_Dump/Makefile index 0dd49ceb74..bf69351f59 100644 --- a/Examples/MAX32662/SCPA_OTP_Dump/Makefile +++ b/Examples/MAX32662/SCPA_OTP_Dump/Makefile @@ -260,7 +260,7 @@ MXC_OPTIMIZE_CFLAGS ?= -Og # Set compiler flags PROJ_CFLAGS += -Wall # Enable warnings -PROJ_CFLAGS += -DMXC_ASSERT_ENABLE +# PROJ_CFLAGS += -DMXC_ASSERT_ENABLE # Set hardware floating point acceleration. # Options are: diff --git a/Examples/MAX32665/Bluetooth/Bootloader/Makefile b/Examples/MAX32665/Bluetooth/Bootloader/Makefile index c2910ecdec..dd3fd687ec 100644 --- a/Examples/MAX32665/Bluetooth/Bootloader/Makefile +++ b/Examples/MAX32665/Bluetooth/Bootloader/Makefile @@ -260,7 +260,7 @@ MXC_OPTIMIZE_CFLAGS ?= -Og # Set compiler flags PROJ_CFLAGS += -Wall # Enable warnings -PROJ_CFLAGS += -DMXC_ASSERT_ENABLE +# PROJ_CFLAGS += -DMXC_ASSERT_ENABLE # Set hardware floating point acceleration. # Options are: diff --git a/Examples/MAX32672/UART/main.c b/Examples/MAX32672/UART/main.c index 0801a00af5..10a90c5393 100644 --- a/Examples/MAX32672/UART/main.c +++ b/Examples/MAX32672/UART/main.c @@ -79,16 +79,9 @@ /***** Globals *****/ volatile int READ_FLAG; -volatile int DMA_FLAG; /***** Functions *****/ -#ifdef DMA -void DMA_Handler(void) -{ - MXC_DMA_Handler(); - DMA_FLAG = 0; -} -#else // DMA +#ifndef DMA void Reading_UART_Handler(void) { MXC_UART_AsyncHandler(READING_UART); @@ -121,11 +114,7 @@ int main(void) } memset(RxData, 0x0, BUFF_SIZE); -#ifdef DMA - MXC_DMA_ReleaseChannel(0); - MXC_NVIC_SetVector(DMA0_IRQn, DMA_Handler); - NVIC_EnableIRQ(DMA0_IRQn); -#else // DMA +#ifndef DMA NVIC_ClearPendingIRQ(MXC_UART_GET_IRQ(READING_UART_IDX)); NVIC_DisableIRQ(MXC_UART_GET_IRQ(READING_UART_IDX)); MXC_NVIC_SetVector(MXC_UART_GET_IRQ(READING_UART_IDX), Reading_UART_Handler); @@ -150,6 +139,12 @@ int main(void) } printf("-->Writing UART Initialized\n\n"); +#ifdef DMA + // Automatically set up DMA handlers/ISRs + MXC_UART_SetAutoDMAHandlers(READING_UART, true); + MXC_UART_SetAutoDMAHandlers(WRITING_UART, true); +#endif + // Set Parameters for UART transaction requests mxc_uart_req_t read_req; read_req.uart = READING_UART; @@ -168,16 +163,16 @@ int main(void) printf("-->Starting transaction\n"); // Initiate Reading UART transaction + READ_FLAG = 1; + MXC_UART_ClearRXFIFO(READING_UART); // Clear any previously pending data #ifdef DMA - DMA_FLAG = 1; error = MXC_UART_TransactionDMA(&read_req); #else // DMA - READ_FLAG = 1; error = MXC_UART_TransactionAsync(&read_req); #endif // DMA if (error != E_NO_ERROR) { - printf("-->Error starting async read: %d\n", error); + printf("-->Error starting read: %d\n", error); printf("-->Example Failed\n"); return error; } @@ -190,21 +185,15 @@ int main(void) return error; } -#ifdef DMA - // Wait for Reading DMA transaction to complete - while (DMA_FLAG) {} -#else // DMA - - // Wait for Async Read transaction to complete + // Wait for read transaction to complete while (READ_FLAG) {} + printf("-->Transaction complete\n\n"); + if (READ_FLAG != E_NO_ERROR) { - printf("-->Error with UART_ReadAsync callback; %d\n", READ_FLAG); + printf("-->Error from UART read callback; %d\n", READ_FLAG); fail++; } -#endif // DMA - - printf("-->Transaction complete\n\n"); // Verify data received matches data transmitted if ((error = memcmp(RxData, TxData, BUFF_SIZE)) != 0) { diff --git a/Examples/MAX32690/Bluetooth/Bootloader/Makefile b/Examples/MAX32690/Bluetooth/Bootloader/Makefile index 43683480c4..ae4b61bb9a 100644 --- a/Examples/MAX32690/Bluetooth/Bootloader/Makefile +++ b/Examples/MAX32690/Bluetooth/Bootloader/Makefile @@ -260,7 +260,7 @@ MXC_OPTIMIZE_CFLAGS ?= -Og # Set compiler flags PROJ_CFLAGS += -Wall # Enable warnings -PROJ_CFLAGS += -DMXC_ASSERT_ENABLE +# # PROJ_CFLAGS += -DMXC_ASSERT_ENABLE # Set hardware floating point acceleration. # Options are: diff --git a/Examples/MAX78000/UART/main.c b/Examples/MAX78000/UART/main.c index a15656848b..b9401e8cc9 100644 --- a/Examples/MAX78000/UART/main.c +++ b/Examples/MAX78000/UART/main.c @@ -75,29 +75,22 @@ /***** Globals *****/ volatile int READ_FLAG; -volatile int DMA_FLAG; #if defined(BOARD_EVKIT_V1) -#define READING_UART 1 -#define WRITING_UART 2 +#define READING_UART MXC_UART1 +#define WRITING_UART MXC_UART2 #elif defined(BOARD_FTHR_REVA) -#define READING_UART 2 -#define WRITING_UART 3 +#define READING_UART MXC_UART2 +#define WRITING_UART MXC_UART3 #else #warning "This example has been written for the MAX78000 Ev Kit or FTHR board." #endif /***** Functions *****/ -#ifdef DMA -void DMA_Handler(void) +#ifndef DMA +void Reading_UART_Handler(void) { - MXC_DMA_Handler(); - DMA_FLAG = 0; -} -#else -void UART_Handler(void) -{ - MXC_UART_AsyncHandler(MXC_UART_GET_UART(READING_UART)); + MXC_UART_AsyncHandler(READING_UART); } #endif @@ -127,28 +120,21 @@ int main(void) memset(RxData, 0x0, BUFF_SIZE); -#ifdef DMA - MXC_DMA_Init(); - MXC_DMA_ReleaseChannel(0); - MXC_NVIC_SetVector(DMA0_IRQn, DMA_Handler); - NVIC_EnableIRQ(DMA0_IRQn); -#else - NVIC_ClearPendingIRQ(MXC_UART_GET_IRQ(READING_UART)); - NVIC_DisableIRQ(MXC_UART_GET_IRQ(READING_UART)); - MXC_NVIC_SetVector(MXC_UART_GET_IRQ(READING_UART), UART_Handler); - NVIC_EnableIRQ(MXC_UART_GET_IRQ(READING_UART)); +#ifndef DMA + NVIC_ClearPendingIRQ(MXC_UART_GET_IRQ(READING_UART_IDX)); + NVIC_DisableIRQ(MXC_UART_GET_IRQ(READING_UART_IDX)); + MXC_NVIC_SetVector(MXC_UART_GET_IRQ(READING_UART_IDX), Reading_UART_Handler); + NVIC_EnableIRQ(MXC_UART_GET_IRQ(READING_UART_IDX)); #endif // Initialize the UART - if ((error = MXC_UART_Init(MXC_UART_GET_UART(READING_UART), UART_BAUD, MXC_UART_APB_CLK)) != - E_NO_ERROR) { + if ((error = MXC_UART_Init(READING_UART, UART_BAUD, MXC_UART_APB_CLK)) != E_NO_ERROR) { printf("-->Error initializing UART: %d\n", error); printf("-->Example Failed\n"); return error; } - if ((error = MXC_UART_Init(MXC_UART_GET_UART(WRITING_UART), UART_BAUD, MXC_UART_APB_CLK)) != - E_NO_ERROR) { + if ((error = MXC_UART_Init(WRITING_UART, UART_BAUD, MXC_UART_APB_CLK)) != E_NO_ERROR) { printf("-->Error initializing UART: %d\n", error); printf("-->Example Failed\n"); return error; @@ -156,25 +142,28 @@ int main(void) printf("-->UART Initialized\n\n"); +#ifdef DMA + // Automatically set up DMA handlers/ISRs + MXC_UART_SetAutoDMAHandlers(READING_UART, true); + MXC_UART_SetAutoDMAHandlers(WRITING_UART, true); +#endif + mxc_uart_req_t read_req; - read_req.uart = MXC_UART_GET_UART(READING_UART); + read_req.uart = READING_UART; read_req.rxData = RxData; read_req.rxLen = BUFF_SIZE; read_req.txLen = 0; read_req.callback = readCallback; mxc_uart_req_t write_req; - write_req.uart = MXC_UART_GET_UART(WRITING_UART); + write_req.uart = WRITING_UART; write_req.txData = TxData; write_req.txLen = BUFF_SIZE; write_req.rxLen = 0; write_req.callback = NULL; READ_FLAG = 1; - DMA_FLAG = 1; - - MXC_UART_ClearRXFIFO(MXC_UART_GET_UART(READING_UART)); - + MXC_UART_ClearRXFIFO(READING_UART); // Clear any previously pending data #ifdef DMA error = MXC_UART_TransactionDMA(&read_req); #else @@ -182,7 +171,7 @@ int main(void) #endif if (error != E_NO_ERROR) { - printf("-->Error starting async read: %d\n", error); + printf("-->Error starting read: %d\n", error); printf("-->Example Failed\n"); return error; } @@ -195,21 +184,16 @@ int main(void) return error; } -#ifdef DMA - - while (DMA_FLAG) {} - -#else - + // Wait for read transaction to complete while (READ_FLAG) {} + printf("-->Transaction complete\n\n"); + if (READ_FLAG != E_NO_ERROR) { - printf("-->Error with UART_ReadAsync callback; %d\n", READ_FLAG); + printf("-->Error from UART read callback; %d\n", READ_FLAG); fail++; } -#endif - if ((error = memcmp(RxData, TxData, BUFF_SIZE)) != 0) { printf("-->Error verifying Data: %d\n", error); fail++; diff --git a/Examples/MAX78002/UART/main.c b/Examples/MAX78002/UART/main.c index 245497edfe..e94249aff8 100644 --- a/Examples/MAX78002/UART/main.c +++ b/Examples/MAX78002/UART/main.c @@ -75,16 +75,9 @@ /***** Globals *****/ volatile int READ_FLAG; -volatile int DMA_FLAG; /***** Functions *****/ -#ifdef DMA -void DMA_Handler(void) -{ - MXC_DMA_Handler(); - DMA_FLAG = 0; -} -#else +#ifndef DMA void UART1_Handler(void) { MXC_UART_AsyncHandler(MXC_UART1); @@ -117,11 +110,7 @@ int main(void) memset(RxData, 0x0, BUFF_SIZE); -#ifdef DMA - MXC_DMA_ReleaseChannel(0); - MXC_NVIC_SetVector(DMA0_IRQn, DMA_Handler); - NVIC_EnableIRQ(DMA0_IRQn); -#else +#ifndef DMA NVIC_ClearPendingIRQ(UART1_IRQn); NVIC_DisableIRQ(UART1_IRQn); MXC_NVIC_SetVector(UART1_IRQn, UART1_Handler); @@ -143,6 +132,12 @@ int main(void) printf("-->UART Initialized\n\n"); +#ifdef DMA + // Automatically set up DMA handlers/ISRs + MXC_UART_SetAutoDMAHandlers(READING_UART, true); + MXC_UART_SetAutoDMAHandlers(WRITING_UART, true); +#endif + mxc_uart_req_t read_req; read_req.uart = MXC_UART1; read_req.rxData = RxData; @@ -160,8 +155,7 @@ int main(void) write_req.callback = NULL; READ_FLAG = 1; - DMA_FLAG = 1; - + MXC_UART_ClearRXFIFO(MXC_UART1); // Clear any previously pending data #ifdef DMA error = MXC_UART_TransactionDMA(&read_req); #else @@ -182,20 +176,14 @@ int main(void) return error; } -#ifdef DMA - - while (DMA_FLAG) {} - -#else - while (READ_FLAG) {} if (READ_FLAG != E_NO_ERROR) { - printf("-->Error with UART_ReadAsync callback; %d\n", READ_FLAG); + printf("-->Error from UART read callback; %d\n", READ_FLAG); fail++; } -#endif + printf("-->Transaction complete\n\n"); if ((error = memcmp(RxData, TxData, BUFF_SIZE)) != 0) { printf("-->Error verifying Data: %d\n", error); diff --git a/Libraries/CMSIS/Device/Maxim/MAX32665/Include/max32665.h b/Libraries/CMSIS/Device/Maxim/MAX32665/Include/max32665.h index eab6eba61c..6e48d9eade 100644 --- a/Libraries/CMSIS/Device/Maxim/MAX32665/Include/max32665.h +++ b/Libraries/CMSIS/Device/Maxim/MAX32665/Include/max32665.h @@ -517,6 +517,10 @@ typedef enum { ((i) == 7) ? DMA15_IRQn : \ 0)) +#define MXC_DMA_CH_GET_IRQ(i) \ + (((i) > (MXC_DMA_CH_OFFSET - 1)) ? MXC_DMA1_CH_GET_IRQ(i % MXC_DMA_CH_OFFSET) : \ + MXC_DMA0_CH_GET_IRQ(i)) + /* Create alias for MXC_DMA0 for backwards compatibility with code that was written for parts that only had one DMA instance. */ #define MXC_DMA MXC_DMA0 diff --git a/Libraries/PeriphDrivers/Include/MAX32520/uart.h b/Libraries/PeriphDrivers/Include/MAX32520/uart.h index 50740cbb5c..d54235ab91 100644 --- a/Libraries/PeriphDrivers/Include/MAX32520/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32520/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32520_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" @@ -630,6 +631,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32570/uart.h b/Libraries/PeriphDrivers/Include/MAX32570/uart.h index 8833306a16..e6b5ef96ce 100644 --- a/Libraries/PeriphDrivers/Include/MAX32570/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32570/uart.h @@ -41,6 +41,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32570_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" @@ -700,6 +701,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32572/uart.h b/Libraries/PeriphDrivers/Include/MAX32572/uart.h index 381171e581..b42e0848b2 100644 --- a/Libraries/PeriphDrivers/Include/MAX32572/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32572/uart.h @@ -41,6 +41,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32572_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" @@ -655,6 +656,69 @@ int MXC_UART_AbortAsync(mxc_uart_regs_t *uart); */ int MXC_UART_AsyncHandler(mxc_uart_regs_t *uart); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32650/uart.h b/Libraries/PeriphDrivers/Include/MAX32650/uart.h index 775645197c..926fa8b5b1 100644 --- a/Libraries/PeriphDrivers/Include/MAX32650/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32650/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_UART_H_ /***** Includes *****/ +#include #include #include "uart_regs.h" #include "mxc_sys.h" @@ -688,6 +689,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32655/uart.h b/Libraries/PeriphDrivers/Include/MAX32655/uart.h index 8eae702f7d..5f242c4b80 100644 --- a/Libraries/PeriphDrivers/Include/MAX32655/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32655/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32655_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" @@ -694,6 +695,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32660/uart.h b/Libraries/PeriphDrivers/Include/MAX32660/uart.h index 39cfcece5e..a1b1598838 100644 --- a/Libraries/PeriphDrivers/Include/MAX32660/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32660/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" #include "mxc_pins.h" @@ -720,6 +721,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32662/uart.h b/Libraries/PeriphDrivers/Include/MAX32662/uart.h index aa4275982d..cded933bb1 100644 --- a/Libraries/PeriphDrivers/Include/MAX32662/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32662/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32662_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" #include "mxc_pins.h" @@ -670,6 +671,69 @@ int MXC_UART_AbortAsync(mxc_uart_regs_t *uart); */ int MXC_UART_AsyncHandler(mxc_uart_regs_t *uart); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32665/uart.h b/Libraries/PeriphDrivers/Include/MAX32665/uart.h index 7e722a83dc..48c0c4d8c7 100644 --- a/Libraries/PeriphDrivers/Include/MAX32665/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32665/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" #include "mxc_pins.h" @@ -724,6 +725,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32670/uart.h b/Libraries/PeriphDrivers/Include/MAX32670/uart.h index 7accdd3dee..0841f9123f 100644 --- a/Libraries/PeriphDrivers/Include/MAX32670/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32670/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32670_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" @@ -696,6 +697,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32672/uart.h b/Libraries/PeriphDrivers/Include/MAX32672/uart.h index b911984e48..3237dc5e64 100644 --- a/Libraries/PeriphDrivers/Include/MAX32672/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32672/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32672_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" @@ -707,6 +708,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32675/uart.h b/Libraries/PeriphDrivers/Include/MAX32675/uart.h index 6db2dc154c..7068eb880f 100644 --- a/Libraries/PeriphDrivers/Include/MAX32675/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32675/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" @@ -691,6 +692,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32680/uart.h b/Libraries/PeriphDrivers/Include/MAX32680/uart.h index a5ae8be6b5..6a51a7131b 100644 --- a/Libraries/PeriphDrivers/Include/MAX32680/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32680/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32680_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" @@ -693,6 +694,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX32690/uart.h b/Libraries/PeriphDrivers/Include/MAX32690/uart.h index ac34185f6b..e5ebdccca1 100644 --- a/Libraries/PeriphDrivers/Include/MAX32690/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32690/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32690_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" @@ -696,6 +697,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX78000/uart.h b/Libraries/PeriphDrivers/Include/MAX78000/uart.h index a01f06f7f6..47ce20e1f7 100644 --- a/Libraries/PeriphDrivers/Include/MAX78000/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX78000/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX78000_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" @@ -689,6 +690,69 @@ uint32_t MXC_UART_GetAsyncTXCount(mxc_uart_req_t *req); */ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Include/MAX78002/uart.h b/Libraries/PeriphDrivers/Include/MAX78002/uart.h index 99f5f25d0e..57dddcc8c8 100644 --- a/Libraries/PeriphDrivers/Include/MAX78002/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX78002/uart.h @@ -59,6 +59,7 @@ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX78002_UART_H_ /***** Definitions *****/ +#include #include "uart_regs.h" #include "mxc_sys.h" @@ -672,6 +673,69 @@ int MXC_UART_AbortAsync(mxc_uart_regs_t *uart); */ int MXC_UART_AsyncHandler(mxc_uart_regs_t *uart); +/** + * @brief Enable or disable automatic DMA interrupt handlers for the UART module. + * + * The @ref MXC_UART_TransactionDMA functions require special interrupt handlers to work. + * + * When "Auto" DMA handlers are enabled, the UART drivers will acquire DMA channels + * and assign the appropriate handlers automatically. The acquired channels are + * released after each transaction. + * + * If "Auto" DMA handlers are disabled, the user must acquire DMA channels manually + * and assign them to the drivers with the @ref MXC_UART_SetTXDMAChannel and + * @ref MXC_UART_SetRXDMAChannel functions. + * + * @param uart Pointer to the UART module's registers. + * @param enable true to enable Auto DMA handlers, false to disable. + * @return 0 on success, or a non-zero error code on failure. + */ +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable); + +/** + * @brief Set the TX (Transmit) DMA channel for a UART module. + * + * This function assigns the DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the TX (Transmit) DMA channel for a UART module. + * + * This function retrieves the currently assigned DMA channel for transmitting data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently assigned TX DMA channel. + */ +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart); + +/** + * @brief Set the RX (Receive) DMA channel for a UART module. + * + * This function assigns the DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @param channel The DMA channel number to be used for @ref MXC_UART_TransactionDMA. + */ +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel); + +/** + * @brief Get the RX (Receive) DMA channel for a UART module. + * + * This function retrieves the currently configured DMA channel for receiving data + * when @ref is MXC_UART_SetAutoDMAHandlers disabled. + * + * @param uart Pointer to the UART module's registers. + * @return The currently configured RX DMA channel. + */ +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart); + /**@} end of group uart */ #ifdef __cplusplus diff --git a/Libraries/PeriphDrivers/Source/UART/uart_ai85.c b/Libraries/PeriphDrivers/Source/UART/uart_ai85.c index c02d10eb95..b652c4cbb6 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_ai85.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_ai85.c @@ -499,3 +499,28 @@ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req) { return req->rxCnt; } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevB_SetAutoDMAHandlers((mxc_uart_revb_regs_t *)uart, enable); +} + +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetTXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} + +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetRXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_ai87.c b/Libraries/PeriphDrivers/Source/UART/uart_ai87.c index 485f84df36..f5794bc926 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_ai87.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_ai87.c @@ -510,3 +510,28 @@ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req) { return req->rxCnt; } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevB_SetAutoDMAHandlers((mxc_uart_revb_regs_t *)uart, enable); +} + +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetTXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} + +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetRXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me10.c b/Libraries/PeriphDrivers/Source/UART/uart_me10.c index 26d454b9e9..72d745042d 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me10.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me10.c @@ -538,3 +538,24 @@ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req) { return req->rxCnt; } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevA_SetAutoDMAHandlers((mxc_uart_reva_regs_t *)uart, enable); +} +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevA_SetTXDMAChannel((mxc_uart_reva_regs_t *)uart, channel); +} +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevA_GetTXDMAChannel((mxc_uart_reva_regs_t *)uart); +} +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevA_SetRXDMAChannel((mxc_uart_reva_regs_t *)uart, channel); +} +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevA_GetRXDMAChannel((mxc_uart_reva_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me11.c b/Libraries/PeriphDrivers/Source/UART/uart_me11.c index f3f62c0acf..449de90fb4 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me11.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me11.c @@ -428,3 +428,24 @@ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req) { return req->rxCnt; } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevA_SetAutoDMAHandlers((mxc_uart_reva_regs_t *)uart, enable); +} +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevA_SetTXDMAChannel((mxc_uart_reva_regs_t *)uart, channel); +} +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevA_GetTXDMAChannel((mxc_uart_reva_regs_t *)uart); +} +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevA_SetRXDMAChannel((mxc_uart_reva_regs_t *)uart, channel); +} +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevA_GetRXDMAChannel((mxc_uart_reva_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me12.c b/Libraries/PeriphDrivers/Source/UART/uart_me12.c index 1dccd9a7e2..7ad7a9e297 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me12.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me12.c @@ -405,3 +405,28 @@ int MXC_UART_AsyncHandler(mxc_uart_regs_t *uart) { return MXC_UART_RevB_AsyncHandler((mxc_uart_revb_regs_t *)uart); } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevB_SetAutoDMAHandlers((mxc_uart_revb_regs_t *)uart, enable); +} + +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetTXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} + +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetRXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me13.c b/Libraries/PeriphDrivers/Source/UART/uart_me13.c index d8e59da15d..bb5fb499ca 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me13.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me13.c @@ -459,3 +459,24 @@ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req) { return req->rxCnt; } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevA_SetAutoDMAHandlers((mxc_uart_reva_regs_t *)uart, enable); +} +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevA_SetTXDMAChannel((mxc_uart_reva_regs_t *)uart, channel); +} +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevA_GetTXDMAChannel((mxc_uart_reva_regs_t *)uart); +} +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevA_SetRXDMAChannel((mxc_uart_reva_regs_t *)uart, channel); +} +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevA_GetRXDMAChannel((mxc_uart_reva_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me14.c b/Libraries/PeriphDrivers/Source/UART/uart_me14.c index 9f607840a9..8c9572b04b 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me14.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me14.c @@ -464,3 +464,24 @@ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req) { return req->rxCnt; } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevA_SetAutoDMAHandlers((mxc_uart_reva_regs_t *)uart, enable); +} +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevA_SetTXDMAChannel((mxc_uart_reva_regs_t *)uart, channel); +} +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevA_GetTXDMAChannel((mxc_uart_reva_regs_t *)uart); +} +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevA_SetRXDMAChannel((mxc_uart_reva_regs_t *)uart, channel); +} +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevA_GetRXDMAChannel((mxc_uart_reva_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me15.c b/Libraries/PeriphDrivers/Source/UART/uart_me15.c index 700215a2ad..b954465cdd 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me15.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me15.c @@ -567,3 +567,28 @@ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req) { return req->rxCnt; } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevB_SetAutoDMAHandlers((mxc_uart_revb_regs_t *)uart, enable); +} + +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetTXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} + +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetRXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me16.c b/Libraries/PeriphDrivers/Source/UART/uart_me16.c index 4f8e3fcd2b..4db9270424 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me16.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me16.c @@ -501,3 +501,28 @@ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req) { return req->rxCnt; } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevB_SetAutoDMAHandlers((mxc_uart_revb_regs_t *)uart, enable); +} + +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetTXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} + +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetRXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me17.c b/Libraries/PeriphDrivers/Source/UART/uart_me17.c index 12e36d2ebb..68c6ef8e99 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me17.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me17.c @@ -534,3 +534,28 @@ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req) { return req->rxCnt; } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevB_SetAutoDMAHandlers((mxc_uart_revb_regs_t *)uart, enable); +} + +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetTXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} + +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetRXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me18.c b/Libraries/PeriphDrivers/Source/UART/uart_me18.c index d861f10e7c..2d4eed4908 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me18.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me18.c @@ -574,3 +574,28 @@ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req) { return req->rxCnt; } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevB_SetAutoDMAHandlers((mxc_uart_revb_regs_t *)uart, enable); +} + +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetTXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} + +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetRXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me21.c b/Libraries/PeriphDrivers/Source/UART/uart_me21.c index 2e78ee1b28..3100ea285b 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me21.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me21.c @@ -571,25 +571,16 @@ unsigned int MXC_UART_GetStatus(mxc_uart_regs_t *uart) int MXC_UART_Transaction(mxc_uart_req_t *req) { - MXC_UART_ClearRXFIFO(req->uart); - MXC_UART_ClearTXFIFO(req->uart); - return MXC_UART_RevB_Transaction((mxc_uart_revb_req_t *)req); } int MXC_UART_TransactionAsync(mxc_uart_req_t *req) { - MXC_UART_ClearRXFIFO(req->uart); - MXC_UART_ClearTXFIFO(req->uart); - return MXC_UART_RevB_TransactionAsync((mxc_uart_revb_req_t *)req); } int MXC_UART_TransactionDMA(mxc_uart_req_t *req) { - MXC_UART_ClearRXFIFO(req->uart); - MXC_UART_ClearTXFIFO(req->uart); - return MXC_UART_RevB_TransactionDMA((mxc_uart_revb_req_t *)req); } @@ -612,3 +603,28 @@ uint32_t MXC_UART_GetAsyncRXCount(mxc_uart_req_t *req) { return req->rxCnt; } + +int MXC_UART_SetAutoDMAHandlers(mxc_uart_regs_t *uart, bool enable) +{ + return MXC_UART_RevB_SetAutoDMAHandlers((mxc_uart_revb_regs_t *)uart, enable); +} + +int MXC_UART_SetTXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetTXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetTXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} + +int MXC_UART_SetRXDMAChannel(mxc_uart_regs_t *uart, unsigned int channel) +{ + return MXC_UART_RevB_SetRXDMAChannel((mxc_uart_revb_regs_t *)uart, channel); +} + +int MXC_UART_GetRXDMAChannel(mxc_uart_regs_t *uart) +{ + return MXC_UART_RevB_GetTXDMAChannel((mxc_uart_revb_regs_t *)uart); +} diff --git a/Libraries/PeriphDrivers/Source/UART/uart_reva.c b/Libraries/PeriphDrivers/Source/UART/uart_reva.c index e13eee51c6..00e376b91d 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_reva.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_reva.c @@ -55,6 +55,9 @@ #include "uart.h" #include "uart_reva.h" #include "dma.h" +#ifdef __arm__ +#include "nvic_table.h" +#endif /* **** Definitions **** */ #define MXC_UART_REVA_ERRINT_EN \ @@ -71,9 +74,11 @@ static void *RxAsyncRequests[MXC_UART_INSTANCES]; // Structure to save DMA state typedef struct { - mxc_uart_reva_req_t *req; + mxc_uart_reva_req_t *tx_req; + mxc_uart_reva_req_t *rx_req; int channelTx; int channelRx; + bool auto_dma_handlers; } uart_reva_req_state_t; uart_reva_req_state_t states[MXC_UART_INSTANCES]; @@ -87,6 +92,8 @@ int MXC_UART_RevA_Init(mxc_uart_reva_regs_t *uart, unsigned int baud) { int err; + MXC_ASSERT(MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) >= 0) + // Initialize UART // Set RX threshold to 1 byte if ((err = (MXC_UART_SetRXThreshold((mxc_uart_regs_t *)uart, 1))) != E_NO_ERROR) { @@ -116,15 +123,19 @@ int MXC_UART_RevA_Init(mxc_uart_reva_regs_t *uart, unsigned int baud) MXC_UART_SetFrequency((mxc_uart_regs_t *)uart, baud); + // Initialize state struct + unsigned int i = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + states[i].channelRx = -1; + states[i].channelTx = -1; + states[i].tx_req = NULL; + states[i].rx_req = NULL; + states[i].auto_dma_handlers = false; + return E_NO_ERROR; } int MXC_UART_RevA_ReadyForSleep(mxc_uart_reva_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (TxAsyncRequests[MXC_UART_GET_IDX((mxc_uart_regs_t *)uart)] != NULL) { return E_BUSY; } @@ -141,10 +152,6 @@ int MXC_UART_RevA_SetFrequency(mxc_uart_reva_regs_t *uart, unsigned int baud) int prescale; int decimalDiv; - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (uart->ctrl & MXC_F_UART_REVA_CTRL_CLKSEL) { #ifdef IBRO_FREQ periphClock = IBRO_FREQ; @@ -256,10 +263,6 @@ int MXC_UART_RevA_GetFrequency(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_SetDataSize(mxc_uart_reva_regs_t *uart, int dataSize) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (dataSize < 5 || dataSize > 8) { return E_BAD_PARAM; } @@ -273,10 +276,6 @@ int MXC_UART_RevA_SetDataSize(mxc_uart_reva_regs_t *uart, int dataSize) int MXC_UART_RevA_SetStopBits(mxc_uart_reva_regs_t *uart, mxc_uart_stop_t stopBits) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - switch (stopBits) { case MXC_UART_STOP_1: MXC_SETFIELD(uart->ctrl, MXC_F_UART_REVA_CTRL_STOPBITS, @@ -298,10 +297,6 @@ int MXC_UART_RevA_SetStopBits(mxc_uart_reva_regs_t *uart, mxc_uart_stop_t stopBi int MXC_UART_RevA_SetParity(mxc_uart_reva_regs_t *uart, mxc_uart_parity_t parity) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - switch (parity) { case MXC_UART_PARITY_DISABLE: MXC_SETFIELD(uart->ctrl, MXC_F_UART_REVA_CTRL_PARITY_EN, @@ -379,10 +374,6 @@ int MXC_UART_RevA_SetParity(mxc_uart_reva_regs_t *uart, mxc_uart_parity_t parity int MXC_UART_RevA_SetFlowCtrl(mxc_uart_reva_regs_t *uart, mxc_uart_flow_t flowCtrl, int rtsThreshold) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - switch (flowCtrl) { case MXC_UART_FLOW_DIS: MXC_SETFIELD(uart->ctrl, MXC_F_UART_REVA_CTRL_FLOW_CTRL, @@ -422,10 +413,6 @@ int MXC_UART_RevA_SetClockSource(mxc_uart_reva_regs_t *uart, int usePCLK) { int baudRate; - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - baudRate = MXC_UART_GetFrequency((mxc_uart_regs_t *)uart); if (baudRate < 0) { // return error code return baudRate; @@ -442,10 +429,6 @@ int MXC_UART_RevA_SetClockSource(mxc_uart_reva_regs_t *uart, int usePCLK) int MXC_UART_RevA_SetNullModem(mxc_uart_reva_regs_t *uart, int nullModem) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - nullModem = (nullModem > 0) << MXC_F_UART_REVA_CTRL_NULL_MODEM_POS; MXC_SETFIELD(uart->ctrl, MXC_F_UART_REVA_CTRL_NULL_MODEM, nullModem); @@ -455,10 +438,6 @@ int MXC_UART_RevA_SetNullModem(mxc_uart_reva_regs_t *uart, int nullModem) int MXC_UART_RevA_SendBreak(mxc_uart_reva_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - MXC_SETFIELD(uart->ctrl, MXC_F_UART_REVA_CTRL_BREAK, 1 << MXC_F_UART_REVA_CTRL_BREAK_POS); return E_NO_ERROR; @@ -466,10 +445,6 @@ int MXC_UART_RevA_SendBreak(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_GetActive(mxc_uart_reva_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (uart->status & (MXC_F_UART_REVA_STATUS_TX_BUSY | MXC_F_UART_REVA_STATUS_RX_BUSY)) { return E_BUSY; } @@ -485,10 +460,6 @@ int MXC_UART_RevA_AbortTransmission(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_ReadCharacterRaw(mxc_uart_reva_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (uart->status & MXC_F_UART_REVA_STATUS_RX_EMPTY) { return E_UNDERFLOW; } @@ -498,10 +469,6 @@ int MXC_UART_RevA_ReadCharacterRaw(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_WriteCharacterRaw(mxc_uart_reva_regs_t *uart, uint8_t character) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - // Return error if the FIFO is full if (uart->status & MXC_F_UART_REVA_STATUS_TX_FULL) { return E_OVERFLOW; @@ -566,6 +533,49 @@ unsigned int MXC_UART_RevA_ReadRXFIFO(mxc_uart_reva_regs_t *uart, unsigned char return read; } +#if MXC_DMA_INSTANCES > 1 + +void MXC_UART_RevA_DMA0_Handler(void) +{ + MXC_DMA_Handler(MXC_DMA0); +} + +void MXC_UART_RevA_DMA1_Handler(void) +{ + MXC_DMA_Handler(MXC_DMA1); +} + +#endif + +/* "Auto" handlers just need to call MXC_DMA_Handler with the correct +DMA instance. +*/ +void MXC_UART_RevA_DMA_SetupAutoHandlers(mxc_dma_regs_t *dma_instance, unsigned int channel) +{ +#ifdef __arm__ + NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(channel)); + +#if MXC_DMA_INSTANCES > 1 + /* (JC): This is not the cleanest or most scalable way to do this, + but I tried defining default handler's in the system file. + Some complications make this the most attractive short-term + option. We could handle multiple DMA instances better in the DMA API (See the mismatch between the size of "dma_resource" array and the number of channels per instance, to start)*/ + if (dma_instance == MXC_DMA0) { + MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(channel), MXC_UART_RevA_DMA0_Handler); + } else if (dma_instance == MXC_DMA1) { + MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(channel), MXC_UART_RevA_DMA1_Handler); + } +#else + // Only one DMA instance, we can point direct to MXC_DMA_Handler + MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(channel), MXC_DMA_Handler); +#endif // MXC_DMA_INSTANCES > 1 + +#else + // TODO(JC): RISC-V + +#endif // __arm__ +} + int MXC_UART_RevA_ReadRXFIFODMA(mxc_uart_reva_regs_t *uart, mxc_dma_regs_t *dma, unsigned char *bytes, unsigned int len, mxc_uart_dma_complete_cb_t callback, mxc_dma_config_t config) @@ -575,19 +585,28 @@ int MXC_UART_RevA_ReadRXFIFODMA(mxc_uart_reva_regs_t *uart, mxc_dma_regs_t *dma, int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - if (uart_num < 0) { - return E_BAD_PARAM; - } - if (bytes == NULL) { return E_NULL_PTR; } -#if TARGET_NUM == 32665 - channel = MXC_DMA_AcquireChannel(dma); + if (states[uart_num].auto_dma_handlers && states[uart_num].channelRx < 0) { + /* Acquire channel if we don't have one already */ +#if MXC_DMA_INSTANCES > 1 + channel = MXC_DMA_AcquireChannel(dma); #else - channel = MXC_DMA_AcquireChannel(); + channel = MXC_DMA_AcquireChannel(); #endif + MXC_UART_RevA_SetRXDMAChannel(uart, channel); + /* (JC) Since we're automatically acquiring a channel here, we need the ISR for that channel to call MXC_DMA_Handler. */ + MXC_UART_RevA_DMA_SetupAutoHandlers(dma, channel); + } else { + /* Rely on application-defined handlers. */ + if (states[uart_num].channelRx < 0) + return E_BAD_STATE; + channel = states[uart_num].channelRx; + } + + // states[uart_num].channelRx = channel; config.ch = channel; @@ -601,7 +620,6 @@ int MXC_UART_RevA_ReadRXFIFODMA(mxc_uart_reva_regs_t *uart, mxc_dma_regs_t *dma, srcdst.dest = bytes; srcdst.len = len; - states[uart_num].channelRx = channel; MXC_DMA_ConfigChannel(config, srcdst); MXC_DMA_SetCallback(channel, MXC_UART_DMACallback); MXC_DMA_EnableInt(channel); @@ -635,29 +653,77 @@ unsigned int MXC_UART_RevA_WriteTXFIFO(mxc_uart_reva_regs_t *uart, unsigned char return written; } +int MXC_UART_RevA_SetAutoDMAHandlers(mxc_uart_reva_regs_t *uart, bool enable) +{ + int n = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + + states[n].auto_dma_handlers = enable; + + return E_NO_ERROR; +} + +int MXC_UART_RevA_SetTXDMAChannel(mxc_uart_reva_regs_t *uart, unsigned int channel) +{ + int n = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + + states[n].channelTx = channel; + + return E_NO_ERROR; +} + +int MXC_UART_RevA_GetTXDMAChannel(mxc_uart_reva_regs_t *uart) +{ + int n = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + + return states[n].channelTx; +} + +int MXC_UART_RevA_SetRXDMAChannel(mxc_uart_reva_regs_t *uart, unsigned int channel) +{ + int n = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + + states[n].channelRx = channel; + + return E_NO_ERROR; +} + +int MXC_UART_RevA_GetRXDMAChannel(mxc_uart_reva_regs_t *uart) +{ + int n = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + + return states[n].channelRx; +} + unsigned int MXC_UART_RevA_WriteTXFIFODMA(mxc_uart_reva_regs_t *uart, mxc_dma_regs_t *dma, unsigned char *bytes, unsigned int len, mxc_uart_dma_complete_cb_t callback, mxc_dma_config_t config) { - uint8_t channel; + int channel = -1; mxc_dma_srcdst_t srcdst; int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - if (uart_num < 0) { - return E_BAD_PARAM; - } - if (bytes == NULL) { return E_NULL_PTR; } + if (states[uart_num].auto_dma_handlers && states[uart_num].channelTx < 0) { + /* Acquire channel if we don't have one already */ #if TARGET_NUM == 32665 - channel = MXC_DMA_AcquireChannel(dma); + channel = MXC_DMA_AcquireChannel(dma); #else - channel = MXC_DMA_AcquireChannel(); + channel = MXC_DMA_AcquireChannel(); #endif + MXC_UART_RevA_SetTXDMAChannel(uart, channel); // Set state variable + /* (JC) Since we're automatically acquiring a channel here, we need the ISR for that channel to call MXC_DMA_Handler.*/ + MXC_UART_RevA_DMA_SetupAutoHandlers(dma, channel); + } else { + /* Rely on application-defined handlers (from SetTXDMAChannel) */ + if (states[uart_num].channelTx < 0) + return E_BAD_STATE; + channel = MXC_UART_RevA_GetTXDMAChannel(uart); + } config.ch = channel; @@ -671,7 +737,6 @@ unsigned int MXC_UART_RevA_WriteTXFIFODMA(mxc_uart_reva_regs_t *uart, mxc_dma_re srcdst.source = bytes; srcdst.len = len; - states[uart_num].channelTx = channel; MXC_DMA_ConfigChannel(config, srcdst); MXC_DMA_SetCallback(channel, MXC_UART_DMACallback); MXC_DMA_EnableInt(channel); @@ -693,10 +758,6 @@ unsigned int MXC_UART_RevA_GetTXFIFOAvailable(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_ClearRXFIFO(mxc_uart_reva_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->ctrl |= MXC_F_UART_REVA_CTRL_RX_FLUSH; while (uart->ctrl & MXC_F_UART_REVA_CTRL_RX_FLUSH) {} @@ -706,10 +767,6 @@ int MXC_UART_RevA_ClearRXFIFO(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_ClearTXFIFO(mxc_uart_reva_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->ctrl |= MXC_F_UART_REVA_CTRL_TX_FLUSH; while (uart->ctrl & MXC_F_UART_REVA_CTRL_TX_FLUSH) {} @@ -719,10 +776,6 @@ int MXC_UART_RevA_ClearTXFIFO(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_SetRXThreshold(mxc_uart_reva_regs_t *uart, unsigned int numBytes) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (numBytes < 1 || numBytes > MXC_UART_FIFO_DEPTH) { return E_BAD_PARAM; } @@ -741,10 +794,6 @@ unsigned int MXC_UART_RevA_GetRXThreshold(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_SetTXThreshold(mxc_uart_reva_regs_t *uart, unsigned int numBytes) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (numBytes < 1 || numBytes > MXC_UART_FIFO_DEPTH) { return E_BAD_PARAM; } @@ -768,10 +817,6 @@ unsigned int MXC_UART_RevA_GetFlags(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_ClearFlags(mxc_uart_reva_regs_t *uart, unsigned int flags) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->int_fl = flags; return E_NO_ERROR; @@ -779,10 +824,6 @@ int MXC_UART_RevA_ClearFlags(mxc_uart_reva_regs_t *uart, unsigned int flags) int MXC_UART_RevA_EnableInt(mxc_uart_reva_regs_t *uart, unsigned int intEn) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->int_en |= intEn; return E_NO_ERROR; @@ -790,10 +831,6 @@ int MXC_UART_RevA_EnableInt(mxc_uart_reva_regs_t *uart, unsigned int intEn) int MXC_UART_RevA_DisableInt(mxc_uart_reva_regs_t *uart, unsigned int intDis) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->int_en &= ~intDis; return E_NO_ERROR; @@ -808,13 +845,13 @@ int MXC_UART_RevA_Busy(mxc_uart_reva_regs_t *uart) { int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); // Holds the current index of tx_states - MXC_ASSERT(uart_num >= 0); if ((uart->status & MXC_F_UART_REVA_STATUS_TX_BUSY) || (uart->status & MXC_F_UART_REVA_STATUS_RX_BUSY)) { return E_BUSY; } // Check to see if there are any ongoing transactions and the UART has room in its FIFO - if ((states[uart_num].req == NULL) && !(uart->status & MXC_F_UART_REVA_STATUS_TX_FULL)) { + if ((states[uart_num].tx_req == NULL) && (states[uart_num].rx_req == NULL) && + !(uart->status & MXC_F_UART_REVA_STATUS_TX_FULL)) { return E_NO_ERROR; } @@ -895,10 +932,6 @@ int MXC_UART_RevA_TransactionAsync(mxc_uart_reva_req_t *req) unsigned int numToWrite, numToRead; int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)(req->uart)); - if (uart_num < 0) { - return E_BAD_PARAM; - } - if (req->txLen) { if (TxAsyncRequests[uart_num] != NULL) { return E_BAD_STATE; @@ -949,10 +982,6 @@ int MXC_UART_RevA_TransactionDMA(mxc_uart_reva_req_t *req, mxc_dma_regs_t *dma) { int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)(req->uart)); - if (uart_num < 0) { - return E_BAD_PARAM; - } - if (req->txLen) { if (req->txData == NULL) { return E_BAD_PARAM; @@ -968,8 +997,10 @@ int MXC_UART_RevA_TransactionDMA(mxc_uart_reva_req_t *req, mxc_dma_regs_t *dma) MXC_UART_DisableInt((mxc_uart_regs_t *)(req->uart), 0xFFFFFFFF); MXC_UART_ClearFlags((mxc_uart_regs_t *)(req->uart), 0xFFFFFFFF); - MXC_UART_ClearRXFIFO((mxc_uart_regs_t *)(req->uart)); - MXC_UART_ClearTXFIFO((mxc_uart_regs_t *)(req->uart)); + /* Clearing the RX FIFOs here makes RX-only or TX-only transactions half-duplex... + Commenting out for now.*/ + // MXC_UART_ClearRXFIFO((mxc_uart_regs_t *)(req->uart)); + // MXC_UART_ClearTXFIFO((mxc_uart_regs_t *)(req->uart)); (req->uart)->dma |= (1 << MXC_F_UART_REVA_DMA_RXDMA_LEVEL_POS); // Set RX DMA threshold to 1 byte @@ -982,8 +1013,14 @@ int MXC_UART_RevA_TransactionDMA(mxc_uart_reva_req_t *req, mxc_dma_regs_t *dma) MXC_DMA_Init(); #endif + // Reset rx/tx counters + req->rxCnt = 0; + req->txCnt = 0; + //tx if ((req->txData != NULL) && (req->txLen)) { + /* Save TX req, the DMA handler will use this later. */ + states[uart_num].tx_req = req; #if TARGET_NUM == 32665 if (MXC_UART_WriteTXFIFODMA((mxc_uart_regs_t *)(req->uart), dma, req->txData, req->txLen, NULL) != E_NO_ERROR) { @@ -998,6 +1035,7 @@ int MXC_UART_RevA_TransactionDMA(mxc_uart_reva_req_t *req, mxc_dma_regs_t *dma) } if ((req->rxData != NULL) && (req->rxLen)) { + states[uart_num].rx_req = req; #if TARGET_NUM == 32665 if (MXC_UART_ReadRXFIFODMA((mxc_uart_regs_t *)(req->uart), dma, req->rxData, req->rxLen, NULL) != E_NO_ERROR) { @@ -1016,22 +1054,44 @@ int MXC_UART_RevA_TransactionDMA(mxc_uart_reva_req_t *req, mxc_dma_regs_t *dma) void MXC_UART_RevA_DMACallback(int ch, int error) { - mxc_uart_reva_req_t *temp_req; + mxc_uart_reva_req_t *temp_req = NULL; for (int i = 0; i < MXC_UART_INSTANCES; i++) { if (states[i].channelTx == ch) { - //save the request - temp_req = states[i].req; - // Callback if not NULL - if (temp_req->callback != NULL) { + /* Populate txLen. The number of "remainder" bytes is what's left on the + DMA channel's count register. */ + states[i].tx_req->txCnt = states[i].tx_req->txLen - MXC_DMA->ch[ch].cnt; + + temp_req = states[i].tx_req; + + if (states[i].auto_dma_handlers) { + /* Release channel _before_ running callback in case + user wants to start another transaction inside it */ + MXC_DMA_ReleaseChannel(ch); + states[i].channelTx = -1; + } + + if (temp_req->callback != NULL && + ((states[i].tx_req->rxCnt == states[i].tx_req->rxLen) || + states[i].tx_req->rxData == NULL)) { + /* Only call TX callback if RX component is complete/disabled. Note that + we are checking the request associated with the _channel_ assignment, not + the other side of the state struct. */ temp_req->callback((mxc_uart_req_t *)temp_req, E_NO_ERROR); } break; } else if (states[i].channelRx == ch) { - //save the request - temp_req = states[i].req; - // Callback if not NULL - if (temp_req->callback != NULL) { + /* Same as above, but for RX */ + states[i].rx_req->rxCnt = states[i].rx_req->rxLen - MXC_DMA->ch[ch].cnt; + temp_req = states[i].rx_req; + if (states[i].auto_dma_handlers) { + MXC_DMA_ReleaseChannel(ch); + states[i].channelRx = -1; + } + + if (temp_req->callback != NULL && + ((states[i].rx_req->txCnt == states[i].rx_req->txLen) || + states[i].rx_req->txData == NULL)) { temp_req->callback((mxc_uart_req_t *)temp_req, E_NO_ERROR); } break; @@ -1042,15 +1102,13 @@ void MXC_UART_RevA_DMACallback(int ch, int error) int MXC_UART_RevA_RxAsyncCallback(mxc_uart_reva_regs_t *uart, int retVal) { mxc_uart_reva_req_t *req; - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - if (uartNum < 0) { - return E_BAD_PARAM; - } else if (RxAsyncRequests[uartNum] == NULL) { + if (RxAsyncRequests[uart_num] == NULL) { return E_BAD_STATE; } - req = (mxc_uart_reva_req_t *)RxAsyncRequests[uartNum]; + req = (mxc_uart_reva_req_t *)RxAsyncRequests[uart_num]; if (req->callback != NULL) { req->callback((mxc_uart_req_t *)req, retVal); @@ -1062,15 +1120,13 @@ int MXC_UART_RevA_RxAsyncCallback(mxc_uart_reva_regs_t *uart, int retVal) int MXC_UART_RevA_TxAsyncCallback(mxc_uart_reva_regs_t *uart, int retVal) { mxc_uart_reva_req_t *req; - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - if (uartNum < 0) { - return E_BAD_PARAM; - } else if (TxAsyncRequests[uartNum] == NULL) { + if (TxAsyncRequests[uart_num] == NULL) { return E_BAD_STATE; } - req = (mxc_uart_reva_req_t *)TxAsyncRequests[uartNum]; + req = (mxc_uart_reva_req_t *)TxAsyncRequests[uart_num]; if (req->callback != NULL) { req->callback((mxc_uart_req_t *)req, retVal); @@ -1083,10 +1139,7 @@ int MXC_UART_RevA_AsyncCallback(mxc_uart_reva_regs_t *uart, int retVal) { int err; - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - if (uartNum < 0) { - return E_BAD_PARAM; - } + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); // Call TX callback err = MXC_UART_TxAsyncCallback((mxc_uart_regs_t *)uart, retVal); @@ -1095,7 +1148,7 @@ int MXC_UART_RevA_AsyncCallback(mxc_uart_reva_regs_t *uart, int retVal) } // Call RX callback if the TX and RX requests are not the same request - if (TxAsyncRequests[uartNum] != RxAsyncRequests[uartNum]) { + if (TxAsyncRequests[uart_num] != RxAsyncRequests[uart_num]) { err = MXC_UART_RxAsyncCallback((mxc_uart_regs_t *)uart, retVal); } @@ -1104,10 +1157,6 @@ int MXC_UART_RevA_AsyncCallback(mxc_uart_reva_regs_t *uart, int retVal) int MXC_UART_RevA_TxAsyncStop(mxc_uart_reva_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - MXC_UART_DisableInt((mxc_uart_regs_t *)uart, MXC_F_UART_REVA_INT_EN_TX_FIFO_THRESH); TxAsyncRequests[MXC_UART_GET_IDX((mxc_uart_regs_t *)uart)] = NULL; @@ -1116,10 +1165,6 @@ int MXC_UART_RevA_TxAsyncStop(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_RxAsyncStop(mxc_uart_reva_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - MXC_UART_DisableInt((mxc_uart_regs_t *)uart, (MXC_UART_REVA_ERRINT_EN | MXC_F_UART_REVA_INT_EN_RX_FIFO_THRESH)); RxAsyncRequests[MXC_UART_GET_IDX((mxc_uart_regs_t *)uart)] = NULL; @@ -1129,19 +1174,15 @@ int MXC_UART_RevA_RxAsyncStop(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_AsyncStop(mxc_uart_reva_regs_t *uart) { - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); mxc_uart_reva_req_t *req; - if (uartNum < 0) { - return E_BAD_PARAM; - } - - req = (mxc_uart_reva_req_t *)TxAsyncRequests[uartNum]; + req = (mxc_uart_reva_req_t *)TxAsyncRequests[uart_num]; if (req != NULL) { MXC_UART_TxAsyncStop((mxc_uart_regs_t *)uart); } - req = (mxc_uart_reva_req_t *)RxAsyncRequests[uartNum]; + req = (mxc_uart_reva_req_t *)RxAsyncRequests[uart_num]; if (req != NULL) { MXC_UART_RxAsyncStop((mxc_uart_regs_t *)uart); } @@ -1151,13 +1192,9 @@ int MXC_UART_RevA_AsyncStop(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_TxAbortAsync(mxc_uart_reva_regs_t *uart) { - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - - if (uartNum < 0) { - return E_BAD_PARAM; - } + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - mxc_uart_reva_req_t *req = (mxc_uart_reva_req_t *)TxAsyncRequests[uartNum]; + mxc_uart_reva_req_t *req = (mxc_uart_reva_req_t *)TxAsyncRequests[uart_num]; if (req != NULL) { MXC_UART_TxAsyncCallback((mxc_uart_regs_t *)uart, E_ABORT); @@ -1169,13 +1206,9 @@ int MXC_UART_RevA_TxAbortAsync(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_RxAbortAsync(mxc_uart_reva_regs_t *uart) { - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - - if (uartNum < 0) { - return E_BAD_PARAM; - } + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - mxc_uart_reva_req_t *req = (mxc_uart_reva_req_t *)RxAsyncRequests[uartNum]; + mxc_uart_reva_req_t *req = (mxc_uart_reva_req_t *)RxAsyncRequests[uart_num]; if (req != NULL) { MXC_UART_RxAsyncCallback((mxc_uart_regs_t *)uart, E_ABORT); @@ -1205,14 +1238,10 @@ int MXC_UART_RevA_AbortAsync(mxc_uart_reva_regs_t *uart) int MXC_UART_RevA_AsyncHandler(mxc_uart_reva_regs_t *uart) { - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); unsigned int flags, numToWrite, numToRead; mxc_uart_reva_req_t *req; - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - flags = MXC_UART_GetFlags((mxc_uart_regs_t *)uart); if (flags & MXC_UART_REVA_ERRINT_FL & uart->int_en) { @@ -1222,13 +1251,13 @@ int MXC_UART_RevA_AsyncHandler(mxc_uart_reva_regs_t *uart) MXC_UART_AsyncCallback((mxc_uart_regs_t *)uart, E_COMM_ERR); - RxAsyncRequests[uartNum] = NULL; - TxAsyncRequests[uartNum] = NULL; + RxAsyncRequests[uart_num] = NULL; + TxAsyncRequests[uart_num] = NULL; return E_INVALID; } - req = (mxc_uart_reva_req_t *)TxAsyncRequests[uartNum]; + req = (mxc_uart_reva_req_t *)TxAsyncRequests[uart_num]; if ((flags & MXC_F_UART_REVA_INT_FL_TX_FIFO_THRESH) && (req != NULL) && (req->txLen)) { numToWrite = MXC_UART_GetTXFIFOAvailable((mxc_uart_regs_t *)(req->uart)); @@ -1238,7 +1267,7 @@ int MXC_UART_RevA_AsyncHandler(mxc_uart_reva_regs_t *uart) MXC_UART_ClearFlags((mxc_uart_regs_t *)(req->uart), MXC_F_UART_REVA_INT_FL_TX_FIFO_THRESH); } - req = (mxc_uart_reva_req_t *)RxAsyncRequests[uartNum]; + req = (mxc_uart_reva_req_t *)RxAsyncRequests[uart_num]; if ((flags & MXC_F_UART_REVA_INT_FL_RX_FIFO_THRESH) && (req != NULL) && (req->rxLen)) { numToRead = MXC_UART_GetRXFIFOAvailable((mxc_uart_regs_t *)(req->uart)); @@ -1248,14 +1277,14 @@ int MXC_UART_RevA_AsyncHandler(mxc_uart_reva_regs_t *uart) MXC_UART_ClearFlags((mxc_uart_regs_t *)(req->uart), MXC_F_UART_REVA_INT_FL_RX_FIFO_THRESH); } - if (RxAsyncRequests[uartNum] == TxAsyncRequests[uartNum]) { + if (RxAsyncRequests[uart_num] == TxAsyncRequests[uart_num]) { if ((req != NULL) && (req->rxCnt == req->rxLen) && (req->txCnt == req->txLen)) { MXC_UART_DisableInt((mxc_uart_regs_t *)uart, (MXC_F_UART_REVA_INT_EN_TX_FIFO_THRESH | MXC_UART_REVA_ERRINT_EN | MXC_F_UART_REVA_INT_EN_RX_FIFO_THRESH)); - RxAsyncRequests[uartNum] = NULL; - TxAsyncRequests[uartNum] = NULL; + RxAsyncRequests[uart_num] = NULL; + TxAsyncRequests[uart_num] = NULL; if (req->callback != NULL) { req->callback((mxc_uart_req_t *)req, E_NO_ERROR); @@ -1265,10 +1294,10 @@ int MXC_UART_RevA_AsyncHandler(mxc_uart_reva_regs_t *uart) return E_NO_ERROR; } - req = TxAsyncRequests[uartNum]; + req = TxAsyncRequests[uart_num]; if (req != NULL && req->txCnt == req->txLen) { MXC_UART_DisableInt((mxc_uart_regs_t *)uart, MXC_F_UART_REVA_INT_EN_TX_FIFO_THRESH); - TxAsyncRequests[uartNum] = NULL; + TxAsyncRequests[uart_num] = NULL; if (req->callback != NULL) { req->callback((mxc_uart_req_t *)req, E_NO_ERROR); @@ -1277,11 +1306,11 @@ int MXC_UART_RevA_AsyncHandler(mxc_uart_reva_regs_t *uart) return E_NO_ERROR; } - req = RxAsyncRequests[uartNum]; + req = RxAsyncRequests[uart_num]; if (req != NULL && req->rxCnt == req->rxLen) { MXC_UART_DisableInt((mxc_uart_regs_t *)uart, (MXC_UART_REVA_ERRINT_EN | MXC_F_UART_REVA_INT_EN_RX_FIFO_THRESH)); - RxAsyncRequests[uartNum] = NULL; + RxAsyncRequests[uart_num] = NULL; if (req->callback != NULL) { req->callback((mxc_uart_req_t *)req, E_NO_ERROR); diff --git a/Libraries/PeriphDrivers/Source/UART/uart_reva.h b/Libraries/PeriphDrivers/Source/UART/uart_reva.h index 71e69969ac..0c83de56aa 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_reva.h +++ b/Libraries/PeriphDrivers/Source/UART/uart_reva.h @@ -130,4 +130,10 @@ int MXC_UART_RevA_TxAsyncCallback(mxc_uart_reva_regs_t *uart, int retVal); int MXC_UART_RevA_RxAsyncCallback(mxc_uart_reva_regs_t *uart, int retVal); void MXC_UART_RevA_DMACallback(int ch, int error); +int MXC_UART_RevA_SetAutoDMAHandlers(mxc_uart_reva_regs_t *uart, bool enable); +int MXC_UART_RevA_SetTXDMAChannel(mxc_uart_reva_regs_t *uart, unsigned int channel); +int MXC_UART_RevA_GetTXDMAChannel(mxc_uart_reva_regs_t *uart); +int MXC_UART_RevA_SetRXDMAChannel(mxc_uart_reva_regs_t *uart, unsigned int channel); +int MXC_UART_RevA_GetRXDMAChannel(mxc_uart_reva_regs_t *uart); + #endif // LIBRARIES_PERIPHDRIVERS_SOURCE_UART_UART_REVA_H_ diff --git a/Libraries/PeriphDrivers/Source/UART/uart_revb.c b/Libraries/PeriphDrivers/Source/UART/uart_revb.c index fb9a90f6af..7aa70cd190 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_revb.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_revb.c @@ -55,6 +55,9 @@ #include "uart.h" #include "uart_revb.h" #include "dma.h" +#ifdef __arm__ +#include "nvic_table.h" +#endif /* **** Definitions **** */ #define MXC_UART_REVB_ERRINT_EN \ @@ -68,9 +71,11 @@ static void *AsyncTxRequests[MXC_UART_INSTANCES]; static void *AsyncRxRequests[MXC_UART_INSTANCES]; typedef struct { - mxc_uart_revb_req_t *req; + mxc_uart_revb_req_t *tx_req; + mxc_uart_revb_req_t *rx_req; int channelTx; int channelRx; + bool auto_dma_handlers; } uart_revb_req_state_t; uart_revb_req_state_t states[MXC_UART_INSTANCES]; @@ -84,9 +89,7 @@ int MXC_UART_RevB_Init(mxc_uart_revb_regs_t *uart, unsigned int baud, mxc_uart_r { int err; - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } + MXC_ASSERT(MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) >= 0) // Initialize UART if ((err = MXC_UART_SetRXThreshold((mxc_uart_regs_t *)uart, 1)) != @@ -113,15 +116,19 @@ int MXC_UART_RevB_Init(mxc_uart_revb_regs_t *uart, unsigned int baud, mxc_uart_r return err; } + // Initialize state struct + unsigned int i = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + states[i].channelRx = -1; + states[i].channelTx = -1; + states[i].tx_req = NULL; + states[i].rx_req = NULL; + states[i].auto_dma_handlers = false; + return E_NO_ERROR; } int MXC_UART_RevB_ReadyForSleep(mxc_uart_revb_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (AsyncTxRequests[MXC_UART_GET_IDX((mxc_uart_regs_t *)uart)] != NULL) { return E_BUSY; } @@ -137,9 +144,6 @@ int MXC_UART_RevB_SetFrequency(mxc_uart_revb_regs_t *uart, unsigned int baud, mxc_uart_revb_clock_t clock) { unsigned clkDiv = 0, mod = 0; - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } // OSR default value uart->osr = 5; @@ -191,10 +195,6 @@ int MXC_UART_RevB_GetFrequency(mxc_uart_revb_regs_t *uart) { int periphClock = 0; - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if ((uart->ctrl & MXC_F_UART_REVB_CTRL_BCLKSRC) == MXC_S_UART_REVB_CTRL_BCLKSRC_EXTERNAL_CLOCK) { periphClock = UART_EXTCLK_FREQ; @@ -218,10 +218,6 @@ int MXC_UART_RevB_GetFrequency(mxc_uart_revb_regs_t *uart) int MXC_UART_RevB_SetDataSize(mxc_uart_revb_regs_t *uart, int dataSize) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (dataSize < 5 || dataSize > 8) { return E_BAD_PARAM; } @@ -235,10 +231,6 @@ int MXC_UART_RevB_SetDataSize(mxc_uart_revb_regs_t *uart, int dataSize) int MXC_UART_RevB_SetStopBits(mxc_uart_revb_regs_t *uart, mxc_uart_stop_t stopBits) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - switch (stopBits) { case MXC_UART_STOP_1: MXC_SETFIELD(uart->ctrl, MXC_F_UART_REVB_CTRL_STOPBITS, @@ -260,10 +252,6 @@ int MXC_UART_RevB_SetStopBits(mxc_uart_revb_regs_t *uart, mxc_uart_stop_t stopBi int MXC_UART_RevB_SetParity(mxc_uart_revb_regs_t *uart, mxc_uart_parity_t parity) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - switch (parity) { case MXC_UART_PARITY_DISABLE: MXC_SETFIELD(uart->ctrl, MXC_F_UART_REVB_CTRL_PAR_EN, 0 << MXC_F_UART_REVB_CTRL_PAR_EN_POS); @@ -304,10 +292,6 @@ int MXC_UART_RevB_SetParity(mxc_uart_revb_regs_t *uart, mxc_uart_parity_t parity int MXC_UART_RevB_SetFlowCtrl(mxc_uart_revb_regs_t *uart, mxc_uart_flow_t flowCtrl, int rtsThreshold) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - switch (flowCtrl) { case MXC_UART_FLOW_DIS: MXC_SETFIELD(uart->ctrl, MXC_F_UART_REVB_CTRL_HFC_EN, 0 << MXC_F_UART_REVB_CTRL_HFC_EN_POS); @@ -329,10 +313,6 @@ int MXC_UART_RevB_SetFlowCtrl(mxc_uart_revb_regs_t *uart, mxc_uart_flow_t flowCt int MXC_UART_RevB_SetClockSource(mxc_uart_revb_regs_t *uart, mxc_uart_revb_clock_t clock) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - switch (clock) { case MXC_UART_REVB_APB_CLK: break; @@ -358,10 +338,6 @@ int MXC_UART_RevB_SetClockSource(mxc_uart_revb_regs_t *uart, mxc_uart_revb_clock int MXC_UART_RevB_GetActive(mxc_uart_revb_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (uart->status & (MXC_F_UART_REVB_STATUS_TX_BUSY | MXC_F_UART_REVB_STATUS_RX_BUSY)) { return E_BUSY; } @@ -372,15 +348,27 @@ int MXC_UART_RevB_GetActive(mxc_uart_revb_regs_t *uart) int MXC_UART_RevB_AbortTransmission(mxc_uart_revb_regs_t *uart) { MXC_UART_ClearTXFIFO((mxc_uart_regs_t *)uart); + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + + if (states[uart_num].channelTx >= 0) { + MXC_DMA_Stop(states[uart_num].channelTx); + } + if (states[uart_num].channelRx >= 0) { + MXC_DMA_Stop(states[uart_num].channelRx); + } + + if (states[uart_num].auto_dma_handlers) { + MXC_DMA_ReleaseChannel(states[uart_num].channelTx); + states[uart_num].channelTx = -1; + MXC_DMA_ReleaseChannel(states[uart_num].channelRx); + states[uart_num].channelRx = -1; + } + return E_NO_ERROR; } int MXC_UART_RevB_ReadCharacterRaw(mxc_uart_revb_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (uart->status & MXC_F_UART_REVB_STATUS_RX_EM) { return E_UNDERFLOW; } @@ -390,10 +378,6 @@ int MXC_UART_RevB_ReadCharacterRaw(mxc_uart_revb_regs_t *uart) int MXC_UART_RevB_WriteCharacterRaw(mxc_uart_revb_regs_t *uart, uint8_t character) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - // Require the TX FIFO to be empty, so that we write out the expected character // Return error if the FIFO is full if (uart->status & MXC_F_UART_REVB_STATUS_TX_FULL) { @@ -407,10 +391,6 @@ int MXC_UART_RevB_WriteCharacterRaw(mxc_uart_revb_regs_t *uart, uint8_t characte int MXC_UART_RevB_ReadCharacter(mxc_uart_revb_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (uart->status & MXC_F_UART_REVB_STATUS_RX_EM) { return E_UNDERFLOW; } @@ -420,10 +400,6 @@ int MXC_UART_RevB_ReadCharacter(mxc_uart_revb_regs_t *uart) int MXC_UART_RevB_WriteCharacter(mxc_uart_revb_regs_t *uart, uint8_t character) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - // Require the TX FIFO to be empty, so that we write out the expected character // Return error if the FIFO is full if (uart->status & MXC_F_UART_REVB_STATUS_TX_FULL) { @@ -440,10 +416,6 @@ int MXC_UART_RevB_Read(mxc_uart_revb_regs_t *uart, uint8_t *buffer, int *len) int read = 0; int retVal; - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (buffer == NULL) { return E_NULL_PTR; } @@ -472,10 +444,6 @@ int MXC_UART_RevB_Write(mxc_uart_revb_regs_t *uart, const uint8_t *byte, int *le int written = 0; int retVal; - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (byte == NULL) { return E_NULL_PTR; } @@ -542,10 +510,6 @@ unsigned int MXC_UART_RevB_GetTXFIFOAvailable(mxc_uart_revb_regs_t *uart) int MXC_UART_RevB_ClearRXFIFO(mxc_uart_revb_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->ctrl |= MXC_F_UART_REVB_CTRL_RX_FLUSH; while (!(uart->status & MXC_F_UART_REVB_STATUS_RX_EM)) {} @@ -554,10 +518,6 @@ int MXC_UART_RevB_ClearRXFIFO(mxc_uart_revb_regs_t *uart) int MXC_UART_RevB_ClearTXFIFO(mxc_uart_revb_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->ctrl |= MXC_F_UART_REVB_CTRL_TX_FLUSH; while (uart->ctrl & MXC_F_UART_REVB_CTRL_TX_FLUSH) {} @@ -566,10 +526,6 @@ int MXC_UART_RevB_ClearTXFIFO(mxc_uart_revb_regs_t *uart) int MXC_UART_RevB_SetRXThreshold(mxc_uart_revb_regs_t *uart, unsigned int numBytes) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (numBytes < 1 || numBytes > MXC_UART_FIFO_DEPTH) { return E_BAD_PARAM; } @@ -592,10 +548,6 @@ unsigned int MXC_UART_RevB_GetFlags(mxc_uart_revb_regs_t *uart) int MXC_UART_RevB_ClearFlags(mxc_uart_revb_regs_t *uart, unsigned int flags) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->int_fl = flags; return E_NO_ERROR; @@ -603,10 +555,6 @@ int MXC_UART_RevB_ClearFlags(mxc_uart_revb_regs_t *uart, unsigned int flags) int MXC_UART_RevB_EnableInt(mxc_uart_revb_regs_t *uart, unsigned int intEn) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->int_en |= intEn; return E_NO_ERROR; @@ -614,10 +562,6 @@ int MXC_UART_RevB_EnableInt(mxc_uart_revb_regs_t *uart, unsigned int intEn) int MXC_UART_RevB_DisableInt(mxc_uart_revb_regs_t *uart, unsigned int intDis) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->int_en &= ~intDis; return E_NO_ERROR; @@ -696,21 +640,17 @@ int MXC_UART_RevB_Transaction(mxc_uart_revb_req_t *req) int MXC_UART_RevB_TransactionAsync(mxc_uart_revb_req_t *req) { uint32_t numToWrite, numToRead; - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)(req->uart)); - - if (uartNum < 0) { - return E_INVALID; - } + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)(req->uart)); - if (!AsyncTxRequests[uartNum] && !AsyncRxRequests[uartNum]) { + if (!AsyncTxRequests[uart_num] && !AsyncRxRequests[uart_num]) { /* No requests pending, clear the interrupt state */ MXC_UART_DisableInt((mxc_uart_regs_t *)(req->uart), 0xFFFFFFFF); MXC_UART_ClearFlags((mxc_uart_regs_t *)(req->uart), 0xFFFFFFFF); - } else if (AsyncRxRequests[uartNum] && req->rxLen) { + } else if (AsyncRxRequests[uart_num] && req->rxLen) { /* RX request pending */ return E_BUSY; - } else if (AsyncTxRequests[uartNum] && req->txLen) { + } else if (AsyncTxRequests[uart_num] && req->txLen) { /* TX request pending */ return E_BUSY; } @@ -736,7 +676,7 @@ int MXC_UART_RevB_TransactionAsync(mxc_uart_revb_req_t *req) if ((MXC_UART_GetTXFIFOAvailable((mxc_uart_regs_t *)(req->uart)) >= (MXC_UART_FIFO_DEPTH / 2)) && (req->txCnt == req->txLen)) { - NVIC_SetPendingIRQ(MXC_UART_GET_IRQ(uartNum)); + NVIC_SetPendingIRQ(MXC_UART_GET_IRQ(uart_num)); } } @@ -766,14 +706,11 @@ int MXC_UART_RevB_TransactionAsync(mxc_uart_revb_req_t *req) int MXC_UART_RevB_AsyncTxCallback(mxc_uart_revb_regs_t *uart, int retVal) { - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - if (uartNum < 0) { - return E_BAD_PARAM; - } + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - mxc_uart_req_t *req = (mxc_uart_req_t *)AsyncTxRequests[uartNum]; + mxc_uart_req_t *req = (mxc_uart_req_t *)AsyncTxRequests[uart_num]; if ((req != NULL) && (req->callback != NULL)) { - AsyncTxRequests[uartNum] = NULL; + AsyncTxRequests[uart_num] = NULL; req->callback(req, retVal); } @@ -782,14 +719,11 @@ int MXC_UART_RevB_AsyncTxCallback(mxc_uart_revb_regs_t *uart, int retVal) int MXC_UART_RevB_AsyncRxCallback(mxc_uart_revb_regs_t *uart, int retVal) { - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - if (uartNum < 0) { - return E_BAD_PARAM; - } + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - mxc_uart_req_t *req = (mxc_uart_req_t *)AsyncRxRequests[uartNum]; + mxc_uart_req_t *req = (mxc_uart_req_t *)AsyncRxRequests[uart_num]; if ((req != NULL) && (req->callback != NULL)) { - AsyncRxRequests[uartNum] = NULL; + AsyncRxRequests[uart_num] = NULL; req->callback(req, retVal); } @@ -798,15 +732,12 @@ int MXC_UART_RevB_AsyncRxCallback(mxc_uart_revb_regs_t *uart, int retVal) int MXC_UART_RevB_AsyncCallback(mxc_uart_revb_regs_t *uart, int retVal) { - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - if (uartNum < 0) { - return E_BAD_PARAM; - } + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); MXC_UART_RevB_AsyncTxCallback(uart, retVal); /* Only call the callback once if it's for the same request */ - if (AsyncRxRequests[uartNum] != AsyncTxRequests[uartNum]) { + if (AsyncRxRequests[uart_num] != AsyncTxRequests[uart_num]) { MXC_UART_RevB_AsyncRxCallback(uart, retVal); } @@ -815,10 +746,6 @@ int MXC_UART_RevB_AsyncCallback(mxc_uart_revb_regs_t *uart, int retVal) int MXC_UART_RevB_AsyncStopTx(mxc_uart_revb_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - MXC_UART_DisableInt((mxc_uart_regs_t *)uart, MXC_F_UART_REVB_INT_EN_TX_HE); return E_NO_ERROR; @@ -826,10 +753,6 @@ int MXC_UART_RevB_AsyncStopTx(mxc_uart_revb_regs_t *uart) int MXC_UART_RevB_AsyncStopRx(mxc_uart_revb_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - MXC_UART_DisableInt((mxc_uart_regs_t *)uart, MXC_UART_REVB_ERRINT_EN); return E_NO_ERROR; @@ -837,10 +760,6 @@ int MXC_UART_RevB_AsyncStopRx(mxc_uart_revb_regs_t *uart) int MXC_UART_RevB_AsyncStop(mxc_uart_revb_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - MXC_UART_DisableInt((mxc_uart_regs_t *)uart, 0xFFFFFFFF); return E_NO_ERROR; @@ -848,10 +767,6 @@ int MXC_UART_RevB_AsyncStop(mxc_uart_revb_regs_t *uart) int MXC_UART_RevB_AbortAsync(mxc_uart_revb_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - MXC_UART_AsyncStop((mxc_uart_regs_t *)uart); MXC_UART_AsyncCallback((mxc_uart_regs_t *)uart, E_ABORT); @@ -863,16 +778,12 @@ int MXC_UART_RevB_AsyncHandler(mxc_uart_revb_regs_t *uart) uint32_t numToWrite, numToRead, flags; mxc_uart_req_t *req; - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - - if (uartNum < 0) { - return E_INVALID; - } + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); flags = MXC_UART_GetFlags((mxc_uart_regs_t *)uart); /* Unexpected interrupt */ - if (!AsyncTxRequests[uartNum] && !AsyncRxRequests[uartNum]) { + if (!AsyncTxRequests[uart_num] && !AsyncRxRequests[uart_num]) { MXC_UART_ClearFlags((mxc_uart_regs_t *)uart, uart->int_fl); return E_INVALID; } @@ -883,7 +794,7 @@ int MXC_UART_RevB_AsyncHandler(mxc_uart_revb_regs_t *uart) return E_INVALID; } - req = (mxc_uart_req_t *)AsyncTxRequests[uartNum]; + req = (mxc_uart_req_t *)AsyncTxRequests[uart_num]; if ((req != NULL) && (req->txLen)) { numToWrite = MXC_UART_GetTXFIFOAvailable((mxc_uart_regs_t *)(req->uart)); numToWrite = numToWrite > (req->txLen - req->txCnt) ? req->txLen - req->txCnt : numToWrite; @@ -892,7 +803,7 @@ int MXC_UART_RevB_AsyncHandler(mxc_uart_revb_regs_t *uart) MXC_UART_ClearFlags(req->uart, MXC_F_UART_REVB_INT_FL_TX_HE); } - req = (mxc_uart_req_t *)AsyncRxRequests[uartNum]; + req = (mxc_uart_req_t *)AsyncRxRequests[uart_num]; if ((req != NULL) && (flags & MXC_F_UART_REVB_INT_FL_RX_THD) && (req->rxLen)) { numToRead = MXC_UART_GetRXFIFOAvailable((mxc_uart_regs_t *)(req->uart)); numToRead = numToRead > (req->rxLen - req->rxCnt) ? req->rxLen - req->rxCnt : numToRead; @@ -906,7 +817,7 @@ int MXC_UART_RevB_AsyncHandler(mxc_uart_revb_regs_t *uart) MXC_UART_ClearFlags((mxc_uart_regs_t *)(req->uart), MXC_F_UART_REVB_INT_FL_RX_THD); } - if (AsyncRxRequests[uartNum] == AsyncTxRequests[uartNum]) { + if (AsyncRxRequests[uart_num] == AsyncTxRequests[uart_num]) { if ((req != NULL) && (req->rxCnt == req->rxLen) && (req->txCnt == req->txLen)) { MXC_UART_AsyncStop((mxc_uart_regs_t *)uart); MXC_UART_AsyncCallback((mxc_uart_regs_t *)uart, E_NO_ERROR); @@ -914,14 +825,14 @@ int MXC_UART_RevB_AsyncHandler(mxc_uart_revb_regs_t *uart) return E_NO_ERROR; } - req = (mxc_uart_req_t *)AsyncRxRequests[uartNum]; + req = (mxc_uart_req_t *)AsyncRxRequests[uart_num]; if ((req != NULL) && (req->rxCnt == req->rxLen)) { MXC_UART_RevB_AsyncStopRx(uart); MXC_UART_RevB_AsyncRxCallback(uart, E_NO_ERROR); return E_NO_ERROR; } - req = (mxc_uart_req_t *)AsyncTxRequests[uartNum]; + req = (mxc_uart_req_t *)AsyncTxRequests[uart_num]; if ((req != NULL) && (req->txCnt == req->txLen)) { MXC_UART_RevB_AsyncStopTx(uart); MXC_UART_RevB_AsyncTxCallback(uart, E_NO_ERROR); @@ -931,6 +842,59 @@ int MXC_UART_RevB_AsyncHandler(mxc_uart_revb_regs_t *uart) return E_NO_ERROR; } +int MXC_UART_RevB_SetAutoDMAHandlers(mxc_uart_revb_regs_t *uart, bool enable) +{ + int n = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + MXC_ASSERT(n >= 0); + + states[n].auto_dma_handlers = enable; + + return E_NO_ERROR; +} + +void MXC_UART_RevB_DMA_SetupAutoHandlers(unsigned int channel) +{ +#ifdef __arm__ + NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(channel)); + MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(channel), MXC_DMA_Handler); +#else + // TODO(JC): RISC-V + +#endif // __arm__ +} + +int MXC_UART_RevB_SetTXDMAChannel(mxc_uart_revb_regs_t *uart, unsigned int channel) +{ + int n = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + + states[n].channelTx = channel; + + return E_NO_ERROR; +} + +int MXC_UART_RevB_GetTXDMAChannel(mxc_uart_revb_regs_t *uart) +{ + int n = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + + return states[n].channelTx; +} + +int MXC_UART_RevB_SetRXDMAChannel(mxc_uart_revb_regs_t *uart, unsigned int channel) +{ + int n = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + + states[n].channelRx = channel; + + return E_NO_ERROR; +} + +int MXC_UART_RevB_GetRXDMAChannel(mxc_uart_revb_regs_t *uart) +{ + int n = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + + return states[n].channelRx; +} + int MXC_UART_RevB_ReadRXFIFODMA(mxc_uart_revb_regs_t *uart, unsigned char *bytes, unsigned int len, mxc_uart_dma_complete_cb_t callback, mxc_dma_config_t config) { @@ -939,15 +903,20 @@ int MXC_UART_RevB_ReadRXFIFODMA(mxc_uart_revb_regs_t *uart, unsigned char *bytes int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - if (uart_num < 0) { - return E_INVALID; - } - if (bytes == NULL) { return E_NULL_PTR; } - channel = MXC_DMA_AcquireChannel(); + if (states[uart_num].auto_dma_handlers && states[uart_num].channelRx < 0) { + /* Acquire channel if we don't have one already */ + channel = MXC_DMA_AcquireChannel(); + MXC_UART_RevB_SetRXDMAChannel(uart, channel); + MXC_UART_RevB_DMA_SetupAutoHandlers(channel); + } else { + if (states[uart_num].channelRx < 0) + return E_BAD_STATE; + channel = MXC_UART_RevB_GetRXDMAChannel(uart); + } config.ch = channel; @@ -982,15 +951,20 @@ int MXC_UART_RevB_WriteTXFIFODMA(mxc_uart_revb_regs_t *uart, const unsigned char int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); - if (uart_num < 0) { - return E_INVALID; - } - if (bytes == NULL) { return E_NULL_PTR; } - channel = MXC_DMA_AcquireChannel(); + if (states[uart_num].auto_dma_handlers && states[uart_num].channelTx < 0) { + /* Acquire channel if we don't have one already */ + channel = MXC_DMA_AcquireChannel(); + MXC_UART_RevB_SetTXDMAChannel(uart, channel); + MXC_UART_RevB_DMA_SetupAutoHandlers(channel); + } else { + if (states[uart_num].channelTx < 0) + return E_BAD_STATE; + channel = MXC_UART_RevB_GetTXDMAChannel(uart); + } config.ch = channel; @@ -1020,10 +994,6 @@ int MXC_UART_RevB_TransactionDMA(mxc_uart_revb_req_t *req) { int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)(req->uart)); - if (uart_num < 0) { - return E_BAD_PARAM; - } - if (req->txLen) { if (req->txData == NULL) { return E_BAD_PARAM; @@ -1039,8 +1009,10 @@ int MXC_UART_RevB_TransactionDMA(mxc_uart_revb_req_t *req) MXC_UART_DisableInt((mxc_uart_regs_t *)(req->uart), 0xFFFFFFFF); MXC_UART_ClearFlags((mxc_uart_regs_t *)(req->uart), 0xFFFFFFFF); - MXC_UART_ClearTXFIFO((mxc_uart_regs_t *)(req->uart)); - MXC_UART_ClearRXFIFO((mxc_uart_regs_t *)(req->uart)); + // Clearing the RX FIFOs here makes RX-only or TX-only + // transactions half-duplex. Commenting out for now. + // MXC_UART_ClearTXFIFO((mxc_uart_regs_t *)(req->uart)); + // MXC_UART_ClearRXFIFO((mxc_uart_regs_t *)(req->uart)); //Set DMA FIFO threshold (req->uart)->dma |= (1 << MXC_F_UART_REVB_DMA_RX_THD_VAL_POS); @@ -1048,26 +1020,27 @@ int MXC_UART_RevB_TransactionDMA(mxc_uart_revb_req_t *req) MXC_DMA_Init(); + // Reset rx/tx counters, + req->rxCnt = 0; + req->txCnt = 0; + //tx if ((req->txData != NULL) && (req->txLen)) { + /* Save TX req, the DMA handler will use this later. */ + states[uart_num].tx_req = req; if (MXC_UART_WriteTXFIFODMA((mxc_uart_regs_t *)(req->uart), req->txData, req->txLen, NULL) != E_NO_ERROR) { return E_BAD_PARAM; } - - // Save state for UART DMACallback function. - states[uart_num].req = req; } //rx if ((req->rxData != NULL) && (req->rxLen)) { + states[uart_num].rx_req = req; if (MXC_UART_ReadRXFIFODMA((mxc_uart_regs_t *)(req->uart), req->rxData, req->rxLen, NULL) != E_NO_ERROR) { return E_BAD_PARAM; } - - // Save state for UART DMACallback function. - states[uart_num].req = req; } return E_NO_ERROR; @@ -1079,24 +1052,40 @@ void MXC_UART_RevB_DMACallback(int ch, int error) for (int i = 0; i < MXC_UART_INSTANCES; i++) { if (states[i].channelTx == ch) { - //save the request - temp_req = states[i].req; + /* Populate txLen. The number of "remainder" bytes is what's left on the + DMA channel's count register. */ + states[i].tx_req->txCnt = states[i].tx_req->txLen - MXC_DMA->ch[ch].cnt; - MXC_DMA_ReleaseChannel(ch); + temp_req = states[i].tx_req; - // Callback if not NULL - if (temp_req->callback != NULL) { + if (states[i].auto_dma_handlers) { + /* Release channel _before_ running callback in case + user wants to start another transaction inside it */ + MXC_DMA_ReleaseChannel(ch); + states[i].channelTx = -1; + } + + if (temp_req->callback != NULL && + ((states[i].tx_req->rxCnt == states[i].tx_req->rxLen) || + states[i].tx_req->rxData == NULL)) { + /* Only call TX callback if RX component is complete/disabled. Note that + we are checking the request associated with the _channel_ assignment, not + the other side of the state struct. */ temp_req->callback((mxc_uart_req_t *)temp_req, E_NO_ERROR); } break; } else if (states[i].channelRx == ch) { - //save the request - temp_req = states[i].req; - - MXC_DMA_ReleaseChannel(ch); + /* Same as above, but for RX */ + states[i].rx_req->rxCnt = states[i].rx_req->rxLen - MXC_DMA->ch[ch].cnt; + temp_req = states[i].rx_req; + if (states[i].auto_dma_handlers) { + MXC_DMA_ReleaseChannel(ch); + states[i].channelRx = -1; + } - // Callback if not NULL - if (temp_req->callback != NULL) { + if (temp_req->callback != NULL && + ((states[i].rx_req->txCnt == states[i].rx_req->txLen) || + states[i].rx_req->txData == NULL)) { temp_req->callback((mxc_uart_req_t *)temp_req, E_NO_ERROR); } break; diff --git a/Libraries/PeriphDrivers/Source/UART/uart_revb.h b/Libraries/PeriphDrivers/Source/UART/uart_revb.h index e5f5c0a55c..45679dca62 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_revb.h +++ b/Libraries/PeriphDrivers/Source/UART/uart_revb.h @@ -135,4 +135,10 @@ int MXC_UART_RevB_AsyncStop(mxc_uart_revb_regs_t *uart); int MXC_UART_RevB_AsyncCallback(mxc_uart_revb_regs_t *uart, int retVal); void MXC_UART_RevB_DMACallback(int ch, int error); +int MXC_UART_RevB_SetAutoDMAHandlers(mxc_uart_revb_regs_t *uart, bool enable); +int MXC_UART_RevB_SetTXDMAChannel(mxc_uart_revb_regs_t *uart, unsigned int channel); +int MXC_UART_RevB_GetTXDMAChannel(mxc_uart_revb_regs_t *uart); +int MXC_UART_RevB_SetRXDMAChannel(mxc_uart_revb_regs_t *uart, unsigned int channel); +int MXC_UART_RevB_GetRXDMAChannel(mxc_uart_revb_regs_t *uart); + #endif // LIBRARIES_PERIPHDRIVERS_SOURCE_UART_UART_REVB_H_ diff --git a/Libraries/PeriphDrivers/Source/UART/uart_revc.c b/Libraries/PeriphDrivers/Source/UART/uart_revc.c index aaf97fbfd3..75b785d958 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_revc.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_revc.c @@ -87,9 +87,7 @@ int MXC_UART_RevC_Init(mxc_uart_revc_regs_t *uart, unsigned int baud) { int err; - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } + MXC_ASSERT(MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) >= 0) // Initialize UART // Set RX threshold to 1 byte @@ -119,10 +117,6 @@ int MXC_UART_RevC_Init(mxc_uart_revc_regs_t *uart, unsigned int baud) int MXC_UART_RevC_ReadyForSleep(mxc_uart_revc_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (AsyncRequests[MXC_UART_GET_IDX((mxc_uart_regs_t *)uart)] != NULL) { return E_BUSY; } @@ -134,10 +128,6 @@ int MXC_UART_RevC_SetFrequency(mxc_uart_revc_regs_t *uart, unsigned int baud) { int div = 0, baud0 = 0, baud1 = 0; - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - // Set the baud rate // Calculate divisor div = PeripheralClock / baud; @@ -163,10 +153,6 @@ int MXC_UART_RevC_GetFrequency(mxc_uart_revc_regs_t *uart) int MXC_UART_RevC_SetDataSize(mxc_uart_revc_regs_t *uart, int dataSize) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (dataSize < 5 || dataSize > 8) { return E_BAD_PARAM; } @@ -180,10 +166,6 @@ int MXC_UART_RevC_SetDataSize(mxc_uart_revc_regs_t *uart, int dataSize) int MXC_UART_RevC_SetStopBits(mxc_uart_revc_regs_t *uart, mxc_uart_stop_t stopBits) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - switch (stopBits) { case MXC_UART_STOP_1: MXC_SETFIELD(uart->ctrl, MXC_F_UART_REVC_CTRL_STOPBITS, @@ -205,10 +187,6 @@ int MXC_UART_RevC_SetStopBits(mxc_uart_revc_regs_t *uart, mxc_uart_stop_t stopBi int MXC_UART_RevC_SetParity(mxc_uart_revc_regs_t *uart, mxc_uart_parity_t parity) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - switch (parity) { case MXC_UART_PARITY_DISABLE: MXC_SETFIELD(uart->ctrl, MXC_F_UART_REVC_CTRL_PARITY_EN, @@ -255,10 +233,6 @@ int MXC_UART_RevC_SetParity(mxc_uart_revc_regs_t *uart, mxc_uart_parity_t parity int MXC_UART_RevC_GetActive(mxc_uart_revc_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (uart->status & (MXC_F_UART_REVC_STATUS_TX_BUSY | MXC_F_UART_REVC_STATUS_RX_BUSY)) { return E_BUSY; } @@ -268,19 +242,11 @@ int MXC_UART_RevC_GetActive(mxc_uart_revc_regs_t *uart) int MXC_UART_RevC_AbortTransmission(mxc_uart_revc_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - return MXC_UART_ClearTXFIFO((mxc_uart_regs_t *)uart); } int MXC_UART_RevC_ReadCharacterRaw(mxc_uart_revc_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (uart->status & MXC_F_UART_REVC_STATUS_RX_EMPTY) { return E_UNDERFLOW; } @@ -290,10 +256,6 @@ int MXC_UART_RevC_ReadCharacterRaw(mxc_uart_revc_regs_t *uart) int MXC_UART_RevC_WriteCharacterRaw(mxc_uart_revc_regs_t *uart, uint8_t character) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - // Return error if the FIFO is full if (uart->status & MXC_F_UART_REVC_STATUS_TX_FULL) { return E_OVERFLOW; @@ -455,10 +417,6 @@ unsigned int MXC_UART_RevC_GetTXFIFOAvailable(mxc_uart_revc_regs_t *uart) int MXC_UART_RevC_ClearRXFIFO(mxc_uart_revc_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->ctrl |= MXC_F_UART_REVC_CTRL_RX_FLUSH; while (uart->ctrl & MXC_F_UART_REVC_CTRL_RX_FLUSH) {} @@ -468,10 +426,6 @@ int MXC_UART_RevC_ClearRXFIFO(mxc_uart_revc_regs_t *uart) int MXC_UART_RevC_ClearTXFIFO(mxc_uart_revc_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->ctrl |= MXC_F_UART_REVC_CTRL_TX_FLUSH; while (uart->ctrl & MXC_F_UART_REVC_CTRL_TX_FLUSH) {} @@ -481,10 +435,6 @@ int MXC_UART_RevC_ClearTXFIFO(mxc_uart_revc_regs_t *uart) int MXC_UART_RevC_SetRXThreshold(mxc_uart_revc_regs_t *uart, unsigned int numBytes) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - if (numBytes < 1 || numBytes > MXC_UART_FIFO_DEPTH) { return E_BAD_PARAM; } @@ -507,10 +457,6 @@ unsigned int MXC_UART_RevC_GetFlags(mxc_uart_revc_regs_t *uart) int MXC_UART_RevC_ClearFlags(mxc_uart_revc_regs_t *uart, unsigned int flags) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->int_fl &= ~flags; return E_NO_ERROR; @@ -518,10 +464,6 @@ int MXC_UART_RevC_ClearFlags(mxc_uart_revc_regs_t *uart, unsigned int flags) int MXC_UART_RevC_EnableInt(mxc_uart_revc_regs_t *uart, unsigned int intEn) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->int_en |= intEn; return E_NO_ERROR; @@ -529,10 +471,6 @@ int MXC_UART_RevC_EnableInt(mxc_uart_revc_regs_t *uart, unsigned int intEn) int MXC_UART_RevC_DisableInt(mxc_uart_revc_regs_t *uart, unsigned int intDis) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - uart->int_en &= ~intDis; return E_NO_ERROR; @@ -684,9 +622,7 @@ int MXC_UART_RevC_TransactionDMA(mxc_uart_revc_req_t *req) { int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)(req->uart)); - if (uart_num < 0) { - return E_BAD_PARAM; - } + MXC_ASSERT(uart_num >= 0) if (req->txLen) { if (req->txData == NULL) { @@ -758,10 +694,6 @@ void MXC_UART_RevC_DMACallback(int ch, int error) int MXC_UART_RevC_AsyncCallback(mxc_uart_revc_regs_t *uart, int retVal) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - mxc_uart_revc_req_t *req = (mxc_uart_revc_req_t *)AsyncRequests[MXC_UART_GET_IDX((mxc_uart_regs_t *)uart)]; @@ -774,10 +706,6 @@ int MXC_UART_RevC_AsyncCallback(mxc_uart_revc_regs_t *uart, int retVal) int MXC_UART_RevC_AsyncStop(mxc_uart_revc_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - MXC_UART_DisableInt((mxc_uart_regs_t *)uart, 0xFFFFFFFF); AsyncRequests[MXC_UART_GET_IDX((mxc_uart_regs_t *)uart)] = NULL; @@ -786,10 +714,6 @@ int MXC_UART_RevC_AsyncStop(mxc_uart_revc_regs_t *uart) int MXC_UART_RevC_AbortAsync(mxc_uart_revc_regs_t *uart) { - if (MXC_UART_GET_IDX((mxc_uart_regs_t *)uart) < 0) { - return E_BAD_PARAM; - } - MXC_UART_AsyncCallback((mxc_uart_regs_t *)uart, E_ABORT); MXC_UART_AsyncStop((mxc_uart_regs_t *)uart); @@ -798,15 +722,13 @@ int MXC_UART_RevC_AbortAsync(mxc_uart_revc_regs_t *uart) int MXC_UART_RevC_AsyncHandler(mxc_uart_revc_regs_t *uart) { - int uartNum = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); + int uart_num = MXC_UART_GET_IDX((mxc_uart_regs_t *)uart); int flags, numToWrite, numToRead; mxc_uart_revc_req_t *req; - if (uartNum < 0) { - return E_INVALID; - } + MXC_ASSERT(uart_num >= 0) - req = (mxc_uart_revc_req_t *)AsyncRequests[uartNum]; + req = (mxc_uart_revc_req_t *)AsyncRequests[uart_num]; flags = MXC_UART_GetFlags((mxc_uart_regs_t *)uart);