From 76c5a2604036e1f166a99886b4ac402a65c071ac Mon Sep 17 00:00:00 2001 From: Furkan Akkiz Date: Mon, 16 Dec 2024 15:37:40 +0300 Subject: [PATCH 1/3] Update clock source enablement for ME30 UART - Updated defined clock sources for ME30 UART - Moved clock source enablement from init function to clock source selection function. Signed-off-by: Furkan Akkiz --- .../PeriphDrivers/Include/MAX32657/uart.h | 9 ++-- .../PeriphDrivers/Source/UART/uart_me30.c | 42 ++++++++----------- 2 files changed, 21 insertions(+), 30 deletions(-) diff --git a/Libraries/PeriphDrivers/Include/MAX32657/uart.h b/Libraries/PeriphDrivers/Include/MAX32657/uart.h index 17c77244fb..ae1ed12134 100644 --- a/Libraries/PeriphDrivers/Include/MAX32657/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32657/uart.h @@ -77,14 +77,11 @@ typedef enum { } mxc_uart_flow_t; /** - * @brief Clock settings */ + * @brief Clock settings + */ typedef enum { - /*Only available for UARTS 0-2*/ MXC_UART_APB_CLK = 0, - /*Available for all UARTs*/ - MXC_UART_IBRO_CLK = 2, - /*ERTCO clock can only be used for UART3*/ - MXC_UART_ERTCO_CLK = 4, + MXC_UART_IBRO_CLK = 1, } mxc_uart_clock_t; /** diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me30.c b/Libraries/PeriphDrivers/Source/UART/uart_me30.c index 29e8043529..0a6f7f70dd 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me30.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me30.c @@ -44,28 +44,14 @@ int MXC_UART_AsyncStop(mxc_uart_regs_t *uart) int MXC_UART_Init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clock) { -#ifndef MSDK_NO_GPIO_CLK_INIT int retval; +#ifndef MSDK_NO_GPIO_CLK_INIT retval = MXC_UART_Shutdown(uart); - if (retval) { return retval; } - switch (clock) { - case MXC_UART_ERTCO_CLK: - MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERTCO); - break; - - case MXC_UART_IBRO_CLK: - MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO); - break; - - default: - break; - } - switch (MXC_UART_GET_IDX(uart)) { case 0: MXC_GPIO_Config(&gpio_cfg_uart); @@ -114,10 +100,6 @@ int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo return E_BAD_PARAM; } - if (clock == MXC_UART_ERTCO_CLK) { - return E_BAD_PARAM; - } - // Default OSR uart->osr = 5; @@ -125,12 +107,11 @@ int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo case MXC_UART_APB_CLK: clock_freq = PeripheralClock; break; + case MXC_UART_IBRO_CLK: clock_freq = IBRO_FREQ; break; - case MXC_UART_ERTCO_CLK: - clock_freq = ERTCO_FREQ; - break; + default: return E_BAD_PARAM; } @@ -178,16 +159,29 @@ int MXC_UART_SetFlowCtrl(mxc_uart_regs_t *uart, mxc_uart_flow_t flowCtrl, int rt int MXC_UART_SetClockSource(mxc_uart_regs_t *uart, mxc_uart_clock_t clock) { + uint8_t retval = E_NO_ERROR; + + if (MXC_UART_GET_IDX(uart) != 0) { + return E_BAD_PARAM; + } + switch (clock) { case MXC_UART_APB_CLK: - return MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, 0); + MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, 0); + break; case MXC_UART_IBRO_CLK: - return MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, 1); +#ifndef MSDK_NO_GPIO_CLK_INIT + retval = MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO); +#endif // MSDK_NO_GPIO_CLK_INIT + MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, 1); + break; default: return E_BAD_PARAM; } + + return retval; } int MXC_UART_GetActive(mxc_uart_regs_t *uart) From 35a5617c0259492ca923753b8859820dc36445c7 Mon Sep 17 00:00:00 2001 From: Furkan Akkiz Date: Tue, 17 Dec 2024 15:30:13 +0300 Subject: [PATCH 2/3] Update ME18 UART SetFrequency function This commit removes clock source selection feature from MXC_UART_SetFrequency function because there is MXC_UART_SetClockSource function for this operation. Signed-off-by: Furkan Akkiz --- .../PeriphDrivers/Source/UART/uart_me18.c | 80 +++++++------------ 1 file changed, 29 insertions(+), 51 deletions(-) diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me18.c b/Libraries/PeriphDrivers/Source/UART/uart_me18.c index 2c0c678578..c1bab8951b 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me18.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me18.c @@ -132,19 +132,27 @@ int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo return E_BAD_PARAM; } - // check if the uart is LPUART - if (uart == MXC_UART3) { - // OSR default value - uart->osr = 5; + // OSR default value + uart->osr = 5; - switch (clock) { - case MXC_UART_IBRO_CLK: - clkdiv = ((IBRO_FREQ) / baud); - mod = ((IBRO_FREQ) % baud); - break; + switch (clock) { + case MXC_UART_APB_CLK: + clkdiv = PeripheralClock / baud; + mod = PeripheralClock % baud; + break; - case MXC_UART_ERTCO_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_EXTERNAL_CLOCK; + case MXC_UART_ERFO_CLK: + clkdiv = ERFO_FREQ / baud; + mod = ERFO_FREQ % baud; + break; + + case MXC_UART_IBRO_CLK: + clkdiv = ((IBRO_FREQ) / baud); + mod = ((IBRO_FREQ) % baud); + break; + + case MXC_UART_ERTCO_CLK: + if (uart == MXC_UART3) { uart->ctrl |= MXC_F_UART_CTRL_FDM; if (baud == 9600) { clkdiv = 7; @@ -159,51 +167,21 @@ int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo } else { uart->osr = 1; } - break; - - default: - return E_BAD_PARAM; - } - - if (!clkdiv || mod > (baud / 2)) { - clkdiv++; - } - uart->clkdiv = clkdiv; - - freq = MXC_UART_GetFrequency(uart); - } else { - uart->osr = 5; - - switch (clock) { - case MXC_UART_APB_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_PERIPHERAL_CLOCK; - clkdiv = PeripheralClock / baud; - mod = PeripheralClock % baud; - break; - - case MXC_UART_ERFO_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_EXTERNAL_CLOCK; - clkdiv = ERFO_FREQ / baud; - mod = ERFO_FREQ % baud; - break; - - case MXC_UART_IBRO_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_CLK2; - clkdiv = IBRO_FREQ / baud; - mod = IBRO_FREQ % baud; - break; - - default: + } else { return E_BAD_PARAM; } + break; - if (!clkdiv || mod > (baud / 2)) { - clkdiv++; - } - uart->clkdiv = clkdiv; + default: + return E_BAD_PARAM; + } - freq = MXC_UART_GetFrequency(uart); + if (!clkdiv || mod > (baud / 2)) { + clkdiv++; } + uart->clkdiv = clkdiv; + + freq = MXC_UART_GetFrequency(uart); if (freq > 0) { // Enable baud clock and wait for it to become ready. From aaafe89b78e663c8f300ee969a03f8b91787af82 Mon Sep 17 00:00:00 2001 From: Furkan Akkiz Date: Tue, 17 Dec 2024 15:43:27 +0300 Subject: [PATCH 3/3] Add wrapper function of MXC_UART_SetClockSource This commit adds wrapper function of MXC_UART_SetClockSource function. Wrapper function converts Zephyr clock source values to mxc_uart_clock_t type. Signed-off-by: Furkan Akkiz --- .../zephyr/MAX/Include/wrap_max32_uart.h | 65 ++++++++++++++++++- 1 file changed, 64 insertions(+), 1 deletion(-) diff --git a/Libraries/zephyr/MAX/Include/wrap_max32_uart.h b/Libraries/zephyr/MAX/Include/wrap_max32_uart.h index 08b3abf8ac..a0035b3976 100644 --- a/Libraries/zephyr/MAX/Include/wrap_max32_uart.h +++ b/Libraries/zephyr/MAX/Include/wrap_max32_uart.h @@ -84,6 +84,16 @@ static inline int Wrap_MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int return MXC_UART_SetFrequency(uart, baud); } +static inline int Wrap_MXC_UART_SetClockSource(mxc_uart_regs_t *uart, int clock_source) +{ + (void)uart; + if (clock_source == ADI_MAX32_PRPH_CLK_SRC_PCLK) { + return E_NO_ERROR; + } else { + return E_BAD_PARAM; + } +} + static inline void Wrap_MXC_UART_SetTxDMALevel(mxc_uart_regs_t *uart, uint8_t bytes) { uart->dma |= ((bytes & 0x1F) << MXC_F_UART_DMA_TXDMA_LEVEL_POS); @@ -180,10 +190,63 @@ static inline int Wrap_MXC_UART_Init(mxc_uart_regs_t *uart) return ret; } +static inline mxc_uart_clock_t wrap_get_clock_source_instance(int clock_source) +{ + mxc_uart_clock_t clk_src; + + switch (clock_source) { + case 0: // ADI_MAX32_PRPH_CLK_SRC_PCLK + clk_src = MXC_UART_APB_CLK; + break; +#if defined(CONFIG_SOC_MAX32662) || defined(CONFIG_SOC_MAX32670) || \ + defined(CONFIG_SOC_MAX32672) || defined(CONFIG_SOC_MAX32675) + case 1: // ADI_MAX32_PRPH_CLK_SRC_EXTCLK + clk_src = MXC_UART_EXT_CLK; + break; +#endif + case 2: // ADI_MAX32_PRPH_CLK_SRC_IBRO + clk_src = MXC_UART_IBRO_CLK; + break; +#if defined(CONFIG_SOC_MAX32662) || defined(CONFIG_SOC_MAX32670) || \ + defined(CONFIG_SOC_MAX32675) || defined(CONFIG_SOC_MAX32690) + case 3: // ADI_MAX32_PRPH_CLK_SRC_ERFO + clk_src = MXC_UART_ERFO_CLK; + break; +#endif +#if defined(CONFIG_SOC_MAX32655) || defined(CONFIG_SOC_MAX32670) || \ + defined(CONFIG_SOC_MAX32672) || defined(CONFIG_SOC_MAX32690) || defined(CONFIG_SOC_MAX78002) + case 4: // ADI_MAX32_PRPH_CLK_SRC_ERTCO + clk_src = MXC_UART_ERTCO_CLK; + break; +#endif +#if defined(CONFIG_SOC_MAX32670) || defined(CONFIG_SOC_MAX32672) + case 5: // ADI_MAX32_PRPH_CLK_SRC_INRO + clk_src = MXC_UART_INRO_CLK; + break; +#endif + default: + return -1; + } + + return clk_src; +} static inline int Wrap_MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, int clock_source) { - return MXC_UART_SetFrequency(uart, baud, (mxc_uart_clock_t)clock_source); + mxc_uart_clock_t clk_src; + + clk_src = wrap_get_clock_source_instance(clock_source); + + return MXC_UART_SetFrequency(uart, baud, clk_src); +} + +static inline int Wrap_MXC_UART_SetClockSource(mxc_uart_regs_t *uart, int clock_source) +{ + mxc_uart_clock_t clk_src; + + clk_src = wrap_get_clock_source_instance(clock_source); + + return MXC_UART_SetClockSource(uart, clk_src); } static inline void Wrap_MXC_UART_SetTxDMALevel(mxc_uart_regs_t *uart, uint8_t bytes)