diff --git a/.github/workflows/Build_Examples.yml b/.github/workflows/Build_Examples.yml index 364ffc58ffd..d8a463f390a 100644 --- a/.github/workflows/Build_Examples.yml +++ b/.github/workflows/Build_Examples.yml @@ -49,7 +49,7 @@ jobs: steps: # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 with: # Update the submodules below, doing so here will convert ssh to https submodules: false diff --git a/Examples/MAX32665/Dual_Core/.cproject b/Examples/MAX32665/Dual_Core/.cproject new file mode 100644 index 00000000000..eeb2335a635 --- /dev/null +++ b/Examples/MAX32665/Dual_Core/.cproject @@ -0,0 +1,81 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Examples/MAX32665/Dual_Core/.project b/Examples/MAX32665/Dual_Core/.project new file mode 100644 index 00000000000..11a31fa286b --- /dev/null +++ b/Examples/MAX32665/Dual_Core/.project @@ -0,0 +1,26 @@ + + + Dual_Core + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/Examples/MAX32665/Dual_Core/.settings/language.settings.xml b/Examples/MAX32665/Dual_Core/.settings/language.settings.xml new file mode 100644 index 00000000000..d32717b6f37 --- /dev/null +++ b/Examples/MAX32665/Dual_Core/.settings/language.settings.xml @@ -0,0 +1,15 @@ + + + + + + + + + + + + + + + diff --git a/Examples/MAX32665/Dual_Core/.settings/org.eclipse.cdt.codan.core.prefs b/Examples/MAX32665/Dual_Core/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 00000000000..59c0b37ba75 --- /dev/null +++ b/Examples/MAX32665/Dual_Core/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,93 @@ 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a/Examples/MAX32665/Dual_Core/.settings/org.eclipse.cdt.core.prefs b/Examples/MAX32665/Dual_Core/.settings/org.eclipse.cdt.core.prefs new file mode 100644 index 00000000000..0f79215801d --- /dev/null +++ b/Examples/MAX32665/Dual_Core/.settings/org.eclipse.cdt.core.prefs @@ -0,0 +1,15 @@ +eclipse.preferences.version=1 +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/BOARD/delimiter=; +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/BOARD/operation=append +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/BOARD/value=EvKit_V1 +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/GCC_PREFIX/delimiter=; +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/GCC_PREFIX/operation=replace +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/GCC_PREFIX/value=arm-none-eabi- +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/PROJECT/delimiter=; +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/PROJECT/operation=append +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/PROJECT/value=Dual_Core +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/TARGET/delimiter=; +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/TARGET/operation=append +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/TARGET/value=MAX32665 +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/append=true +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/appendContributed=true diff --git a/Examples/MAX32665/Dual_Core/.vscode/README.md b/Examples/MAX32665/Dual_Core/.vscode/README.md new file mode 100644 index 00000000000..5b355bd51c9 --- /dev/null +++ b/Examples/MAX32665/Dual_Core/.vscode/README.md @@ -0,0 +1,47 @@ +# VSCode-Maxim + +_(If you're viewing this document from within Visual Studio Code you can press `CTRL+SHIFT+V` to open a Markdown preview window.)_ + +## Quick Links + +* [MSDK User Guide](https://analogdevicesinc.github.io/msdk/USERGUIDE/) +* [VSCode-Maxim Github](https://github.com/analogdevicesinc/VSCode-Maxim) + +## Introduction + +VSCode-Maxim is a set of [Visual Studio Code](https://code.visualstudio.com/) project configurations and utilities for enabling embedded development for [Analog Device's MSDK](https://github.com/analogdevicesinc/msdk) and the [MAX32xxx/MAX78xxx microcontrollers](https://www.analog.com/en/product-category/microcontrollers.html). + +The following features are supported: + +* Code editing with intellisense down to the register level +* Code compilation with the ability to easily re-target a project for different microcontrollers and boards +* Flashing programs +* GUI and command-line debugging + +## Dependencies + +* [Visual Studio Code](https://code.visualstudio.com/) + * [C/C++ VSCode Extension](https://marketplace.visualstudio.com/items?itemName=ms-vscode.cpptools) + * [Cortex-Debug Extension](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug) +* [Analog Devices MSDK](https://analogdevicesinc.github.io/msdk/) + +## Installation + +Install the MSDK, then set `"MAXIM_PATH"` in your _user_ VS Code settings. + +See [Getting Started with Visual Studio Code](https://analogdevicesinc.github.io/msdk/USERGUIDE/#getting-started-with-visual-studio-code) in the MSDK User Guide for detailed instructions. + +## Usage + +See the [MSDK User Guide](https://analogdevicesinc.github.io/msdk/USERGUIDE/#visual-studio-code) for detailed usage info. + +## Issue Tracker + +Bug reports, feature requests, and contributions are welcome via the [issues](https://github.com/analogdevicesinc/VSCode-Maxim/issues) tracker on Github. + +New issues should contain _at minimum_ the following information: + +* Visual Studio Code version #s (see `Help -> About`) +* C/C++ Extension version # +* Target microcontroller and evaluation platform +* The projects `.vscode` folder and `Makefile` (where applicable). Standard compression formats such as `.zip`, `.rar`, `.tar.gz`, etc. are all acceptable. diff --git a/Examples/MAX32665/Dual_Core/.vscode/c_cpp_properties.json b/Examples/MAX32665/Dual_Core/.vscode/c_cpp_properties.json new file mode 100644 index 00000000000..dfbed47b581 --- /dev/null +++ b/Examples/MAX32665/Dual_Core/.vscode/c_cpp_properties.json @@ -0,0 +1,53 @@ +{ + "configurations": [ + { + "name": "Win32", + "includePath": [ + "${default}" + ], + "defines": [ + "${default}" + ], + "intelliSenseMode": "gcc-arm", + "compilerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gcc.exe", + "browse": { + "path": [ + "${default}" + ] + } + }, + { + "name": "Linux", + "includePath": [ + "${default}" + ], + "defines": [ + "${default}" + ], + "intelliSenseMode": "gcc-arm", + "compilerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gcc", + "browse": { + "path": [ + "${default}" + ] + } + }, + { + "name": "Mac", + "includePath": [ + "${default}" + ], + "defines": [ + "${default}" + ], + "intelliSenseMode": "gcc-arm", + "compilerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gcc", + "browse": { + "path": [ + "${default}" + ] + } + } + ], + "version": 4 +} \ No newline at end of file diff --git a/Examples/MAX32665/Dual_Core/.vscode/flash.gdb b/Examples/MAX32665/Dual_Core/.vscode/flash.gdb new file mode 100644 index 00000000000..8f22801a47d --- /dev/null +++ b/Examples/MAX32665/Dual_Core/.vscode/flash.gdb @@ -0,0 +1,17 @@ +define flash_m4 + set architecture armv7e-m + set remotetimeout 10 + target remote | openocd -c "gdb_port pipe;log_output flash.log" -s $arg0/scripts -f interface/$arg1 -f target/$arg2 -c "init; reset halt" + load + compare-sections + monitor reset halt +end + +define flash_m4_run + set architecture armv7e-m + set remotetimeout 10 + target remote | openocd -c "gdb_port pipe;log_output flash.log" -s $arg0/scripts -f interface/$arg1 -f target/$arg2 -c "init; reset halt" + load + compare-sections + monitor resume +end diff --git a/Examples/MAX32665/Dual_Core/.vscode/launch.json b/Examples/MAX32665/Dual_Core/.vscode/launch.json new file mode 100644 index 00000000000..01fe5199048 --- /dev/null +++ b/Examples/MAX32665/Dual_Core/.vscode/launch.json @@ -0,0 +1,133 @@ +{ + "configurations": [ + { + "name": "Debug Arm (Cortex-debug)", + "cwd":"${workspaceRoot}", + "executable": "${workspaceFolder}/build/${config:program_file}", + "loadFiles": ["${workspaceFolder}/build/${config:program_file}"], + "symbolFiles": [{ + "file": "${workspaceFolder}/build/${config:symbol_file}" + }], + "request": "launch", + "type": "cortex-debug", + "servertype": "openocd", + "linux": { + "gdbPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb", + "serverpath": "${config:OCD_path}/openocd", + }, + "windows": { + "gdbPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb.exe", + "serverpath": "${config:OCD_path}/openocd.exe", + }, + "osx": { + "gdbPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb", + "serverpath": "${config:OCD_path}/openocd", + }, + "searchDir": ["${config:OCD_path}/scripts"], + "configFiles": ["interface/${config:M4_OCD_interface_file}", "target/${config:M4_OCD_target_file}"], + "interface": "swd", + "runToEntryPoint": "main", + "svdFile": "${config:MAXIM_PATH}/Libraries/CMSIS/Device/Maxim/${config:target}/Include/${config:target}.svd" + }, + { + "name": "GDB (Arm M4)", + "type": "cppdbg", + "request": "launch", + "program": "${workspaceFolder}/build/${config:program_file}", + "args": [], + "stopAtEntry": true, + "cwd": "${workspaceFolder}", + "environment": [], + "externalConsole": false, + "MIMode": "gdb", + "linux": { + "miDebuggerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb", + "debugServerPath": "${config:OCD_path}/openocd", + }, + "windows": { + "miDebuggerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb.exe", + "debugServerPath": "${config:OCD_path}/openocd.exe", + }, + "osx": { + "miDebuggerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb", + "debugServerPath": "${config:OCD_path}/bin/openocd", + }, + "logging": { + "exceptions": true, + "trace": false, + "traceResponse": false, + "engineLogging": false + }, + "miDebuggerServerAddress": "localhost:3333", + "debugServerArgs": "-s ${config:OCD_path}/scripts -f interface/${config:M4_OCD_interface_file} -f target/${config:M4_OCD_target_file} -c \"init; reset halt\"", + "serverStarted": "Info : Listening on port 3333 for gdb connections", + "filterStderr": true, + "targetArchitecture": "arm", + "customLaunchSetupCommands": [ + {"text":"-list-features"} + ], + "setupCommands": [ + { "text":"set logging overwrite on"}, + { "text":"set logging file debug-arm.log"}, + { "text":"set logging on"}, + { "text":"cd ${workspaceFolder}" }, + { "text":"exec-file build/${config:program_file}" }, + { "text":"symbol-file build/${config:symbol_file}" }, + { "text":"target remote localhost:3333" }, + { "text":"monitor reset halt" }, + { "text":"set $pc=Reset_Handler"}, + { "text":"b main" } + ] + }, + { + "name": "GDB (RISC-V)", + "type": "cppdbg", + "request": "launch", + "program": "${workspaceFolder}/buildrv/${config:program_file}", + "args": [], + "stopAtEntry": false, + "cwd": "${workspaceFolder}", + "environment": [], + "externalConsole": false, + "MIMode": "gdb", + "linux": { + "miDebuggerPath": "${config:xPack_GCC_path}/bin/riscv-none-elf-gdb", + "debugServerPath": "${config:OCD_path}/openocd", + }, + "windows": { + "miDebuggerPath": "${config:xPack_GCC_path}/bin/riscv-none-elf-gdb.exe", + "debugServerPath": "${config:OCD_path}/openocd.exe", + }, + "osx": { + "miDebuggerPath": "${config:xPack_GCC_path}/bin/riscv-none-elf-gdb", + "debugServerPath": "${config:OCD_path}/bin/openocd", + }, + "logging": { + "exceptions": true, + "trace": false, + "traceResponse": false, + "engineLogging": false + }, + "miDebuggerServerAddress": "localhost:3334", + "debugServerArgs": "-c \"gdb_port 3334\" -s ${config:OCD_path}/scripts -f interface/${config:RV_OCD_interface_file} -f target/${config:RV_OCD_target_file}", + "serverStarted": "Info : Listening on port 3334 for gdb connections", + "filterStderr": true, + "customLaunchSetupCommands": [ + {"text":"-list-features"} + ], + "targetArchitecture": "arm", + "setupCommands": [ + { "text":"set logging overwrite on"}, + { "text":"set logging file debug-riscv.log"}, + { "text":"set logging on"}, + { "text":"cd ${workspaceFolder}" }, + { "text": "set architecture riscv:rv32", "ignoreFailures": false }, + { "text":"exec-file build/${config:program_file}", "ignoreFailures": false }, + { "text":"symbol-file buildrv/${config:symbol_file}", "ignoreFailures": false }, + { "text":"target remote localhost:3334" }, + { "text":"b main" }, + { "text": "set $pc=Reset_Handler","ignoreFailures": false } + ] + } + ] +} diff --git a/Examples/MAX32665/Dual_Core/.vscode/settings.json b/Examples/MAX32665/Dual_Core/.vscode/settings.json new file mode 100644 index 00000000000..75cdcb627cf --- /dev/null +++ b/Examples/MAX32665/Dual_Core/.vscode/settings.json @@ -0,0 +1,79 @@ +{ + "terminal.integrated.env.windows": { + "Path":"${config:OCD_path};${config:ARM_GCC_path}/bin;${config:xPack_GCC_path}/bin;${config:MSYS_path}/usr/bin;${config:Make_path};${env:PATH}", + "MAXIM_PATH":"${config:MAXIM_PATH}" + }, + "terminal.integrated.defaultProfile.windows": "Command Prompt", + + "terminal.integrated.env.linux": { + "PATH":"${config:OCD_path}:${config:ARM_GCC_path}/bin:${config:xPack_GCC_path}/bin:${config:Make_path}:${env:PATH}", + "MAXIM_PATH":"${config:MAXIM_PATH}" + }, + "terminal.integrated.env.osx": { + "PATH":"${config:OCD_path}/bin:${config:ARM_GCC_path}/bin:${config:xPack_GCC_path}/bin:${config:Make_path}:${env:PATH}", + "MAXIM_PATH":"${config:MAXIM_PATH}" + }, + + "target":"MAX32665", + "board":"EvKit_V1", + + "project_name":"${workspaceFolderBasename}", + + "program_file":"${config:project_name}.elf", + "symbol_file":"${config:program_file}", + + "M4_OCD_interface_file":"cmsis-dap.cfg", + "M4_OCD_target_file":"${config:target}.cfg", + "RV_OCD_interface_file":"ftdi/olimex-arm-usb-ocd-h.cfg", + "RV_OCD_target_file":"${config:target}_riscv.cfg", + + "v_Arm_GCC":"10.3", + "v_xPack_GCC":"12.2.0-3.1", + + "OCD_path":"${config:MAXIM_PATH}/Tools/OpenOCD", + "ARM_GCC_path":"${config:MAXIM_PATH}/Tools/GNUTools/${config:v_Arm_GCC}", + "xPack_GCC_path":"${config:MAXIM_PATH}/Tools/xPack/riscv-none-elf-gcc/${config:v_xPack_GCC}", + "Make_path":"${config:MAXIM_PATH}/Tools/GNUTools/Make", + "MSYS_path":"${config:MAXIM_PATH}/Tools/MSYS2", + + "C_Cpp.default.includePath": [ + "${workspaceFolder}", + "${workspaceFolder}/**", + "${config:MAXIM_PATH}/Libraries/Boards/${config:target}/Include", + "${config:MAXIM_PATH}/Libraries/Boards/${config:target}/${config:board}/Include", + "${config:MAXIM_PATH}/Libraries/CMSIS/Device/Maxim/${config:target}/Include", + "${config:MAXIM_PATH}/Libraries/CMSIS/Include", + "${config:ARM_GCC_path}/arm-none-eabi/include", + "${config:ARM_GCC_path}/lib/gcc/arm-none-eabi/${config:v_Arm_GCC}/include", + "${config:MAXIM_PATH}/Libraries/PeriphDrivers/Include/${config:target}", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Camera", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Display", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Display/fonts", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/ExtMemory", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/LED", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/PMIC", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/PushButton", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Touchscreen" + ], + "C_Cpp.default.browse.path": [ + "${workspaceFolder}", + "${config:MAXIM_PATH}/Libraries/Boards/${config:target}/Source", + "${config:MAXIM_PATH}/Libraries/Boards/${config:target}/${config:board}/Source", + "${config:MAXIM_PATH}/Libraries/PeriphDrivers/Source", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Camera", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Display", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Display/fonts", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/LED", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/PMIC", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/PushButton", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Touchscreen", + "${config:MAXIM_PATH}/Libraries/MiscDrivers" + ], + "C_Cpp.default.defines": [ + + ], + "C_Cpp.default.forcedInclude": [ + "${workspaceFolder}/build/project_defines.h" + ] +} + diff --git a/Examples/MAX32665/Dual_Core/.vscode/tasks.json b/Examples/MAX32665/Dual_Core/.vscode/tasks.json new file mode 100644 index 00000000000..e95445e2b3e --- /dev/null +++ b/Examples/MAX32665/Dual_Core/.vscode/tasks.json @@ -0,0 +1,115 @@ +{ + "version": "2.0.0", + "tasks": [ + { + "label": "build", + "type": "shell", + "command": "make -r -j 8 --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}", + "osx":{ + "command": "source ~/.zshrc && make -r -j 8 --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}" + }, + "group": "build", + "problemMatcher": [] + }, + { + "label": "clean", + "type": "shell", + "command": "make -j 8 clean --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}", + "osx":{ + "command": "source ~/.zshrc && make -j 8 clean --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}" + }, + "group": "build", + "problemMatcher": [] + }, + { + "label": "clean-periph", + "type": "shell", + "command": "make -j 8 distclean --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}", + "osx":{ + "command": "source ~/.zshrc && make -j 8 distclean --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}" + }, + "group": "build", + "problemMatcher": [] + }, + { + "label": "flash", + "type": "shell", + "command": "arm-none-eabi-gdb", + "args": [ + "--cd=\"${workspaceFolder}\"", + "--se=\"build/${config:program_file}\"", + "--symbols=build/${config:symbol_file}", + "-x=\"${workspaceFolder}/.vscode/flash.gdb\"", + "--ex=\"flash_m4 ${config:OCD_path} ${config:M4_OCD_interface_file} ${config:M4_OCD_target_file}\"", + "--batch" + ], + "group": "build", + "problemMatcher": [], + "dependsOn":["build"] + }, + { + "label": "flash & run", + "type": "shell", + "command": "arm-none-eabi-gdb", + "args": [ + "--cd=\"${workspaceFolder}\"", + "--se=\"build/${config:program_file}\"", + "--symbols=build/${config:symbol_file}", + "-x=\"${workspaceFolder}/.vscode/flash.gdb\"", + "--ex=\"flash_m4_run ${config:OCD_path} ${config:M4_OCD_interface_file} ${config:M4_OCD_target_file}\"", + "--batch" + ], + "group": "build", + "problemMatcher": [], + "dependsOn":["build"] + }, + { + "label": "erase flash", + "type": "shell", + "command": "openocd", + "args": [ + "-s", "${config:OCD_path}/scripts", + "-f", "interface/${config:M4_OCD_interface_file}", + "-f", "target/${config:M4_OCD_target_file}", + "-c", "\"init; reset halt; max32xxx mass_erase 0;\"", + "-c", "exit" + ], + "group":"build", + "problemMatcher": [], + "dependsOn":[] + }, + { + "label": "openocd (m4)", + "type": "shell", + "command": "openocd", + "args": [ + "-s", + "${config:OCD_path}/scripts", + "-f", + "interface/${config:M4_OCD_interface_file}", + "-f", + "target/${config:M4_OCD_target_file}", + "-c", + "\"init; reset halt\"" + ], + "problemMatcher": [], + "dependsOn":[] + }, + { + "label": "gdb (m4)", + "type": "shell", + "command": "arm-none-eabi-gdb", + "args": [ + "--ex=\"cd ${workspaceFolder}\"", + "--se=\"build/${config:program_file}\"", + "--symbols=build/${config:symbol_file}", + "--ex=\"target remote localhost:3333\"", + "--ex=\"monitor reset halt\"", + "--ex=\"b main\"", + "--ex=\"c\"" + ], + "problemMatcher": [], + "dependsOn":[] + }, + ] +} \ No newline at end of file diff --git a/Examples/MAX32665/Dual_Core/Core0/main.c b/Examples/MAX32665/Dual_Core/Core0/main.c new file mode 100644 index 00000000000..1c635a5539c --- /dev/null +++ b/Examples/MAX32665/Dual_Core/Core0/main.c @@ -0,0 +1,88 @@ +/****************************************************************************** + * + * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by + * Analog Devices, Inc.), + * Copyright (C) 2023-2024 Analog Devices, Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +/** + * @file main.c + * @brief The main application for Core 0. + * @details This example is similar to the "Hello_World" example but the console + * UART and LEDs are split between Core 0 and Core 1. + */ + +/***** Includes *****/ +#include +#include +#include +#include "mxc_device.h" +#include "mxc_delay.h" +#include "led.h" +#include "board.h" +#include "sema.h" +#include "tmr.h" + +/***** Definitions *****/ +int count0 = 0; +int count1 = 0; + +/***** Globals *****/ + +/***** Functions *****/ + +// ***************************************************************************** +int main(void) +{ + printf("\n\n\n***** MAX32665 Dual Core Example *****\n"); + printf("Similar to the 'Hello World' example but split the\n"); + printf("lights and console uart between core 0 and core 1.\n"); + printf("Halting this example with a debugger will not stop core 1.\n\n"); + + MXC_SEMA_Init(); + + MXC_SEMA_GetSema(0); + + Start_Core1(); + + MXC_SEMA_FreeSema(1); + + mxc_tmr_cfg_t tmr_cfg; + tmr_cfg.pres = MXC_TMR_PRES_1; + tmr_cfg.mode = MXC_TMR_MODE_CONTINUOUS; + tmr_cfg.cmp_cnt = PeripheralClock / 2; + tmr_cfg.pol = 0; + MXC_TMR_Init(MXC_TMR2, &tmr_cfg); + + MXC_TMR_Start(MXC_TMR2); + + while (1) { + // Wait for Core 1 to update count and release the semaphore + while (MXC_SEMA_CheckSema(0) == E_BUSY) {} + MXC_SEMA_GetSema(0); + + printf("Core 0: Pong: %d\n", count0); + + LED_On(0); + LED_Off(1); + + MXC_TMR_Delay(MXC_TMR2, MXC_DELAY_MSEC(500)); + + // Update the count for Core 1 and release the semaphore + count1++; + MXC_SEMA_FreeSema(1); + } +} diff --git a/Examples/MAX32665/Dual_Core/Core1/main_core1.c b/Examples/MAX32665/Dual_Core/Core1/main_core1.c new file mode 100644 index 00000000000..10032e7154d --- /dev/null +++ b/Examples/MAX32665/Dual_Core/Core1/main_core1.c @@ -0,0 +1,66 @@ +/****************************************************************************** + * + * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by + * Analog Devices, Inc.), + * Copyright (C) 2023-2024 Analog Devices, Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +/** + * @file main_core1.c + * @brief The main application for Core 1. + * @details Core 1 synchronizes with Core 0. + */ + +/***** Includes *****/ +#include +#include +#include "mxc_device.h" +#include "mxc_delay.h" +#include "led.h" +#include "board.h" +#include "sema.h" +#include "tmr.h" + +/***** Definitions *****/ +extern int count0; +extern int count1; + +/***** Globals *****/ + +/***** Functions *****/ + +// ***************************************************************************** +// main_core1 is Core 1's official main function that is called at program startup. +int main_core1(void) +{ + printf("Core 1: enter while loop.\n"); + while (1) { + // Wait for Core 0 to release the semaphore + while (MXC_SEMA_GetSema(1) == E_BUSY) {} + + // Print the updated value from Core 0 + printf("Core 1: Ping: %d\n", count1); + + LED_Off(0); + LED_On(1); + + MXC_TMR_Delay(MXC_TMR1, MXC_DELAY_MSEC(500)); + + // Update the count for Core 0 and release the semaphore + count0++; + MXC_SEMA_FreeSema(0); + } +} diff --git a/Examples/MAX32665/Dual_Core/Dual_Core.launch b/Examples/MAX32665/Dual_Core/Dual_Core.launch new file mode 100644 index 00000000000..2259acd354c --- /dev/null +++ b/Examples/MAX32665/Dual_Core/Dual_Core.launch @@ -0,0 +1,62 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Examples/MAX32665/Dual_Core/Makefile b/Examples/MAX32665/Dual_Core/Makefile new file mode 100644 index 00000000000..2cb083fff50 --- /dev/null +++ b/Examples/MAX32665/Dual_Core/Makefile @@ -0,0 +1,382 @@ +############################################################################### + # + # Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by + # Analog Devices, Inc.), + # Copyright (C) 2023-2024 Analog Devices, Inc. + # + # Licensed under the Apache License, Version 2.0 (the "License"); + # you may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # http://www.apache.org/licenses/LICENSE-2.0 + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + ############################################################################## + +# ** Readme! ** +# Don't edit this file! This is the core Makefile for a MaximSDK +# project. The available configuration options can be overridden +# in "project.mk", on the command-line, or with system environment +# variables. + +# See https://analogdevicesinc.github.io/msdk/USERGUIDE/#build-system +# for more detailed instructions on how to use this system. + +# The detailed instructions mentioned above are easier to read than +# this file, but the comments found in this file also outline the +# available configuration variables. This file is organized into +# sub-sections, some of which expose config variables. + + +# ******************************************************************************* +# Set the target microcontroller and board to compile for. + +# Every TARGET microcontroller has some Board Support Packages (BSPs) that are +# available for it under the MaximSDK/Libraries/Boards/TARGET folder. The BSP +# that gets selected is MaximSDK/Libraries/Boards/TARGET/BOARD. + +# Configuration Variables: +# - TARGET : Override the default target microcontroller. Ex: TARGET=MAX78000 +# - BOARD : Override the default BSP (case sensitive). Ex: BOARD=EvKit_V1, BOARD=FTHR_RevA + + +ifeq "$(TARGET)" "" +# Default target microcontroller +TARGET := MAX32665 +TARGET_UC := MAX32665 +TARGET_LC := max32665 +else +# "TARGET" has been overridden in the environment or on the command-line. +# We need to calculate an upper and lowercase version of the part number, +# because paths on Linux and MacOS are case-sensitive. +TARGET_UC := $(subst m,M,$(subst a,A,$(subst x,X,$(TARGET)))) +TARGET_LC := $(subst M,m,$(subst A,a,$(subst X,x,$(TARGET)))) +endif + +# Default board. +BOARD ?= EvKit_V1 + +# ******************************************************************************* +# Locate the MaximSDK + +# This Makefile needs to know where to find the MaximSDK, and the MAXIM_PATH variable +# should point to the root directory of the MaximSDK installation. Setting this manually +# is usually only required if you're working on the command-line. + +# If MAXIM_PATH is not specified, we assume the project still lives inside of the MaximSDK +# and move up from this project's original location. + +# Configuration Variables: +# - MAXIM_PATH : Tell this Makefile where to find the MaximSDK. Ex: MAXIM_PATH=C:/MaximSDK + + +ifneq "$(MAXIM_PATH)" "" +# Sanitize MAXIM_PATH for backslashes +MAXIM_PATH := $(subst \,/,$(MAXIM_PATH)) +# Locate some other useful paths... +LIBS_DIR := $(abspath $(MAXIM_PATH)/Libraries) +CMSIS_ROOT := $(LIBS_DIR)/CMSIS +endif + +# ******************************************************************************* +# Include project Makefile. We do this after formulating TARGET, BOARD, and MAXIM_PATH +# in case project.mk needs to reference those values. However, we also include +# this as early as possible in the Makefile so that it can append to or override +# the variables below. + + +PROJECTMK ?= $(abspath ./project.mk) +include $(PROJECTMK) +$(info Loaded project.mk) +# PROJECTMK is also used by implicit rules and other libraries to add project.mk as a watch file + +# ******************************************************************************* +# Final path sanitization and re-calculation. No options here. + +ifeq "$(MAXIM_PATH)" "" +# MAXIM_PATH is still not defined... +DEPTH := ../../../ +MAXIM_PATH := $(abspath $(DEPTH)) +$(warning Warning: MAXIM_PATH is not set! Set MAXIM_PATH in your environment or in project.mk to clear this warning.) +$(warning Warning: Attempting to use $(MAXIM_PATH) calculated from relative path) +else +# Sanitize MAXIM_PATH for backslashes +MAXIM_PATH := $(subst \,/,$(MAXIM_PATH)) +endif + +# Final recalculation of LIBS_DIR/CMSIS_ROOT +LIBS_DIR := $(abspath $(MAXIM_PATH)/Libraries) +CMSIS_ROOT := $(LIBS_DIR)/CMSIS + +# One final UC/LC check in case user set TARGET in project.mk +TARGET_UC := $(subst m,M,$(subst a,A,$(subst x,X,$(TARGET)))) +TARGET_LC := $(subst M,m,$(subst A,a,$(subst X,x,$(TARGET)))) + +export TARGET +export TARGET_UC +export TARGET_LC +export CMSIS_ROOT +# TODO: Remove dependency on exports for these variables. + +# ******************************************************************************* +# Set up search paths, and auto-detect all source code on those paths. + +# The following paths are searched by default, where "./" is the project directory. +# ./ +# |- *.h +# |- *.c +# |-include (optional) +# |- *.h +# |-src (optional) +# |- *.c + +# Configuration Variables: +# - VPATH : Tell this Makefile to search additional locations for source (.c) files. +# You should use the "+=" operator with this option. +# Ex: VPATH += your/new/path +# - IPATH : Tell this Makefile to search additional locations for header (.h) files. +# You should use the "+=" operator with this option. +# Ex: VPATH += your/new/path +# - SRCS : Tell this Makefile to explicitly add a source (.c) file to the build. +# This is really only useful if you want to add a source file that isn't +# on any VPATH, in which case you can add the full path to the file here. +# You should use the "+=" operator with this option. +# Ex: SRCS += your/specific/source/file.c +# - AUTOSEARCH : Set whether this Makefile should automatically detect .c files on +# VPATH and add them to the build. This is enabled by default. Set +# to 0 to disable. If autosearch is disabled, source files must be +# manually added to SRCS. +# Ex: AUTOSEARCH = 0 + + +# Where to find source files for this project. +VPATH += . +VPATH += src +VPATH := $(VPATH) + +# Where to find header files for this project +IPATH += . +IPATH += include +IPATH := $(IPATH) + +AUTOSEARCH ?= 1 +ifeq ($(AUTOSEARCH), 1) +# Auto-detect all C/C++ source files on VPATH +SRCS += $(wildcard $(addsuffix /*.c, $(VPATH))) +SRCS += $(wildcard $(addsuffix /*.cpp, $(VPATH))) +endif + +# Collapse SRCS before passing them on to the next stage +SRCS := $(SRCS) + +# ******************************************************************************* +# Set the output filename + +# Configuration Variables: +# - PROJECT : Override the default output filename. Ex: PROJECT=MyProject + + +# The default value creates a file named after the target micro. Ex: MAX78000.elf +PROJECT ?= $(TARGET_LC) + +# ******************************************************************************* +# Compiler options + +# Configuration Variables: +# - DEBUG : Set DEBUG=1 to build explicitly for debugging. This adds some additional +# symbols and sets -Og as the default optimization level. +# - MXC_OPTIMIZE_CFLAGS : Override the default compiler optimization level. +# Ex: MXC_OPTIMIZE_CFLAGS = -O2 +# - PROJ_CFLAGS : Add additional compiler flags to the build. +# You should use the "+=" operator with this option. +# Ex: PROJ_CFLAGS += -Wextra +# - MFLOAT_ABI : Set the floating point acceleration level. +# The only options are "hard", "soft", or "softfp". +# Ex: MFLOAT_ABI = hard +# - LINKERFILE : Override the default linkerfile. +# Ex: LINKERFILE = customlinkerfile.ld +# - LINKERPATH : Override the default search location for $(LINKERFILE) +# The default search location is $(CMSIS_ROOT)/Device/Maxim/$(TARGET_UC)/Source/GCC +# If $(LINKERFILE) cannot be found at this path, then the root project +# directory will be used as a fallback. + +# Select 'GCC' or 'IAR' compiler +ifeq "$(COMPILER)" "" +COMPILER := GCC +endif + +# Set default compiler optimization levels +ifeq "$(MAKECMDGOALS)" "release" +# Default optimization level for "release" builds (make release) +MXC_OPTIMIZE_CFLAGS ?= -O2 +DEBUG = 0 +endif + +ifeq ($(DEBUG),1) +# Optimizes for debugging as recommended +# by GNU for code-edit-debug cycles +# https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#Optimize-Options +MXC_OPTIMIZE_CFLAGS := -Og +endif + +# Default level if not building for release or explicitly for debug +MXC_OPTIMIZE_CFLAGS ?= -Og + +# Set compiler flags +PROJ_CFLAGS += -Wall # Enable warnings +PROJ_CFLAGS += -DMXC_ASSERT_ENABLE + +# Set hardware floating point acceleration. +# Options are: +# - hard +# - soft +# - softfp (default if MFLOAT_ABI is not set) +MFLOAT_ABI ?= softfp +# MFLOAT_ABI must be exported to other Makefiles +export MFLOAT_ABI + +# This path contains system-level intialization files for the target micro. Add to the build. +VPATH += $(CMSIS_ROOT)/Device/Maxim/$(TARGET_UC)/Source + +# ******************************************************************************* +# Secure Boot Tools (SBT) + +# This section integrates the Secure Boot Tools. It's intended for use with +# microcontrollers that have a secure bootloader. + +# Enabling SBT integration will add some special rules, such as "make sla", "make scpa", etc. + +# Configuration variables: +# SBT : Toggle SBT integration. Set to 1 to enable, or 0 +# to disable +# MAXIM_SBT_DIR : Specify the location of the SBT tool binaries. This defaults to +# Tools/SBT in the MaximSDK. The standalone SBT installer will override +# this via an environment variable. +# TARGET_SEC : Specify the part number to be passed into the SBT. This should match +# the secure variant part #. The default value will depend on TARGET. +# For example, TARGET=MAX32650 will result in TARGET_SEC=MAX32651, and +# the default selection happens in Tools/SBT/SBT-config. +# However, if there are multiple secure part #s for the target +# microcontroller this variable may need to be changed. + +SBT ?= 0 +ifeq ($(SBT), 1) +MAXIM_SBT_DIR ?= $(MAXIM_PATH)/Tools/SBT +MAXIM_SBT_DIR := $(subst \,/,$(MAXIM_SBT_DIR)) +# ^ Must sanitize path for \ on Windows, since this may come from an environment +# variable. + +export MAXIM_SBT_DIR # SBTs must have this environment variable defined to work + +# SBT-config.mk and SBT-rules.mk are included further down this Makefile. + +endif # SBT + +# ******************************************************************************* +# Default goal selection. This section allows you to override the default goal +# that will run if no targets are specified on the command-line. +# (ie. just running 'make' instead of 'make all') + +# Configuration variables: +# .DEFAULT_GOAL : Set the default goal if no targets were specified on the +# command-line +# ** "override" must be used with this variable. ** +# Ex: "override .DEFAULT_GOAL = mygoal" + +ifeq "$(.DEFAULT_GOAL)" "" +ifeq ($(SBT),1) +override .DEFAULT_GOAL := sla +else +override .DEFAULT_GOAL := all +endif +endif + +# Developer note: 'override' is used above for legacy Makefile compatibility. +# gcc.mk/gcc_riscv.mk need to hard-set 'all' internally, so this new system +# uses 'override' to come in over the top without breaking old projects. + +# It's also necessary to explicitly set MAKECMDGOALS... +ifeq "$(MAKECMDGOALS)" "" +MAKECMDGOALS:=$(.DEFAULT_GOAL) +endif + +# Enable colors when --sync-output is used. +# See https://www.gnu.org/software/make/manual/make.html#Terminal-Output (section 13.2) +ifneq ($(MAKE_TERMOUT),) +PROJ_CFLAGS += -fdiagnostics-color=always +endif + +ifneq ($(FORCE_COLOR),) +PROJ_CFLAGS += -fdiagnostics-color=always +endif + +# ******************************************************************************* +# Include SBT config. We need to do this here because it needs to know +# the current MAKECMDGOAL. +ifeq ($(SBT),1) +include $(MAXIM_PATH)/Tools/SBT/SBT-config.mk +endif + +# ******************************************************************************* +# Libraries + +# This section offers "toggle switches" to include or exclude the libraries that +# are available in the MaximSDK. Set a configuration variable to 1 to include the +# library in the build, or 0 to exclude. + +# Each library may also have its own library specific configuration variables. See +# Libraries/libs.mk for more details. + +# Configuration variables: +# - LIB_BOARD : Include the Board-Support Package (BSP) library. (Enabled by default) +# - LIB_PERIPHDRIVERS : Include the peripheral driver library. (Enabled by default) +# - LIB_CMSIS_DSP : Include the CMSIS-DSP library. +# - LIB_CORDIO : Include the Cordio BLE library +# - LIB_FCL : Include the Free Cryptographic Library (FCL) +# - LIB_FREERTOS : Include the FreeRTOS and FreeRTOS-Plus-CLI libraries +# - LIB_LC3 : Include the Low Complexity Communication Codec (LC3) library +# - LIB_LITTLEFS : Include the "little file system" (littleFS) library +# - LIB_LWIP : Include the lwIP library +# - LIB_MAXUSB : Include the MAXUSB library +# - LIB_SDHC : Include the SDHC library + +include $(LIBS_DIR)/libs.mk + + +# ******************************************************************************* +# Rules + +# Include the rules for building for this target. All other makefiles should be +# included before this one. +include $(CMSIS_ROOT)/Device/Maxim/$(TARGET_UC)/Source/$(COMPILER)/$(TARGET_LC).mk + +# Include the rules that integrate the SBTs. SBTs are a special case that must be +# include after the core gcc rules to extend them. +ifeq ($(SBT), 1) +include $(MAXIM_PATH)/Tools/SBT/SBT-rules.mk +endif + + +# Get .DEFAULT_GOAL working. +ifeq "$(MAKECMDGOALS)" "" +MAKECMDGOALS:=$(.DEFAULT_GOAL) +endif + + +all: +# Extend the functionality of the "all" recipe here + arm-none-eabi-size --format=berkeley $(BUILD_DIR)/$(PROJECT).elf + +libclean: + $(MAKE) -f ${PERIPH_DRIVER_DIR}/periphdriver.mk clean.periph + +clean: +# Extend the functionality of the "clean" recipe here + +# The rule to clean out all the build products. +distclean: clean libclean diff --git a/Examples/MAX32665/Dual_Core/README.md b/Examples/MAX32665/Dual_Core/README.md new file mode 100644 index 00000000000..864bb37bd4e --- /dev/null +++ b/Examples/MAX32665/Dual_Core/README.md @@ -0,0 +1,41 @@ +## Description + +A basic getting started program for using both ARM cores. + +Based off the Hello_World example, the console UART, LED toggling, and incremental count are +split between both cores. + +Please check the board.c file in ${MSDKPath}\Libraries\Boards\MAX32665\${BoardName}\Source path to learn switch and LED pins for specific board. + +## Software + +### Project Usage + +Universal instructions on building, flashing, and debugging this project can be found in the **[MSDK User Guide](https://analogdevicesinc.github.io/msdk/USERGUIDE/)**. + +### Project-Specific Build Notes + +Set `ARM_DUALCORE=1` to build with the Core 1 startup and system files. + +## Required Connections + +- Connect a USB cable between the PC and the CN2 (USB/PWR) connector. +- Open a terminal application on the PC and connect to the EV kit's console UART at 115200, 8-N-1. + +## Expected Output + +The Console UART of the device will output these messages: + +``` +***** MAX32665 Dual Core Example ***** +Similar to the 'Hello World' example but split the +lights and console uart between core 0 and core 1. +Halting this example with a debugger will not stop core 1. + +Core 1: enter while loop. +Core 1: Ping: 0 +Core 0: Pong: 1 +Core 1: Ping: 1 +Core 0: Pong: 2 +Core 1: Pong: 2 +``` diff --git a/Examples/MAX32665/Dual_Core/project.mk b/Examples/MAX32665/Dual_Core/project.mk new file mode 100644 index 00000000000..a80838cf908 --- /dev/null +++ b/Examples/MAX32665/Dual_Core/project.mk @@ -0,0 +1,20 @@ +# This file can be used to set build configuration +# variables. These variables are defined in a file called +# "Makefile" that is located next to this one. + +# For instructions on how to use this system, see +# https://analogdevicesinc.github.io/msdk/USERGUIDE/#build-system + +# ********************************************************** + +# Add your config here! + +# Build with the necessary Core1 startup/system files. +ARM_DUALCORE=1 + +# Separate directories for Core 0 and Core 1 code. +VPATH += Core0 +VPATH += Core1 + +IPATH += Core0 +IPATH += Core1 diff --git a/Examples/MAX32665/RPU/main.c b/Examples/MAX32665/RPU/main.c index a5dc94bec0e..77375ce9a65 100644 --- a/Examples/MAX32665/RPU/main.c +++ b/Examples/MAX32665/RPU/main.c @@ -35,14 +35,10 @@ #include "rpu.h" #include "tmr.h" #include "led.h" -#include "core1.h" /***** Definitions *****/ /***** Globals *****/ -//#if defined ( __GNUC__) -// extern uint8_t __load_start_cpu1; -//#endif /***** Functions *****/ void HardFault_Handler(void) @@ -53,7 +49,7 @@ void HardFault_Handler(void) while (1) {} } -int Core1_Main(void) +int main_core1(void) { int err; // The RPU defaults to all access enabled @@ -86,7 +82,7 @@ int main(void) MXC_Delay(500000); LED_Off(1); - Core1_Start(); + Start_Core1(); MXC_Delay(1000); // Try to read TMR3's config register diff --git a/Examples/MAX32665/RPU/project.mk b/Examples/MAX32665/RPU/project.mk index 6b431a22292..925592979a8 100644 --- a/Examples/MAX32665/RPU/project.mk +++ b/Examples/MAX32665/RPU/project.mk @@ -13,3 +13,6 @@ # For more information on how sing process works, see # https://www.analog.com/en/education/education-library/videos/6313214207112.html SBT=0 + +# Build the Core1 startup/system files. +ARM_DUALCORE=1 diff --git a/Libraries/Boards/MAX32665/EvKit_V1/examples.txt b/Libraries/Boards/MAX32665/EvKit_V1/examples.txt index 573906413ea..4aa78d88ea7 100644 --- a/Libraries/Boards/MAX32665/EvKit_V1/examples.txt +++ b/Libraries/Boards/MAX32665/EvKit_V1/examples.txt @@ -34,6 +34,7 @@ Demo DES Display DMA +Dual_Core ECC EEPROM_Emulator Flash diff --git a/Libraries/Boards/MAX32665/FTHR/examples.txt b/Libraries/Boards/MAX32665/FTHR/examples.txt index 2d5422bf93d..ded4b655dbd 100644 --- a/Libraries/Boards/MAX32665/FTHR/examples.txt +++ b/Libraries/Boards/MAX32665/FTHR/examples.txt @@ -30,6 +30,7 @@ Bluetooth/Bootloader_Host CRC DES DMA +Dual_Core ECC Flash Flash_CLI diff --git a/Libraries/CMSIS/Device/Maxim/MAX32665/Include/max32665.h b/Libraries/CMSIS/Device/Maxim/MAX32665/Include/max32665.h index 712a0c649d2..54d1e0cc3af 100644 --- a/Libraries/CMSIS/Device/Maxim/MAX32665/Include/max32665.h +++ b/Libraries/CMSIS/Device/Maxim/MAX32665/Include/max32665.h @@ -21,6 +21,8 @@ #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_MAX32665_H_ #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_MAX32665_H_ +// clang-format off + #ifndef TARGET_NUM #define TARGET_NUM 32665 #endif @@ -178,15 +180,16 @@ typedef enum { /* ================================================================================ */ /* ---------------------- Configuration of the Cortex-M Processor and Core Peripherals ---------------------- */ -#define __CM4_REV 0x0100 /*!< Cortex-M4 Core Revision */ -#define __MPU_PRESENT 1 /*!< MPU present or not */ -#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present or not */ +#define __CM4_REV 0x0100 /*!< Cortex-M4 Core Revision */ +#define __MPU_PRESENT 1 /*!< MPU present or not */ +#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1 /*!< FPU present or not */ -#include /*!< Cortex-M4 processor and core peripherals */ +#include /*!< Cortex-M4 processor and core peripherals */ -#include "system_max32665.h" /*!< System Header */ +#include "system_max32665.h" /*!< System Header */ +#include "system_core1_max32665.h" /*!< System Header for Core 1 */ /* ================================================================================ */ /* ================== Device Specific Memory Section ================== */ diff --git a/Libraries/CMSIS/Device/Maxim/MAX32665/Include/system_core1_max32665.h b/Libraries/CMSIS/Device/Maxim/MAX32665/Include/system_core1_max32665.h new file mode 100644 index 00000000000..a206d719981 --- /dev/null +++ b/Libraries/CMSIS/Device/Maxim/MAX32665/Include/system_core1_max32665.h @@ -0,0 +1,59 @@ +/****************************************************************************** + * + * Copyright (C) 2024 Analog Devices, Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SYSTEM_CORE1_MAX32665_H_ +#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SYSTEM_CORE1_MAX32665_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/** + * @brief Start Core 1 code. + */ +void Start_Core1(void); + +/** + * @brief Stops Core 1 by disabling CPU1 clock. + */ +void Stop_Core1(void); + +/** + * @brief Main function for Core 1 Code. + * The user should override this function in their application code. + */ +int main_core1(void); + +/** + * @brief Equivalent to PreInit for Core 0, + * Can be used for preliminary initialization. + */ +void PreInit_Core1(void); + +/** + * @brief Initialize the system for Core 1. + */ +void SystemInit_Core1(void); + +#ifdef __cplusplus +} +#endif + +#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SYSTEM_CORE1_MAX32665_H_ diff --git a/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665.ld b/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665.ld index b6fe823f66b..621846e99f9 100644 --- a/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665.ld +++ b/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665.ld @@ -65,7 +65,8 @@ SECTIONS { .text : { _text = .; - KEEP(*(.isr_vector)) + KEEP(*(.isr_vector)) /* Core 0 vector table */ + *(.isr_vector_core1) /* Core 1 vector table */ *(.text*) /* program code */ *(.rodata*) /* read-only data: "const" */ @@ -96,8 +97,10 @@ SECTIONS { *(.ARM.extab* .gnu.linkonce.armextab.*) } > FLASH - /* This section will keep the SPIX data until loaded into the external device */ - /* Upon initialization of SPIX (user code needs to do this) */ + /** + * This section will keep the SPIX data until loaded into the external device. + * Upon initialization of SPIX (user code needs to do this). + */ .xip_section : { KEEP(*(.xip_section*)) @@ -119,11 +122,10 @@ SECTIONS { { _data = ALIGN(., 4); *(vtable) - *(.data*) /*read-write initialized data: initialized global variable*/ + *(.data*) /* read-write initialized data: initialized global variable */ *(.spix_config*) /* SPIX configuration functions need to be run from SRAM */ *(.flashprog*) /* Flash program */ - /* These array sections are used by __libc_init_array to call static C++ constructors */ . = ALIGN(4); /* preinit data */ @@ -161,32 +163,28 @@ SECTIONS { .otp (NOLOAD) : { _otp = ALIGN(., 4); - *(.otp*) /*Copy of OTP memory*/ - + *(.otp*) /* Copy of OTP memory */ _eotp = ALIGN(., 4); } > OTP .arm_shared (NOLOAD) : { _arm_shared = ALIGN(., 4); - *(.arm_shared*) /*Shared memory section*/ - - _earm_shared = ALIGN(., 4); + *(.arm_shared*) /* Shared memory section */ + _earm_shared = ALIGN(., 4); } > ARM_SHARED .sdma_shared (NOLOAD) : { _sdma_shared = ALIGN(., 4); - *(.sdma_shared*) /*Shared memory section*/ - + *(.sdma_shared*) /* Shared memory section */ _esdma_shared = ALIGN(., 4); } > SDMA_SHARED .sdma_code : { _sdma_code = ALIGN(., 4); - *(.sdma_code*) /*SDMA Code*/ - + *(.sdma_code*) /* SDMA Code */ _esdma_code = ALIGN(., 4); } > SDMA_CODE AT>FLASH __load_sdma_code = LOADADDR(.sdma_code); @@ -194,8 +192,7 @@ SECTIONS { .sdma_data : { _sdma_data = ALIGN(., 4); - *(.sdma_data*) /*SDMA Data*/ - + *(.sdma_data*) /* SDMA Data */ _esdma_data = ALIGN(., 4); } > SDMA_DATA AT>FLASH __load_sdma_data = LOADADDR(.sdma_data); @@ -204,20 +201,23 @@ SECTIONS { { . = ALIGN(4); _bss = .; - *(.bss*) /*read-write zero initialized data: uninitialzed global variable*/ + *(.bss*) /* read-write zero-initialized data: uninitialized global variable */ *(COMMON) _ebss = ALIGN(., 4); } > SRAM - /* Setup the stack for Core 1, it will only be used if the user code + /** + * Setup the stack for Core 1, it will only be used if the project build * includes a definition of Stack_Size_Core1, which defines the space - * reserved above the main core's stack for core 1's stack */ - + * reserved above the main core's stack for core 1's stack. + */ __StackTop_Core1 = ORIGIN(SRAM) + LENGTH(SRAM); __StackLimit_Core1 = DEFINED(Stack_Size_Core1) ? __StackTop_Core1 - Stack_Size_Core1 : __StackTop_Core1; - /* Set stack top to end of RAM, and stack limit move down by Stack_Size. - * If core 1 is used, set the stack to the bottom of Core 1's stack region */ + /** + * Set stack top to end of RAM, and stack limit move down by Stack_Size. + * If core 1 is used, set the stack to the bottom of Core 1's stack region. + */ __StackTop = DEFINED(Stack_Size_Core1) ? __StackLimit_Core1 : ORIGIN(SRAM) + LENGTH(SRAM); __StackLimit = __StackTop - Stack_Size; diff --git a/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665.mk b/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665.mk index d6ff86308bf..17431755811 100644 --- a/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665.mk +++ b/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665.mk @@ -60,6 +60,16 @@ SRCS += heap.c SRCS += system_max32665.c endif +# Add Core 1 CMSIS source files +# This prevents the linker script from allocating memory for the Core 1 +# stack and vector table when Core 1 is not in use. +# Ex: "make ARM_DUALCORE=1" +ARM_DUALCORE ?= 0 +ifeq ($(ARM_DUALCORE),1) +SRCS += system_core1_max32665.c +SRCS += startup_core1_max32665.S +endif + # Add target specific CMSIS source directories VPATH+=$(CMSIS_ROOT)/Device/Maxim/MAX32665/Source/GCC VPATH+=$(CMSIS_ROOT)/Device/Maxim/MAX32665/Source diff --git a/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/startup_core1_max32665.S b/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/startup_core1_max32665.S new file mode 100644 index 00000000000..e450d01d291 --- /dev/null +++ b/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/startup_core1_max32665.S @@ -0,0 +1,187 @@ +/****************************************************************************** + * + * Copyright (C) 2024 Analog Devices, Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + + .syntax unified + .arch armv7-m + + .section .stack_core1 + .align 3 + + .globl Stack_Size_Core1 +#ifdef __STACK_SIZE_CORE1 + .equ Stack_Size_Core1, __STACK_SIZE +#else + .equ Stack_Size_Core1, 0x00001000 +#endif + .globl __StackTop_Core1 +__StackTop_Core1: + .size __StackTop_Core1, . - __StackTop_Core1 + +/* Stack limit setup for Core 1 done in Linker file */ +/* Use Heap setup from Core 0 */ + + .section .isr_vector_core1 + .align 2 + .globl __isr_vector_core1 +__isr_vector_core1: + .long __StackTop_Core1 /* Top of Core 1 Stack */ + .long Reset_Handler_Core1 /* Reset Handler */ + .long NMI_Handler /* NMI Handler */ + .long HardFault_Handler /* Hard Fault Handler */ + .long MemManage_Handler /* MPU Fault Handler */ + .long BusFault_Handler /* Bus Fault Handler */ + .long UsageFault_Handler /* Usage Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long SVC_Handler /* SVCall Handler */ + .long 0 /* Reserved */ /* @TODO: Is this the Debug Monitor Interrupt? */ + .long 0 /* Reserved */ + .long PendSV_Handler /* PendSV Handler */ + .long SysTick_Handler /* SysTick Handler */ + + /* Device-specific Interrupts */ + .long PF_IRQHandler /* 0x10 0x0040 16: Power Fail */ + .long WDT0_IRQHandler /* 0x11 0x0044 17: Watchdog 0 */ + .long USB_IRQHandler /* 0x12 0x0048 18: USB */ + .long RTC_IRQHandler /* 0x13 0x004C 19: RTC */ + .long TRNG_IRQHandler /* 0x14 0x0050 20: True Random Number Generator */ + .long TMR0_IRQHandler /* 0x15 0x0054 21: Timer 0 */ + .long TMR1_IRQHandler /* 0x16 0x0058 22: Timer 1 */ + .long TMR2_IRQHandler /* 0x17 0x005C 23: Timer 2 */ + .long TMR3_IRQHandler /* 0x18 0x0060 24: Timer 3*/ + .long TMR4_IRQHandler /* 0x19 0x0064 25: Timer 4*/ + .long TMR5_IRQHandler /* 0x1A 0x0068 26: Timer 5 */ + .long RSV11_IRQHandler /* 0x1B 0x006C 27: Reserved */ + .long RSV12_IRQHandler /* 0x1C 0x0070 28: Reserved */ + .long I2C0_IRQHandler /* 0x1D 0x0074 29: I2C0 */ + .long UART0_IRQHandler /* 0x1E 0x0078 30: UART 0 */ + .long UART1_IRQHandler /* 0x1F 0x007C 31: UART 1 */ + .long SPI1_IRQHandler /* 0x20 0x0080 32: SPI1 */ + .long SPI2_IRQHandler /* 0x21 0x0084 33: SPI2 */ + .long RSV18_IRQHandler /* 0x22 0x0088 34: Reserved */ + .long RSV19_IRQHandler /* 0x23 0x008C 35: Reserved */ + .long ADC_IRQHandler /* 0x24 0x0090 36: ADC */ + .long RSV21_IRQHandler /* 0x25 0x0094 37: Reserved */ + .long RSV22_IRQHandler /* 0x26 0x0098 38: Reserved */ + .long FLC0_IRQHandler /* 0x27 0x009C 39: Flash Controller */ + .long GPIO0_IRQHandler /* 0x28 0x00A0 40: GPIO0 */ + .long GPIO1_IRQHandler /* 0x29 0x00A4 41: GPIO2 */ + .long RSV26_IRQHandler /* 0x2A 0x00A8 42: GPIO3 */ + .long TPU_IRQHandler /* 0x2B 0x00AC 43: Crypto */ + .long DMA0_IRQHandler /* 0x2C 0x00B0 44: DMA0 */ + .long DMA1_IRQHandler /* 0x2D 0x00B4 45: DMA1 */ + .long DMA2_IRQHandler /* 0x2E 0x00B8 46: DMA2 */ + .long DMA3_IRQHandler /* 0x2F 0x00BC 47: DMA3 */ + .long RSV32_IRQHandler /* 0x30 0x00C0 48: Reserved */ + .long RSV33_IRQHandler /* 0x31 0x00C4 49: Reserved */ + .long UART2_IRQHandler /* 0x32 0x00C8 50: UART 2 */ + .long RSV35_IRQHandler /* 0x33 0x00CC 51: Reserved */ + .long I2C1_IRQHandler /* 0x34 0x00D0 52: I2C1 */ + .long RSV37_IRQHandler /* 0x35 0x00D4 53: Reserved */ + .long SPIXFC_IRQHandler /* 0x36 0x00D8 54: SPI execute in place */ + .long BTLE_TX_DONE_IRQHandler /* 0x37 0x00DC 55: BTLE TX Done */ + .long BTLE_RX_RCVD_IRQHandler /* 0x38 0x00E0 56: BTLE RX Recived */ + .long BTLE_RX_ENG_DET_IRQHandler /* 0x39 0x00E4 57: BTLE RX Energy Dectected */ + .long BTLE_SFD_DET_IRQHandler /* 0x3A 0x00E8 58: BTLE SFD Detected */ + .long BTLE_SFD_TO_IRQHandler /* 0x3B 0x00EC 59: BTLE SFD Timeout*/ + .long BTLE_GP_EVENT_IRQHandler /* 0x3C 0x00F0 60: BTLE Timestamp*/ + .long BTLE_CFO_IRQHandler /* 0x3D 0x00F4 61: BTLE CFO Done */ + .long BTLE_SIG_DET_IRQHandler /* 0x3E 0x00F8 62: BTLE Signal Detected */ + .long BTLE_AGC_EVENT_IRQHandler /* 0x3F 0x00FC 63: BTLE AGC Event */ + .long BTLE_RFFE_SPIM_IRQHandler /* 0x40 0x0100 64: BTLE RFFE SPIM Done */ + .long BTLE_TX_AES_IRQHandler /* 0x41 0x0104 65: BTLE TX AES Done */ + .long BTLE_RX_AES_IRQHandler /* 0x42 0x0108 66: BTLE RX AES Done */ + .long BTLE_INV_APB_ADDR_IRQHandler /* 0x43 0x010C 67: BTLE Invalid APB Address*/ + .long BTLE_IQ_DATA_VALID_IRQHandler /* 0x44 0x0110 68: BTLE IQ Data Valid */ + .long WUT_IRQHandler /* 0x45 0x0114 69: WUT Wakeup */ + .long GPIOWAKE_IRQHandler /* 0x46 0x0118 70: GPIO Wakeup */ + .long RSV55_IRQHandler /* 0x47 0x011C 71: Reserved */ + .long SPI0_IRQHandler /* 0x48 0x0120 72: SPI AHB */ + .long WDT1_IRQHandler /* 0x49 0x0124 73: Watchdog 1 */ + .long RSV58_IRQHandler /* 0x4A 0x0128 74: Reserved */ + .long PT_IRQHandler /* 0x4B 0x012C 75: Pulse train */ + .long SDMA0_IRQHandler /* 0x4C 0x0130 76: Smart DMA 0 */ + .long RSV61_IRQHandler /* 0x4D 0x0134 77: Reserved */ + .long I2C2_IRQHandler /* 0x4E 0x0138 78: I2C 2 */ + .long RSV63_IRQHandler /* 0x4F 0x013C 79: Reserved */ + .long RSV64_IRQHandler /* 0x50 0x0140 80: Reserved */ + .long RSV65_IRQHandler /* 0x51 0x0144 81: Reserved */ + .long SDHC_IRQHandler /* 0x52 0x0148 82: SDIO/SDHC */ + .long OWM_IRQHandler /* 0x53 0x014C 83: One Wire Master */ + .long DMA4_IRQHandler /* 0x54 0x0150 84: DMA4 */ + .long DMA5_IRQHandler /* 0x55 0x0154 85: DMA5 */ + .long DMA6_IRQHandler /* 0x56 0x0158 86: DMA6 */ + .long DMA7_IRQHandler /* 0x57 0x015C 87: DMA7 */ + .long DMA8_IRQHandler /* 0x58 0x0160 88: DMA8 */ + .long DMA9_IRQHandler /* 0x59 0x0164 89: DMA9 */ + .long DMA10_IRQHandler /* 0x5A 0x0168 90: DMA10 */ + .long DMA11_IRQHandler /* 0x5B 0x016C 91: DMA11 */ + .long DMA12_IRQHandler /* 0x5C 0x0170 92: DMA12 */ + .long DMA13_IRQHandler /* 0x5D 0x0174 93: DMA13 */ + .long DMA14_IRQHandler /* 0x5E 0x0178 94: DMA14 */ + .long DMA15_IRQHandler /* 0x5F 0x017C 95: DMA15 */ + .long USBDMA_IRQHandler /* 0x60 0x0180 96: USB DMA */ + .long WDT2_IRQHandler /* 0x61 0x0184 97: Watchdog Timer 2 */ + .long ECC_IRQHandler /* 0x62 0x0188 98: Error Correction */ + .long DVS_IRQHandler /* 0x63 0x018C 99: DVS Controller */ + .long SIMO_IRQHandler /* 0x64 0x0190 100: SIMO Controller */ + .long SCA_IRQHandler /* 0x65 0x0194 101: SCA */ + .long AUDIO_IRQHandler /* 0x66 0x0198 102: Audio subsystem */ + .long FLC1_IRQHandler /* 0x67 0x019C 103: Flash Control 1 */ + .long RSV88_IRQHandler /* 0x68 0x01A0 104: UART 3 */ + .long RSV89_IRQHandler /* 0x69 0x01A4 105: UART 4 */ + .long RSV90_IRQHandler /* 0x6A 0x01A8 106: UART 5 */ + .long RSV91_IRQHandler /* 0x6B 0x01AC 107: Camera IF */ + .long RSV92_IRQHandler /* 0x6C 0x01B0 108: I3C */ + .long HTMR0_IRQHandler /* 0x6D 0x01B4 109: HTmr */ + .long HTMR1_IRQHandler /* 0x6E 0x01B8 110: HTmr */ + + .text + .thumb + .thumb_func + .align 2 + .globl Reset_Handler_Core1 + .type Reset_Handler_Core1 %function +Reset_Handler_Core1: + ldr r0, =__StackTop_Core1 + mov sp, r0 + + ldr r0, =PreInit_Core1 + blx r0 + + /* RAM initialization occurs during startup with Core 0 */ + + ldr r0, =SystemInit_Core1 + blx r0 + + /* Transfer control to user's core 1 main program */ + ldr r0, =main_core1 + blx r0 + +.SPIN_CORE1: + /* spin if main ever returns. */ + bl .SPIN_CORE1 + +/* + * Macro to define default handlers are defined in + * core0 startup file. + */ + + .end diff --git a/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S b/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S index d8ea275d396..f74548f7f7f 100644 --- a/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S +++ b/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S @@ -189,17 +189,18 @@ __isr_vector: .long WDT2_IRQHandler /* 0x61 0x0184 97: Watchdog Timer 2 */ .long ECC_IRQHandler /* 0x62 0x0188 98: Error Correction */ .long DVS_IRQHandler /* 0x63 0x018C 99: DVS Controller */ - .long SIMO_IRQHandler /* 0x64 0x0190 100: SIMO Controller */ - .long SCA_IRQHandler /* 0x65 0x0194 101: SCA */ - .long AUDIO_IRQHandler /* 0x66 0x0198 102: Audio subsystem */ - .long FLC1_IRQHandler /* 0x67 0x019C 103: Flash Control 1 */ - .long RSV88_IRQHandler /* 0x68 0x01A0 104: UART 3 */ - .long RSV89_IRQHandler /* 0x69 0x01A4 105: UART 4 */ - .long RSV90_IRQHandler /* 0x6A 0x01A8 106: UART 5 */ - .long RSV91_IRQHandler /* 0x6B 0x01AC 107: Camera IF */ - .long RSV92_IRQHandler /* 0x6C 0x01B0 108: I3C */ - .long HTMR0_IRQHandler /* 0x6D 0x01B4 109: HTmr */ - .long HTMR1_IRQHandler /* 0x6E 0x01B8 109: HTmr */ + .long SIMO_IRQHandler /* 0x64 0x0190 100: SIMO Controller */ + .long SCA_IRQHandler /* 0x65 0x0194 101: SCA */ + .long AUDIO_IRQHandler /* 0x66 0x0198 102: Audio subsystem */ + .long FLC1_IRQHandler /* 0x67 0x019C 103: Flash Control 1 */ + .long RSV88_IRQHandler /* 0x68 0x01A0 104: Reserved */ + .long RSV89_IRQHandler /* 0x69 0x01A4 105: Reserved */ + .long RSV90_IRQHandler /* 0x6A 0x01A8 106: Reserved */ + .long RSV91_IRQHandler /* 0x6B 0x01AC 107: Reserved */ + .long RSV92_IRQHandler /* 0x6C 0x01B0 108: Reserved */ + .long HTMR0_IRQHandler /* 0x6D 0x01B4 109: HTmr */ + .long HTMR1_IRQHandler /* 0x6E 0x01B8 110: HTmr */ + .text .thumb .thumb_func @@ -208,7 +209,6 @@ __isr_vector: .type Reset_Handler %function Reset_Handler: - #ifdef ECC_INIT_ATSTARTUP // // Enable ECC for System RAM - this must run before the first stack or SRAM operation @@ -490,16 +490,16 @@ ecc_init_exit: def_irq_handler WDT2_IRQHandler /* 0x61 0x0184 97: Watchdog Timer 2 */ def_irq_handler ECC_IRQHandler /* 0x62 0x0188 98: Error Correction */ def_irq_handler DVS_IRQHandler /* 0x63 0x018C 99: DVS Controller */ - def_irq_handler SIMO_IRQHandler /* 0x64 0x0190 100: SIMO Controller */ - def_irq_handler SCA_IRQHandler /* 0x65 0x0194 101: SCA */ /* @TODO: Is this correct? */ - def_irq_handler AUDIO_IRQHandler /* 0x66 0x0198 102: Audio subsystem */ - def_irq_handler FLC1_IRQHandler /* 0x67 0x019C 103: Flash Control 1 */ - def_irq_handler RSV88_IRQHandler /* 0x68 0x01A0 104: UART 3 */ - def_irq_handler RSV89_IRQHandler /* 0x69 0x01A4 105: UART 4 */ - def_irq_handler RSV90_IRQHandler /* 0x6A 0x01A8 106: UART 5 */ - def_irq_handler RSV91_IRQHandler /* 0x6B 0x01AC 107: Camera IF */ - def_irq_handler RSV92_IRQHandler /* 0x6C 0x01B0 108: I3C */ - def_irq_handler HTMR0_IRQHandler /* 0x6D 0x01B4 109: HTmr */ - def_irq_handler HTMR1_IRQHandler /* 0x6E 0x01B8 109: HTmr */ + def_irq_handler SIMO_IRQHandler /* 0x64 0x0190 100: SIMO Controller */ + def_irq_handler SCA_IRQHandler /* 0x65 0x0194 101: SCA */ /* @TODO: Is this correct? */ + def_irq_handler AUDIO_IRQHandler /* 0x66 0x0198 102: Audio subsystem */ + def_irq_handler FLC1_IRQHandler /* 0x67 0x019C 103: Flash Control 1 */ + def_irq_handler RSV88_IRQHandler /* 0x68 0x01A0 104: Reserved */ + def_irq_handler RSV89_IRQHandler /* 0x69 0x01A4 105: Reserved */ + def_irq_handler RSV90_IRQHandler /* 0x6A 0x01A8 106: Reserved */ + def_irq_handler RSV91_IRQHandler /* 0x6B 0x01AC 107: Reserved */ + def_irq_handler RSV92_IRQHandler /* 0x6C 0x01B0 108: Reserved */ + def_irq_handler HTMR0_IRQHandler /* 0x6D 0x01B4 109: HTmr */ + def_irq_handler HTMR1_IRQHandler /* 0x6E 0x01B8 110: HTmr */ .end diff --git a/Libraries/PeriphDrivers/Source/CORE1/system_core1.c b/Libraries/CMSIS/Device/Maxim/MAX32665/Source/system_core1_max32665.c similarity index 54% rename from Libraries/PeriphDrivers/Source/CORE1/system_core1.c rename to Libraries/CMSIS/Device/Maxim/MAX32665/Source/system_core1_max32665.c index f1cbd38bc71..74a277be54b 100644 --- a/Libraries/PeriphDrivers/Source/CORE1/system_core1.c +++ b/Libraries/CMSIS/Device/Maxim/MAX32665/Source/system_core1_max32665.c @@ -18,64 +18,66 @@ * ******************************************************************************/ -/** - * @file core1startup.c - * @brief Startup Code for MAX32665 Family CPU1 - * @details These functions are called at the startup of the second ARM core (CPU1/Core1) - */ #include #include #include -#include "max32665.h" +#include "mxc_device.h" #include "mxc_sys.h" #include "gcr_regs.h" -#include "icc_regs.h" -#include "pwrseq_regs.h" -extern uint32_t __isr_vector_core1; +extern void (*const __isr_vector_core1[])(void); -void Core1_Start(void) +void Start_Core1(void) { - MXC_GCR->gp0 = (uint32_t)(&__isr_vector_core1); + // Save Core 1 vector table location in GCR. + MXC_GCR->gp0 = (uint32_t)&__isr_vector_core1; MXC_GCR->perckcn1 &= ~MXC_F_GCR_PERCKCN1_CPU1D; } -void Core1_Stop(void) +void Stop_Core1(void) { MXC_GCR->perckcn1 |= MXC_F_GCR_PERCKCN1_CPU1D; } -__weak int Core1_Main(void) +/** + * The user declares this in application code. + */ +__weak int main_core1(void) { - // The user should declare this in application code, so we'll just spin while (1) {} } + +/** + * You may over-ride this function in your program by defining a custom + * PreInit_Core1(). + */ __weak void PreInit_Core1(void) { return; } +/** + * This function is called just before control is transferred to main() + * on Core 1. + * + * You may over-ride this function in your program by defining a custom + * SystemInit(), but care should be taken to reproduce the initialization + * steps or a non-functional system may result. + */ __weak void SystemInit_Core1(void) { - /* Configure the interrupt controller to use the application vector table in - * the application space */ + /** + * Configure the interrupt controller to use the application vector + * table in flash. Initially, VTOR points to the ROM's table. + */ SCB->VTOR = (uint32_t)&__isr_vector_core1; - /* Enable FPU on Cortex-M4, which occupies coprocessor slots 10 & 11 - * Grant full access, per "Table B3-24 CPACR bit assignments". - * DDI0403D "ARMv7-M Architecture Reference Manual" */ + /** + * Enable FPU on Cortex-M4, which occupies coprocessor slots 10 & 11 + * Grant full access, per "Table B3-24 CPACR bit assignments". + * DDI0403D "ARMv7-M Architecture Reference Manual" + */ SCB->CPACR |= SCB_CPACR_CP10_Msk | SCB_CPACR_CP11_Msk; __DSB(); __ISB(); - - // Enable ICache1 Clock - MXC_GCR->perckcn1 &= ~(1 << 22); - - // Invalidate cache and wait until ready - MXC_ICC1->invalidate = 1; - while (!(MXC_ICC1->cache_ctrl & MXC_F_ICC_CACHE_CTRL_RDY)) {} - - // Enable Cache - MXC_ICC1->cache_ctrl |= MXC_F_ICC_CACHE_CTRL_EN; - while (!(MXC_ICC1->cache_ctrl & MXC_F_ICC_CACHE_CTRL_RDY)) {} } diff --git a/Libraries/PeriphDrivers/Include/MAX32665/core1.h b/Libraries/PeriphDrivers/Include/MAX32665/core1.h index 6cf98e7c42c..eb8e86c630f 100644 --- a/Libraries/PeriphDrivers/Include/MAX32665/core1.h +++ b/Libraries/PeriphDrivers/Include/MAX32665/core1.h @@ -25,6 +25,12 @@ extern "C" { #endif +#include "mxc_device.h" + +#warning "core1.h is deprecated (05-24-2024)." +#warning "Use mxc_device.h instead, and set `ARM_DUALCORE=1` in project.mk" +#warning "Core 1 Startup/System code is located at Libraries/CMSIS/Device/Maxim/MAX32665/" + /** * @file core1.h * @brief Startup Code for MAX32665 Family CPU1 @@ -35,32 +41,36 @@ extern "C" { * @brief Starts the code on core 1 * Core1 code beings executing from Core1_Main() */ -void Core1_Start(void); +#if defined(__GNUC__) +inline __attribute__((deprecated("Use Start_Core1(); instead."))) void Core1_Start(void) +{ + Start_Core1(); +} +#endif /** * @brief Stops code executing in Core 1 */ -void Core1_Stop(void); +#if defined(__GNUC__) +inline __attribute__((deprecated("Use Stop_Core1(); instead."))) void Core1_Stop(void) +{ + Stop_Core1(); +} +#endif /** * @brief Main function for Core 1 Code * The user should override this function * in their application code */ -int Core1_Main(void); - -/** - * @brief Equivalent to PreInit for Core 0 - * Can be used for preliminary initialization - */ -void PreInit_Core1(void); +#if defined(__GNUC__) +inline __attribute__((deprecated( + "Use `int main_core1(void)` instead - main_core1 is Core 1's entry point where code starts, not Core1_Main."))) int +Core1_Main(void); +#endif -/** - * @brief Equivalent to PreInit for Core 1 - * Enables FPU, and ICache - * Sets interrupt vector - */ -void SystemInit_Core1(void); +// void PreInit_Core1(void) is now located in system_core_max32665.h +// void SystemInit_Core1(void) is now located in system_core_max32665.h #ifdef __cplusplus } diff --git a/Libraries/PeriphDrivers/Source/CORE1/startup_core1.S b/Libraries/PeriphDrivers/Source/CORE1/startup_core1.S deleted file mode 100644 index 328a4ddedf4..00000000000 --- a/Libraries/PeriphDrivers/Source/CORE1/startup_core1.S +++ /dev/null @@ -1,156 +0,0 @@ - .syntax unified - .arch armv7-m - - .section .stack_core1 - .align 3 - .globl Stack_Size_Core1 -#ifdef __STACK_SIZE_CORE1 - .equ Stack_Size_Core1, __STACK_SIZE -#else - .equ Stack_Size_Core1, 0x00001000 -#endif - .globl __StackTop_Core1 -__StackTop_Core1: - .size __StackTop_Core1, . - __StackTop_Core1 - - .section .text - .align 0x10 - .globl __isr_vector_core1 -__isr_vector_core1: - .long __StackTop_Core1 /* Top of Core 1 Stack */ - .long Reset_Handler_Core1 /* Reset Handler */ - .long NMI_Handler /* NMI Handler */ - .long HardFault_Handler /* Hard Fault Handler */ - .long MemManage_Handler /* MPU Fault Handler */ - .long BusFault_Handler /* Bus Fault Handler */ - .long UsageFault_Handler /* Usage Fault Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long SVC_Handler /* SVCall Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long PendSV_Handler /* PendSV Handler */ - .long SysTick_Handler /* SysTick Handler */ - - /* Device-specific Interrupts */ - .long PF_IRQHandler /* 0x10 0x0040 16: Power Fail */ - .long WDT0_IRQHandler /* 0x11 0x0044 17: Watchdog 0 */ - .long USB_IRQHandler /* 0x12 0x0048 18: USB */ - .long RTC_IRQHandler /* 0x13 0x004C 19: RTC */ - .long TRNG_IRQHandler /* 0x14 0x0050 20: True Random Number Generator */ - .long TMR0_IRQHandler /* 0x15 0x0054 21: Timer 0 */ - .long TMR1_IRQHandler /* 0x16 0x0058 22: Timer 1 */ - .long TMR2_IRQHandler /* 0x17 0x005C 23: Timer 2 */ - .long TMR3_IRQHandler /* 0x18 0x0060 24: Timer 3*/ - .long TMR4_IRQHandler /* 0x19 0x0064 25: Timer 4*/ - .long TMR5_IRQHandler /* 0x1A 0x0068 26: Timer 5 */ - .long RSV11_IRQHandler /* 0x1B 0x006C 27: Reserved */ - .long RSV12_IRQHandler /* 0x1C 0x0070 28: Reserved */ - .long I2C0_IRQHandler /* 0x1D 0x0074 29: I2C0 */ - .long UART0_IRQHandler /* 0x1E 0x0078 30: UART 0 */ - .long UART1_IRQHandler /* 0x1F 0x007C 31: UART 1 */ - .long SPI1_IRQHandler /* 0x20 0x0080 32: SPI1 */ - .long SPI2_IRQHandler /* 0x21 0x0084 33: SPI2 */ - .long RSV18_IRQHandler /* 0x22 0x0088 34: Reserved */ - .long RSV19_IRQHandler /* 0x23 0x008C 35: Reserved */ - .long ADC_IRQHandler /* 0x24 0x0090 36: ADC */ - .long RSV21_IRQHandler /* 0x25 0x0094 37: Reserved */ - .long RSV22_IRQHandler /* 0x26 0x0098 38: Reserved */ - .long FLC0_IRQHandler /* 0x27 0x009C 39: Flash Controller */ - .long GPIO0_IRQHandler /* 0x28 0x00A0 40: GPIO0 */ - .long GPIO1_IRQHandler /* 0x29 0x00A4 41: GPIO2 */ - .long RSV26_IRQHandler /* 0x2A 0x00A8 42: GPIO3 */ - .long TPU_IRQHandler /* 0x2B 0x00AC 43: Crypto */ - .long DMA0_IRQHandler /* 0x2C 0x00B0 44: DMA0 */ - .long DMA1_IRQHandler /* 0x2D 0x00B4 45: DMA1 */ - .long DMA2_IRQHandler /* 0x2E 0x00B8 46: DMA2 */ - .long DMA3_IRQHandler /* 0x2F 0x00BC 47: DMA3 */ - .long RSV32_IRQHandler /* 0x30 0x00C0 48: Reserved */ - .long RSV33_IRQHandler /* 0x31 0x00C4 49: Reserved */ - .long UART2_IRQHandler /* 0x32 0x00C8 50: UART 2 */ - .long RSV35_IRQHandler /* 0x33 0x00CC 51: Reserved */ - .long I2C1_IRQHandler /* 0x34 0x00D0 52: I2C1 */ - .long RSV37_IRQHandler /* 0x35 0x00D4 53: Reserved */ - .long SPIXFC_IRQHandler /* 0x36 0x00D8 54: SPI execute in place */ - .long BTLE_TX_DONE_IRQHandler /* 0x37 0x00DC 55: BTLE TX Done */ - .long BTLE_RX_RCVD_IRQHandler /* 0x38 0x00E0 56: BTLE RX Recived */ - .long BTLE_RX_ENG_DET_IRQHandler /* 0x39 0x00E4 57: BTLE RX Energy Dectected */ - .long BTLE_SFD_DET_IRQHandler /* 0x3A 0x00E8 58: BTLE SFD Detected */ - .long BTLE_SFD_TO_IRQHandler /* 0x3B 0x00EC 59: BTLE SFD Timeout*/ - .long BTLE_GP_EVENT_IRQHandler /* 0x3C 0x00F0 60: BTLE Timestamp*/ - .long BTLE_CFO_IRQHandler /* 0x3D 0x00F4 61: BTLE CFO Done */ - .long BTLE_SIG_DET_IRQHandler /* 0x3E 0x00F8 62: BTLE Signal Detected */ - .long BTLE_AGC_EVENT_IRQHandler /* 0x3F 0x00FC 63: BTLE AGC Event */ - .long BTLE_RFFE_SPIM_IRQHandler /* 0x40 0x0100 64: BTLE RFFE SPIM Done */ - .long BTLE_TX_AES_IRQHandler /* 0x41 0x0104 65: BTLE TX AES Done */ - .long BTLE_RX_AES_IRQHandler /* 0x42 0x0108 66: BTLE RX AES Done */ - .long BTLE_INV_APB_ADDR_IRQHandler /* 0x43 0x010C 67: BTLE Invalid APB Address*/ - .long BTLE_IQ_DATA_VALID_IRQHandler /* 0x44 0x0110 68: BTLE IQ Data Valid */ - .long WUT_IRQHandler /* 0x45 0x0114 69: WUT Wakeup */ - .long GPIOWAKE_IRQHandler /* 0x46 0x0118 70: GPIO Wakeup */ - .long RSV55_IRQHandler /* 0x47 0x011C 71: Reserved */ - .long SPI0_IRQHandler /* 0x48 0x0120 72: SPI AHB */ - .long WDT1_IRQHandler /* 0x49 0x0124 73: Watchdog 1 */ - .long RSV58_IRQHandler /* 0x4A 0x0128 74: Reserved */ - .long PT_IRQHandler /* 0x4B 0x012C 75: Pulse train */ - .long SDMA0_IRQHandler /* 0x4C 0x0130 76: Smart DMA 0 */ - .long RSV61_IRQHandler /* 0x4D 0x0134 77: Reserved */ - .long I2C2_IRQHandler /* 0x4E 0x0138 78: I2C 2 */ - .long RSV63_IRQHandler /* 0x4F 0x013C 79: Reserved */ - .long RSV64_IRQHandler /* 0x50 0x0140 80: Reserved */ - .long RSV65_IRQHandler /* 0x51 0x0144 81: Reserved */ - .long SDHC_IRQHandler /* 0x52 0x0148 82: SDIO/SDHC */ - .long OWM_IRQHandler /* 0x53 0x014C 83: One Wire Master */ - .long DMA4_IRQHandler /* 0x54 0x0150 84: DMA4 */ - .long DMA5_IRQHandler /* 0x55 0x0154 85: DMA5 */ - .long DMA6_IRQHandler /* 0x56 0x0158 86: DMA6 */ - .long DMA7_IRQHandler /* 0x57 0x015C 87: DMA7 */ - .long DMA8_IRQHandler /* 0x58 0x0160 88: DMA8 */ - .long DMA9_IRQHandler /* 0x59 0x0164 89: DMA9 */ - .long DMA10_IRQHandler /* 0x5A 0x0168 90: DMA10 */ - .long DMA11_IRQHandler /* 0x5B 0x016C 91: DMA11 */ - .long DMA12_IRQHandler /* 0x5C 0x0170 92: DMA12 */ - .long DMA13_IRQHandler /* 0x5D 0x0174 93: DMA13 */ - .long DMA14_IRQHandler /* 0x5E 0x0178 94: DMA14 */ - .long DMA15_IRQHandler /* 0x5F 0x017C 95: DMA15 */ - .long USBDMA_IRQHandler /* 0x60 0x0180 96: USB DMA */ - .long WDT2_IRQHandler /* 0x61 0x0184 97: Watchdog Timer 2 */ - .long ECC_IRQHandler /* 0x62 0x0188 98: Error Correction */ - .long DVS_IRQHandler /* 0x63 0x018C 99: DVS Controller */ - .long SIMO_IRQHandler /* 0x64 0x0190 100: SIMO Controller */ - .long SCA_IRQHandler /* 0x65 0x0194 101: SCA */ - .long AUDIO_IRQHandler /* 0x66 0x0198 102: Audio subsystem */ - .long FLC1_IRQHandler /* 0x67 0x019C 103: Flash Control 1 */ - .long RSV88_IRQHandler /* 0x68 0x01A0 104: UART 3 */ - .long RSV89_IRQHandler /* 0x69 0x01A4 105: UART 4 */ - .long RSV90_IRQHandler /* 0x6A 0x01A8 106: UART 5 */ - .long RSV91_IRQHandler /* 0x6B 0x01AC 107: Camera IF */ - .long RSV92_IRQHandler /* 0x6C 0x01B0 108: I3C */ - .long HTMR0_IRQHandler /* 0x6D 0x01B4 109: HTimer */ - .long HTMR1_IRQHandler /* 0x6E 0x01B8 109: HTimer */ - .thumb - .thumb_func - .align 2 - .globl Core1_Init - .type Core1_Init, %function -Reset_Handler_Core1: - ldr r0, =__StackTop_Core1 - mov sp, r0 - /* PreInit runs before any RAM initialization. Example usage: DDR setup, etc. */ - ldr r0, =PreInit_Core1 - blx r0 - - /* Perform system initialization after RAM initialization */ - - ldr r0, =SystemInit_Core1 - blx r0 - - /* Transfer control to users main program */ - ldr r0, =Core1_Main - blx r0 - -.SPINC1: - /* spin if main ever returns. */ - bl .SPINC1 diff --git a/Libraries/PeriphDrivers/max32665_files.mk b/Libraries/PeriphDrivers/max32665_files.mk index 6fd23ac4474..adc2071243f 100644 --- a/Libraries/PeriphDrivers/max32665_files.mk +++ b/Libraries/PeriphDrivers/max32665_files.mk @@ -57,10 +57,6 @@ PERIPH_DRIVER_INCLUDE_DIR += $(SOURCE_DIR)/ADC PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/ADC/adc_me14.c PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/ADC/adc_reva.c -PERIPH_DRIVER_INCLUDE_DIR += $(SOURCE_DIR)/CORE1 -PERIPH_DRIVER_A_FILES += $(SOURCE_DIR)/CORE1/startup_core1.S -PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/CORE1/system_core1.c - PERIPH_DRIVER_INCLUDE_DIR += $(SOURCE_DIR)/DMA PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/DMA/dma_me14.c PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/DMA/dma_reva.c