diff --git a/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h b/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h
index 370041103f..0707baef0e 100644
--- a/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h
+++ b/Libraries/PeriphDrivers/Include/MAX32675/mxc_pins.h
@@ -44,6 +44,7 @@ extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow;
 extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable;
 extern const mxc_gpio_cfg_t gpio_cfg_uart1;
 extern const mxc_gpio_cfg_t gpio_cfg_uart1_flow;
+extern const mxc_gpio_cfg_t hart_gpio_cfg_uart2;
 extern const mxc_gpio_cfg_t gpio_cfg_uart2;
 extern const mxc_gpio_cfg_t gpio_cfg_uart2_flow;
 extern const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable;
diff --git a/Libraries/PeriphDrivers/Source/AFE/hart_uart.c b/Libraries/PeriphDrivers/Source/AFE/hart_uart.c
index c1782bae8e..804625bfc0 100644
--- a/Libraries/PeriphDrivers/Source/AFE/hart_uart.c
+++ b/Libraries/PeriphDrivers/Source/AFE/hart_uart.c
@@ -198,7 +198,7 @@ static int hart_uart_init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo
         break;
 
     case 2:
-        MXC_AFE_GPIO_Config(&gpio_cfg_uart2);
+        MXC_AFE_GPIO_Config(&hart_gpio_cfg_uart2);
         MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_UART2);
         break;
 
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me16.c b/Libraries/PeriphDrivers/Source/SYS/pins_me16.c
index 5a897c9863..8b830a76d8 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me16.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me16.c
@@ -55,6 +55,10 @@ const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_G
 const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_IN,
                                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
+// NOTE: UART2 mapping B is tied to HART modem in the AFE and cannot be moved.
+const mxc_gpio_cfg_t hart_gpio_cfg_uart2 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT2,
+                                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
 const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT1,
                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO1, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,