diff --git a/Libraries/PeriphDrivers/Include/MAX32670/uart.h b/Libraries/PeriphDrivers/Include/MAX32670/uart.h index e436ebdf92..36349f6509 100644 --- a/Libraries/PeriphDrivers/Include/MAX32670/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32670/uart.h @@ -86,6 +86,7 @@ typedef enum { /*32K (ERTCO) and INRO clocks can only be used for UART3*/ MXC_UART_ERTCO_CLK = 4, MXC_UART_INRO_CLK = 5, + MXC_UART_AOD_CLK = 6 } mxc_uart_clock_t; /** diff --git a/Libraries/PeriphDrivers/Include/MAX32672/uart.h b/Libraries/PeriphDrivers/Include/MAX32672/uart.h index ba1c9893e4..620c36ea45 100644 --- a/Libraries/PeriphDrivers/Include/MAX32672/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32672/uart.h @@ -86,6 +86,7 @@ typedef enum { /*32K (ERTCO) and 80K (INRO) clocks can only be used for UART3*/ MXC_UART_ERTCO_CLK = 4, MXC_UART_INRO_CLK = 5, + MXC_UART_AOD_CLK = 6 } mxc_uart_clock_t; /** diff --git a/Libraries/PeriphDrivers/Include/MAX32675/uart.h b/Libraries/PeriphDrivers/Include/MAX32675/uart.h index 00317e5e0f..179874901c 100644 --- a/Libraries/PeriphDrivers/Include/MAX32675/uart.h +++ b/Libraries/PeriphDrivers/Include/MAX32675/uart.h @@ -84,7 +84,8 @@ typedef enum { MXC_UART_IBRO_CLK = 2, MXC_UART_ERFO_CLK = 3, /*32K (ERTCO) clock can only be used for UART3*/ - MXC_UART_ERTCO_CLK = 4, + MXC_UART_AOD_CLK = 4, + MXC_UART_INRO_CLK = 5 } mxc_uart_clock_t; /** diff --git a/Libraries/PeriphDrivers/Source/AFE/hart_uart.c b/Libraries/PeriphDrivers/Source/AFE/hart_uart.c index b167ab88ad..ed1533ae0d 100644 --- a/Libraries/PeriphDrivers/Source/AFE/hart_uart.c +++ b/Libraries/PeriphDrivers/Source/AFE/hart_uart.c @@ -173,9 +173,11 @@ static int hart_uart_init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo MXC_AFE_GPIO_Config(&gpio_cfg_extclk); break; +#if TARGET_NUM != 32675 case MXC_UART_ERTCO_CLK: return E_BAD_PARAM; break; +#endif case MXC_UART_IBRO_CLK: MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO); diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me15.c b/Libraries/PeriphDrivers/Source/UART/uart_me15.c index ec12f57999..1d322784af 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me15.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me15.c @@ -18,6 +18,7 @@ * ******************************************************************************/ +#include #include "uart.h" #include "mxc_device.h" #include "mxc_pins.h" @@ -110,6 +111,10 @@ int MXC_UART_Init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clo } #endif // MSDK_NO_GPIO_CLK_INIT + retval = MXC_UART_SetClockSource(uart, clock); + if (retval) + return retval; + return MXC_UART_RevB_Init((mxc_uart_revb_regs_t *)uart, baud, clock); } @@ -153,73 +158,78 @@ int MXC_UART_ReadyForSleep(mxc_uart_regs_t *uart) int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clock) { int freq; - int mod = 0; - int clkdiv = 0; - int div = 8; + uint32_t clock_freq = 0; + uint8_t aon_clk_div; if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - // check if the uart is LPUART - if (uart == MXC_UART3) { - // OSR default value - uart->osr = 5; + // Default OSR default value + uart->osr = 5; - switch (clock) { - case MXC_UART_APB_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_PERIPHERAL_CLOCK; - div = (1 << (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIV_AON_CLKDIV)) * 8; - clkdiv = ((SystemCoreClock / div) / baud); - mod = ((SystemCoreClock / div) % baud); - break; + switch (clock) { + case MXC_UART_APB_CLK: + clock_freq = PeripheralClock; + break; + case MXC_UART_EXT_CLK: + clock_freq = EXTCLK_FREQ; + break; + case MXC_UART_IBRO_CLK: + clock_freq = IBRO_FREQ; - case MXC_UART_EXT_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_EXTERNAL_CLOCK; - clkdiv = EXTCLK_FREQ / baud; - mod = EXTCLK_FREQ % baud; - break; + if (baud > 2400) { + uart->osr = 0; + } else { + uart->osr = 1; + } - case MXC_UART_ERTCO_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_CLK2; - uart->ctrl |= MXC_F_UART_CTRL_FDM; - clkdiv = ((ERTCO_FREQ * 2) / baud); - mod = ((ERTCO_FREQ * 2) % baud); - - if (baud > 2400) { - uart->osr = 0; - } else { - uart->osr = 1; - } - break; + break; - case MXC_UART_INRO_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_CLK3; - uart->ctrl |= MXC_F_UART_CTRL_FDM; - clkdiv = ((INRO_FREQ * 2) / baud); - mod = ((INRO_FREQ * 2) % baud); - - if (baud > 2400) { - uart->osr = 0; - } else { - uart->osr = 1; - } - break; + case MXC_UART_ERFO_CLK: + clock_freq = ERFO_FREQ; + break; - default: - return E_BAD_PARAM; + case MXC_UART_ERTCO_CLK: + clock_freq = ERTCO_FREQ; + uart->ctrl |= MXC_F_UART_CTRL_FDM; + + if (baud > 2400) { + uart->osr = 0; + } else { + uart->osr = 1; } - if (!clkdiv || mod > (baud / 2)) { - clkdiv++; + break; + + case MXC_UART_INRO_CLK: + clock_freq = INRO_FREQ; + uart->ctrl |= MXC_F_UART_CTRL_FDM; + + if (baud > 2400) { + uart->osr = 0; + } else { + uart->osr = 1; } - uart->clkdiv = clkdiv; - freq = MXC_UART_GetFrequency(uart); - } else { - freq = MXC_UART_RevB_SetFrequency((mxc_uart_revb_regs_t *)uart, baud, clock); + break; + + case MXC_UART_AOD_CLK: + aon_clk_div = (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIV_AON_CLKDIV) >> + MXC_F_GCR_PCLKDIV_AON_CLKDIV_POS; + clock_freq = PeripheralClock / (4 * (pow(2, aon_clk_div))); + break; + + default: + return E_BAD_PARAM; + } + + if (uart->ctrl & MXC_F_UART_CTRL_FDM) { + clock_freq *= 2; // x2 to account for FDM } + freq = MXC_UART_RevB_SetFrequency((mxc_uart_revb_regs_t *)uart, clock_freq, baud); + if (freq > 0) { // Enable baud clock and wait for it to become ready. uart->ctrl |= MXC_F_UART_CTRL_BCLKEN; @@ -325,7 +335,51 @@ int MXC_UART_SetFlowCtrl(mxc_uart_regs_t *uart, mxc_uart_flow_t flowCtrl, int rt int MXC_UART_SetClockSource(mxc_uart_regs_t *uart, mxc_uart_clock_t clock) { - return MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, clock); + uint8_t clock_option = 0; + + switch (MXC_UART_GET_IDX(uart)) { + case 0: + case 1: + case 2: + switch (clock) { + case MXC_UART_APB_CLK: + clock_option = 0; + break; + case MXC_UART_EXT_CLK: + clock_option = 1; + break; + case MXC_UART_IBRO_CLK: + MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO); + clock_option = 2; + break; + case MXC_UART_ERFO_CLK: + MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERFO); + clock_option = 3; + break; + default: + return E_BAD_PARAM; + } + break; + case 3: + switch (clock) { + case MXC_UART_AOD_CLK: + clock_option = 0; + break; + case MXC_UART_EXT_CLK: + clock_option = 1; + break; + case MXC_UART_ERTCO_CLK: + clock_option = 2; + break; + case MXC_UART_INRO_CLK: + clock_option = 3; + break; + default: + return E_BAD_PARAM; + } + } + + return MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, clock_option); } int MXC_UART_GetActive(mxc_uart_regs_t *uart) diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me16.c b/Libraries/PeriphDrivers/Source/UART/uart_me16.c index 0390362810..b2fda9f9b1 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me16.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me16.c @@ -21,6 +21,7 @@ #pragma diag_suppress 68 // integer conversion resulted in a change of sign #endif +#include #include "uart.h" #include "mxc_device.h" #include "mxc_pins.h" @@ -60,11 +61,6 @@ int MXC_UART_Init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clo MXC_GPIO_Config(&gpio_cfg_extclk); break; - case MXC_UART_ERTCO_CLK: - // UART0 and UART2 doesn't use ERTCO - return E_BAD_PARAM; - break; - case MXC_UART_IBRO_CLK: MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO); break; @@ -73,6 +69,10 @@ int MXC_UART_Init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clo MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERFO); break; + case MXC_UART_INRO_CLK: + MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_INRO); + break; + default: break; } @@ -97,6 +97,10 @@ int MXC_UART_Init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clo } #endif // MSDK_NO_GPIO_CLK_INIT + retval = MXC_UART_SetClockSource(uart, clock); + if (retval) + return retval; + return MXC_UART_RevB_Init((mxc_uart_revb_regs_t *)uart, baud, (mxc_uart_revb_clock_t)clock); } @@ -128,61 +132,58 @@ int MXC_UART_ReadyForSleep(mxc_uart_regs_t *uart) int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clock) { int freq; - int mod = 0; - int clkdiv = 0; - int div = 8; + uint32_t clock_freq = 0; + uint32_t aon_clk_div = 0; if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - // check if the uart is LPUART - if (uart == MXC_UART3) { - // OSR default value - uart->osr = 5; - - switch (clock) { - case MXC_UART_APB_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_PERIPHERAL_CLOCK; - div = (1 << (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIV_AON_CLKDIV)) * 8; - clkdiv = ((SystemCoreClock / div) / baud); - mod = ((SystemCoreClock / div) % baud); - break; - - case MXC_UART_EXT_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_EXTERNAL_CLOCK; - clkdiv = EXTCLK_FREQ / baud; - mod = EXTCLK_FREQ % baud; - break; + // Default OSR default value + uart->osr = 5; - case MXC_UART_ERTCO_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_CLK2; - uart->ctrl |= MXC_F_UART_CTRL_FDM; - clkdiv = ((ERTCO_FREQ * 2) / baud); - mod = ((ERTCO_FREQ * 2) % baud); - - if (baud > 2400) { - uart->osr = 0; - } else { - uart->osr = 1; - } - break; + switch (clock) { + case MXC_UART_APB_CLK: + clock_freq = PeripheralClock; + break; + case MXC_UART_EXT_CLK: + clock_freq = EXTCLK_FREQ; + case MXC_UART_IBRO_CLK: + clock_freq = IBRO_FREQ; + uart->ctrl |= MXC_F_UART_CTRL_FDM; - default: - return E_BAD_PARAM; + if (baud > 2400) { + uart->osr = 0; + } else { + uart->osr = 1; } - - if (!clkdiv || mod > (baud / 2)) { - clkdiv++; + break; + case MXC_UART_ERFO_CLK: + clock_freq = ERFO_FREQ; + break; + case MXC_UART_AOD_CLK: + aon_clk_div = (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIV_AON_CLKDIV) >> + MXC_F_GCR_PCLKDIV_AON_CLKDIV_POS; + clock_freq = PeripheralClock / (4 * (pow(2, aon_clk_div))); + break; + case MXC_UART_INRO_CLK: + clock_freq = INRO_FREQ; + uart->ctrl |= MXC_F_UART_CTRL_FDM; + if (baud > 2400) { + uart->osr = 0; + } else { + uart->osr = 1; } - uart->clkdiv = clkdiv; + default: + return E_BAD_PARAM; + } - freq = MXC_UART_GetFrequency(uart); - } else { - freq = MXC_UART_RevB_SetFrequency((mxc_uart_revb_regs_t *)uart, baud, - (mxc_uart_revb_clock_t)clock); + if (uart->ctrl & MXC_F_UART_CTRL_FDM) { + clock_freq *= 2; // x2 to account for FDM } + freq = MXC_UART_RevB_SetFrequency((mxc_uart_revb_regs_t *)uart, clock_freq, baud); + if (freq > 0) { // Enable baud clock and wait for it to become ready. uart->ctrl |= MXC_F_UART_CTRL_BCLKEN; @@ -209,8 +210,8 @@ int MXC_UART_GetFrequency(mxc_uart_regs_t *uart) MXC_S_UART_CTRL_BCLKSRC_PERIPHERAL_CLOCK) { div = (1 << (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIV_AON_CLKDIV)) * 8; periphClock = SystemCoreClock / div; - } else if ((uart->ctrl & MXC_F_UART_CTRL_BCLKSRC) == MXC_S_UART_CTRL_BCLKSRC_CLK2) { - periphClock = ERTCO_FREQ * 2; + } else if ((uart->ctrl & MXC_F_UART_CTRL_BCLKSRC) == MXC_S_UART_CTRL_BCLKSRC_CLK3) { + periphClock = INRO_FREQ * 2; } else { return E_BAD_PARAM; } @@ -270,7 +271,51 @@ int MXC_UART_SetFlowCtrl(mxc_uart_regs_t *uart, mxc_uart_flow_t flowCtrl, int rt int MXC_UART_SetClockSource(mxc_uart_regs_t *uart, mxc_uart_clock_t clock) { - return MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, (mxc_uart_revb_clock_t)clock); + uint8_t clock_option = 0; + + switch (MXC_UART_GET_IDX(uart)) { + case 0: + case 1: + case 2: + switch (clock) { + case MXC_UART_APB_CLK: + clock_option = 0; + break; + case MXC_UART_EXT_CLK: + clock_option = 1; + break; + case MXC_UART_IBRO_CLK: + MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO); + clock_option = 2; + break; + case MXC_UART_ERFO_CLK: + MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERFO); + clock_option = 3; + break; + default: + return E_BAD_PARAM; + } + break; + case 3: + switch (clock) { + case MXC_UART_AOD_CLK: + clock_option = 0; + break; + case MXC_UART_EXT_CLK: + clock_option = 1; + break; + case MXC_UART_INRO_CLK: + clock_option = 3; + break; + default: + return E_BAD_PARAM; + } + break; + default: + return E_BAD_PARAM; + } + + return MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, clock_option); } int MXC_UART_GetActive(mxc_uart_regs_t *uart) diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me21.c b/Libraries/PeriphDrivers/Source/UART/uart_me21.c index d4bbfc5458..47b5246612 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me21.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me21.c @@ -18,6 +18,7 @@ * ******************************************************************************/ +#include #include "uart.h" #include "mxc_device.h" #include "mxc_pins.h" @@ -147,6 +148,10 @@ int MXC_UART_Init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clo } #endif // MSDK_NO_GPIO_CLK_INIT + retval = MXC_UART_SetClockSource(uart, clock); + if (retval) + return retval; + return MXC_UART_RevB_Init((mxc_uart_revb_regs_t *)uart, baud, clock); } @@ -185,80 +190,63 @@ int MXC_UART_ReadyForSleep(mxc_uart_regs_t *uart) int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clock) { - int freq; - int mod = 0; - int clkdiv = 0; - int div = 8; + int freq = 0; + uint32_t clock_freq = 0; + uint8_t aon_clk_div = 0; if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; } - // check if the uart is LPUART - if (uart == MXC_UART3) { - // OSR default value - uart->osr = 5; - - switch (clock) { - case MXC_UART_APB_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_PERIPHERAL_CLOCK; - div = (1 << (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIV_AON_CLKDIV)) * 8; - clkdiv = (SystemCoreClock / div) / baud; - mod = (SystemCoreClock / div) % baud; - break; - - case MXC_UART_EXT_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_EXTERNAL_CLOCK; - uart->ctrl |= MXC_F_UART_CTRL_FDM; - clkdiv = ((EXTCLK2_FREQ * 2) / baud); - mod = ((EXTCLK2_FREQ * 2) % baud); - break; - - case MXC_UART_ERTCO_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_CLK2; - uart->ctrl |= MXC_F_UART_CTRL_FDM; - if (baud == 9600) { - clkdiv = 7; - mod = 0; - } else { - clkdiv = ((ERTCO_FREQ * 2) / baud); - mod = ((ERTCO_FREQ * 2) % baud); - } - - if (baud > 2400) { - uart->osr = 0; - } else { - uart->osr = 1; - } - break; + // OSR default value + uart->osr = 5; - case MXC_UART_INRO_CLK: - uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_CLK3; - uart->ctrl |= MXC_F_UART_CTRL_FDM; - clkdiv = ((INRO_FREQ * 2) / baud); - mod = ((INRO_FREQ * 2) % baud); - - if (baud > 2400) { - uart->osr = 0; - } else { - uart->osr = 1; - } - break; + switch (clock) { + case MXC_UART_APB_CLK: + clock_freq = PeripheralClock; + break; + case MXC_UART_EXT_CLK: + uart->ctrl |= MXC_F_UART_CTRL_FDM; + clock_freq = EXTCLK_FREQ; + break; + case MXC_UART_IBRO_CLK: + clock_freq = IBRO_FREQ; + break; + case MXC_UART_INRO_CLK: + uart->ctrl |= MXC_F_UART_CTRL_FDM; + clock_freq = INRO_FREQ; - default: - return E_BAD_PARAM; + if (baud > 2400) { + uart->osr = 0; + } else { + uart->osr = 1; } + break; + case MXC_UART_ERTCO_CLK: + uart->ctrl |= MXC_F_UART_CTRL_FDM; + clock_freq = ERTCO_FREQ; - if (!clkdiv || mod > (baud / 2)) { - clkdiv++; + if (baud > 2400) { + uart->osr = 0; + } else { + uart->osr = 1; } - uart->clkdiv = clkdiv; + break; + case MXC_UART_AOD_CLK: + aon_clk_div = (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIV_AON_CLKDIV) >> + MXC_F_GCR_PCLKDIV_AON_CLKDIV_POS; + clock_freq = PeripheralClock / (4 * (pow(2, aon_clk_div))); + break; + default: + return E_BAD_PARAM; + } - freq = MXC_UART_GetFrequency(uart); - } else { - freq = MXC_UART_RevB_SetFrequency((mxc_uart_revb_regs_t *)uart, baud, clock); + if (uart->ctrl & MXC_F_UART_CTRL_FDM) { + clock_freq *= 2; // x2 to account for FDM } + freq = MXC_UART_RevB_SetFrequency((mxc_uart_revb_regs_t *)uart, clock_freq, baud); + if (freq > 0) { // Enable baud clock and wait for it to become ready. uart->ctrl |= MXC_F_UART_CTRL_BCLKEN; @@ -364,7 +352,67 @@ int MXC_UART_SetFlowCtrl(mxc_uart_regs_t *uart, mxc_uart_flow_t flowCtrl, int rt int MXC_UART_SetClockSource(mxc_uart_regs_t *uart, mxc_uart_clock_t clock) { - return MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, clock); + int error = E_NO_ERROR; + uint8_t clock_option = 0; + + switch (MXC_UART_GET_IDX(uart)) { + case 0: + case 1: + case 2: + // UART0-2 support PCLK and IBRO + switch (clock) { + case MXC_UART_APB_CLK: + clock_option = 0; + break; + + case MXC_UART_EXT_CLK: + clock_option = 1; + break; + + case MXC_UART_IBRO_CLK: + error = MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO); + clock_option = 2; + break; + + default: + return E_BAD_PARAM; + } + break; + + case 3: + // UART3 (LPUART0) supports IBRO and ERTCO + switch (clock) { + case MXC_UART_AOD_CLK: + clock_option = 0; + break; + + case MXC_UART_EXT_CLK: + clock_option = 1; + break; + + case MXC_UART_INRO_CLK: + error = MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_INRO); + clock_option = 2; + break; + + case MXC_UART_ERTCO_CLK: + error = MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERTCO); + clock_option = 3; + break; + + default: + return E_BAD_PARAM; + } + break; + + default: + return E_BAD_PARAM; + } + + if (error) + return error; + + return MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, clock_option); } int MXC_UART_GetActive(mxc_uart_regs_t *uart) diff --git a/Libraries/PeriphDrivers/Source/UART/uart_me30.c b/Libraries/PeriphDrivers/Source/UART/uart_me30.c index 93725f415b..a54f77099d 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_me30.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_me30.c @@ -103,6 +103,7 @@ int MXC_UART_ReadyForSleep(mxc_uart_regs_t *uart) int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clock) { int freq; + uint32_t clock_freq = 0; if (MXC_UART_GET_IDX(uart) < 0) { return E_BAD_PARAM; @@ -112,7 +113,22 @@ int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo return E_BAD_PARAM; } - freq = MXC_UART_RevB_SetFrequency((mxc_uart_revb_regs_t *)uart, baud, clock); + switch (clock) { + case MXC_UART_APB_CLK: + clock_freq = PeripheralClock; + break; + case MXC_UART_IBRO_CLK: + clock_freq = IBRO_FREQ; + break; + case MXC_UART_ERTCO_CLK: + clock_freq = ERTCO_FREQ; + break; + default: + return E_BAD_PARAM; + } + + // TODO(JC): Update this call for ME30 + freq = MXC_UART_RevB_SetFrequency((mxc_uart_revb_regs_t *)uart, clock_freq, baud); if (freq > 0) { // Enable baud clock and wait for it to become ready. diff --git a/Libraries/PeriphDrivers/Source/UART/uart_revb.c b/Libraries/PeriphDrivers/Source/UART/uart_revb.c index b4dcd699af..03beef3442 100644 --- a/Libraries/PeriphDrivers/Source/UART/uart_revb.c +++ b/Libraries/PeriphDrivers/Source/UART/uart_revb.c @@ -291,19 +291,20 @@ int MXC_UART_RevB_SetClockSource(mxc_uart_revb_regs_t *uart, uint8_t clock_optio return E_NO_ERROR; // Return with no error so Init doesn't error out if clock config is locked } - bool is_bclk_enabled = (uart->ctrl & MXC_F_UART_CTRL_BCLKEN) != 0; + bool is_bclk_enabled = (uart->ctrl & MXC_F_UART_REVB_CTRL_BCLKEN) != 0; if (is_bclk_enabled) { // Shut down baud rate clock before changing clock source - uart->ctrl &= ~MXC_F_UART_CTRL_BCLKEN; + uart->ctrl &= ~MXC_F_UART_REVB_CTRL_BCLKEN; } - MXC_SETFIELD(uart->ctrl, MXC_F_UART_CTRL_BCLKSRC, clock_option << MXC_F_UART_CTRL_BCLKSRC_POS); + MXC_SETFIELD(uart->ctrl, MXC_F_UART_REVB_CTRL_BCLKSRC, + clock_option << MXC_F_UART_REVB_CTRL_BCLKSRC_POS); if (is_bclk_enabled) { // Turn the baud rate clock back on - uart->ctrl |= MXC_F_UART_CTRL_BCLKEN; - while (!(uart->ctrl & MXC_F_UART_CTRL_BCLKRDY)) { + uart->ctrl |= MXC_F_UART_REVB_CTRL_BCLKEN; + while (!(uart->ctrl & MXC_F_UART_REVB_CTRL_BCLKRDY)) { continue; } } @@ -313,7 +314,7 @@ int MXC_UART_RevB_SetClockSource(mxc_uart_revb_regs_t *uart, uint8_t clock_optio unsigned int MXC_UART_RevB_GetClockSource(mxc_uart_revb_regs_t *uart) { - return ((uart->ctrl & MXC_F_UART_CTRL_BCLKSRC) >> MXC_F_UART_CTRL_BCLKSRC_POS); + return ((uart->ctrl & MXC_F_UART_REVB_CTRL_BCLKSRC) >> MXC_F_UART_REVB_CTRL_BCLKSRC_POS); } void MXC_UART_RevB_LockClockSource(mxc_uart_revb_regs_t *uart, bool lock)