diff --git a/.github/workflows/clang-format-run-pr.yml b/.github/workflows/clang-format-run-pr.yml
index e68b9d8c4a..375d270082 100644
--- a/.github/workflows/clang-format-run-pr.yml
+++ b/.github/workflows/clang-format-run-pr.yml
@@ -56,6 +56,7 @@ jobs:
         repository: ${{ fromJSON(steps.get-pr.outputs.result).head.repo.full_name }}
         ref: ${{ fromJSON(steps.get-pr.outputs.result).head.ref }}
         fetch-depth: 0
+        token: ${{ secrets.GITHUB_CI_TOKEN }}
 
     - name: clang-format-run
       run: |
diff --git a/Examples/MAX32520/EEPROM_Emulator/include/cache.h b/Examples/MAX32520/EEPROM_Emulator/include/cache.h
index 9263b1016d..5812d2d8fa 100644
--- a/Examples/MAX32520/EEPROM_Emulator/include/cache.h
+++ b/Examples/MAX32520/EEPROM_Emulator/include/cache.h
@@ -31,8 +31,8 @@
  *
  ******************************************************************************/
 
-#ifndef EXAMPLES_MAX78000_EEPROM_EMULATOR_CACHE_H_
-#define EXAMPLES_MAX78000_EEPROM_EMULATOR_CACHE_H_
+#ifndef EXAMPLES_MAX32520_EEPROM_EMULATOR_INCLUDE_CACHE_H_
+#define EXAMPLES_MAX32520_EEPROM_EMULATOR_INCLUDE_CACHE_H_
 
 /***** Included Files *****/
 #include <stdbool.h>
@@ -79,4 +79,4 @@ int cache_refresh(cache_t *cache, uint32_t next_addr);
  */
 int cache_write_back(cache_t *cache);
 
-#endif // EXAMPLES_MAX78000_EEPROM_EMULATOR_CACHE_H_
+#endif // EXAMPLES_MAX32520_EEPROM_EMULATOR_INCLUDE_CACHE_H_
diff --git a/Examples/MAX32520/EEPROM_Emulator/include/eeprom.h b/Examples/MAX32520/EEPROM_Emulator/include/eeprom.h
index e4956f57a1..90c30df9e7 100644
--- a/Examples/MAX32520/EEPROM_Emulator/include/eeprom.h
+++ b/Examples/MAX32520/EEPROM_Emulator/include/eeprom.h
@@ -31,8 +31,8 @@
  *
  ******************************************************************************/
 
-#ifndef EXAMPLES_MAX78000_EEPROM_EMULATOR_EEPROM_H_
-#define EXAMPLES_MAX78000_EEPROM_EMULATOR_EEPROM_H_
+#ifndef EXAMPLES_MAX32520_EEPROM_EMULATOR_INCLUDE_EEPROM_H_
+#define EXAMPLES_MAX32520_EEPROM_EMULATOR_INCLUDE_EEPROM_H_
 
 /***** Included Files *****/
 #include <stdbool.h>
@@ -80,4 +80,4 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin);
  */
 void eeprom_prep_for_txn(void);
 
-#endif // EXAMPLES_MAX78000_EEPROM_EMULATOR_EEPROM_H_
+#endif // EXAMPLES_MAX32520_EEPROM_EMULATOR_INCLUDE_EEPROM_H_
diff --git a/Examples/MAX32520/EEPROM_Emulator/src/eeprom.c b/Examples/MAX32520/EEPROM_Emulator/src/eeprom.c
index b85a5c7745..56a2d40829 100644
--- a/Examples/MAX32520/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX32520/EEPROM_Emulator/src/eeprom.c
@@ -103,6 +103,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX32520/GPIO/main.c b/Examples/MAX32520/GPIO/main.c
index dea17b5384..6146640202 100644
--- a/Examples/MAX32520/GPIO/main.c
+++ b/Examples/MAX32520/GPIO/main.c
@@ -84,6 +84,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -96,6 +97,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_isr, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -111,6 +113,8 @@ int main(void)
     gpio_in.mask = MXC_GPIO_PIN_IN;
     gpio_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_in.func = MXC_GPIO_FUNC_IN;
+    gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -118,6 +122,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32520/Library_Generate/gpiolib.c b/Examples/MAX32520/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32520/Library_Generate/gpiolib.c
+++ b/Examples/MAX32520/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32520/Library_Generate/gpiolib.h b/Examples/MAX32520/Library_Generate/gpiolib.h
index 9fd4bee5ba..2f39aa4885 100644
--- a/Examples/MAX32520/Library_Generate/gpiolib.h
+++ b/Examples/MAX32520/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32520_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32520_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32520_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32520/Library_Use/lib/include/gpiolib.h b/Examples/MAX32520/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..31e4d7614c 100644
--- a/Examples/MAX32520/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32520/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32520_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32520_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32520_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX32572/GPIO/main.c b/Examples/MAX32572/GPIO/main.c
index d5b1ec01e5..d05a1919d6 100644
--- a/Examples/MAX32572/GPIO/main.c
+++ b/Examples/MAX32572/GPIO/main.c
@@ -83,6 +83,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -95,6 +96,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_isr, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -110,7 +112,8 @@ int main(void)
     gpio_in.mask = MXC_GPIO_PIN_IN;
     gpio_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_in.func = MXC_GPIO_FUNC_IN;
-    gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -118,7 +121,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
-    gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32572/I2C/README.md b/Examples/MAX32572/I2C/README.md
index 8ec191b567..ff6ccb592a 100644
--- a/Examples/MAX32572/I2C/README.md
+++ b/Examples/MAX32572/I2C/README.md
@@ -22,7 +22,7 @@ Universal instructions on building, flashing, and debugging this project can be
 
 ## Expected Output
 ```
-******** I2C SLAVE ASYNC TRANSACTION TEST *********
+******** I2C Master-Slave Transaction Demo *********
 
 This example uses one I2C peripheral as a master to
 read and write to another I2C which acts as a slave.
@@ -37,9 +37,9 @@ P2.19 to P0.7 (SDA).
 
 -->Result:
 
--->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
--->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
 
 -->I2C Transaction Successful
diff --git a/Examples/MAX32572/I2C/main.c b/Examples/MAX32572/I2C/main.c
index 014af8e224..7f904c2cde 100644
--- a/Examples/MAX32572/I2C/main.c
+++ b/Examples/MAX32572/I2C/main.c
@@ -33,10 +33,10 @@
 
 /**
  * @file        main.c
- * @brief       I2C Loopback Example
+ * @brief       I2C Master-Slave Transaction Demo
  * @details     This example uses the I2C Master to read/write from/to the I2C Slave. For
- *              this example you must connect P0.6 to P0.14 (SDA) and P0.7 to P0.15 (SCL). The Master
- *              will use P0.6 and P0.7. The Slave will use P0.14 and P0.15. You must also
+ *              this example you must connect P0.6 to P0.18 (SDA) and P0.7 to P0.19 (SCL). The Master
+ *              will use P0.6 and P0.7. The Slave will use P0.18 and P0.19. You must also
  *              connect the pull-up jumpers (JP23 and JP24) to the proper I/O voltage.
  *              Refer to JP27 to determine the I/O voltage.
  * @note        Other devices on the EvKit will be using the same bus. This example cannot be combined with
@@ -44,14 +44,21 @@
  */
 
 /***** Includes *****/
+
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
-
-#include <MAX32xxx.h>
+#include "mxc_device.h"
+#include "mxc_delay.h"
+#include "mxc_errors.h"
+#include "nvic_table.h"
+#include "i2c.h"
+#include "dma.h"
+#include "led.h"
 
 /***** Definitions *****/
-// #define MASTERDMA
+
+#define MASTERDMA //Comment this line out if standard I2C transaction is required
 
 #define I2C_MASTER MXC_I2C1
 #define I2C_SLAVE MXC_I2C2
@@ -60,14 +67,14 @@
 #define I2C_SLAVE_ADDR (0x51)
 #define I2C_BYTES 255
 
-typedef enum { FAILED, PASSED } test_t;
-
 /***** Globals *****/
+
 static uint8_t Stxdata[I2C_BYTES];
 static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA_TX_CH;
+int8_t DMA_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
@@ -79,28 +86,22 @@ volatile int rxnum = 0;
 void I2C2_IRQHandler(void)
 {
     MXC_I2C_AsyncHandler(I2C_SLAVE);
-    return;
 }
 
-void DMA0_IRQHandler(void)
+void DMA_TX_IRQHandler(void)
 {
     MXC_DMA_Handler();
-    MXC_DMA_ReleaseChannel(0);
-    DMA_FLAG = 1;
 }
 
-void DMA1_IRQHandler(void)
+void DMA_RX_IRQHandler(void)
 {
     MXC_DMA_Handler();
-    MXC_DMA_ReleaseChannel(1);
-    DMA_FLAG = 1;
 }
 
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
     I2C_FLAG = error;
-    return;
 }
 
 int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
@@ -113,28 +114,23 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         break;
 
     case MXC_I2C_EVT_MASTER_RD:
-
         // Serve as a 16 byte loopback, returning data*2
-        for (int i = 0; i < I2C_BYTES; i++) {
-            Stxdata[i] = i;
-        }
-
         txnum = I2C_BYTES;
         txcnt = 0;
-        i2c->int_fl0 = MXC_F_I2C_INT_FL0_TX_LOCK_OUT | MXC_F_I2C_INT_FL0_ADDR_MATCH;
+        i2c->intfl0 = MXC_F_I2C_INTFL0_TX_LOCKOUT | MXC_F_I2C_INTFL0_ADDR_MATCH;
         break;
 
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
         rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
         if (rxnum == I2C_BYTES) {
-            i2c->int_en0 |= MXC_F_I2C_INT_EN0_ADDR_MATCH;
+            i2c->inten0 |= MXC_F_I2C_INTEN0_ADDR_MATCH;
         }
+
         break;
 
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
-
         // Write as much data as possible into TX FIFO
         // Unless we're at the end of the transaction (only write what's needed)
         if (txcnt >= txnum) {
@@ -149,10 +145,11 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
     default:
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
-            printf("i2c->int_fl0 = 0x%08x\n", i2c->int_fl0);
-            printf("i2c->status  = 0x%08x\n", i2c->status);
+            printf("i2c->intfl0 = 0x%08x\n", i2c->intfl0);
+            printf("i2c->status = 0x%08x\n", i2c->status);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
             rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
@@ -167,6 +164,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
 
     for (i = 0; i < sizeof(txdata); ++i) {
@@ -185,7 +183,7 @@ void printData(void)
 }
 
 //Compare data to see if they are the same
-int verifyData()
+int verifyData(void)
 {
     int i, fails = 0;
 
@@ -196,16 +194,16 @@ int verifyData()
     }
 
     if (fails > 0) {
-        return FAILED;
-    } else {
-        return PASSED;
+        return E_FAIL;
     }
+
+    return E_NO_ERROR;
 }
 
 // *****************************************************************************
 int main()
 {
-    printf("\n******** I2C SLAVE ASYNC TRANSACTION TEST *********\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
     printf("\nThis example uses one I2C peripheral as a master to\n");
     printf("read and write to another I2C which acts as a slave.\n");
 
@@ -216,18 +214,27 @@ int main()
 
     //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
-
     if (error != E_NO_ERROR) {
         printf("Failed master\n");
         return FAILED;
     }
 
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA, true, true);
+    if (error != E_NO_ERROR) {
+        printf("Failed DMA master\n");
+        return error;
+    } else {
+        printf("\n-->I2C Master Initialization Complete");
+    }
+
     //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
-
     if (error != E_NO_ERROR) {
         printf("Failed slave\n");
         return FAILED;
+    } else {
+        printf("\n-->I2C Slave Initialization Complete");
     }
 
     NVIC_SetVector(I2C2_IRQn, I2C2_IRQHandler);
@@ -242,6 +249,8 @@ int main()
     for (i = 0; i < I2C_BYTES; i++) {
         txdata[i] = i;
         rxdata[i] = 0;
+        Stxdata[i] = i;
+        Srxdata[i] = 0;
     }
 
     // This will write data to slave
@@ -264,43 +273,42 @@ int main()
         return FAILED;
     }
 
-    MXC_DMA_ReleaseChannel(0);
-    MXC_DMA_ReleaseChannel(1);
-
 #ifdef MASTERDMA
-    NVIC_EnableIRQ(DMA0_IRQn);
-    NVIC_EnableIRQ(DMA1_IRQn);
-    __enable_irq();
+    DMA_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
+
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_TX_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_RX_CH), DMA_RX_IRQHandler);
 
     if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
-        return FAILED;
+        return error;
     }
-
-    while (DMA_FLAG == 0) {}
-
 #else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
-        return FAILED;
+        return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
 
-#endif
-
     printf("\n-->Result: \n");
-
     printData();
-
     printf("\n");
 
+    MXC_I2C_Shutdown(I2C_MASTER);
+    MXC_I2C_Shutdown(I2C_SLAVE);
+
     if (verifyData()) {
         printf("\n-->I2C Transaction Successful\n");
-        LED_On(0);
-        return 0;
     } else {
         printf("\n-->I2C Transaction Failed\n");
-        return -1;
+        return E_FAIL;
     }
+
+    return E_NO_ERROR;
 }
diff --git a/Examples/MAX32572/Library_Generate/gpiolib.c b/Examples/MAX32572/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32572/Library_Generate/gpiolib.c
+++ b/Examples/MAX32572/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32572/Library_Generate/gpiolib.h b/Examples/MAX32572/Library_Generate/gpiolib.h
index 9fd4bee5ba..2ee32b6501 100644
--- a/Examples/MAX32572/Library_Generate/gpiolib.h
+++ b/Examples/MAX32572/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32572_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32572_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32572_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32572/Library_Use/lib/include/gpiolib.h b/Examples/MAX32572/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..d82877e1df 100644
--- a/Examples/MAX32572/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32572/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32572_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32572_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif /* EXAMPLES_MAX32572_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_ */
diff --git a/Examples/MAX32650/EEPROM_Emulator/src/eeprom.c b/Examples/MAX32650/EEPROM_Emulator/src/eeprom.c
index 5898bbebb2..924c774a60 100644
--- a/Examples/MAX32650/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX32650/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX32650/GPIO/main.c b/Examples/MAX32650/GPIO/main.c
index 123974285a..179f868da1 100644
--- a/Examples/MAX32650/GPIO/main.c
+++ b/Examples/MAX32650/GPIO/main.c
@@ -102,6 +102,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -128,6 +129,8 @@ int main(void)
     gpio_in.mask = MXC_GPIO_PIN_IN;
     gpio_in.pad = MXC_GPIO_PAD_WEAK_PULL_UP;
     gpio_in.func = MXC_GPIO_FUNC_IN;
+    gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -135,6 +138,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32650/I2C/README.md b/Examples/MAX32650/I2C/README.md
index e911c74ee0..fc6b43a111 100644
--- a/Examples/MAX32650/I2C/README.md
+++ b/Examples/MAX32650/I2C/README.md
@@ -21,13 +21,16 @@ Universal instructions on building, flashing, and debugging this project can be
 
 ## Expected Output
 ```
-***** I2C Loopback Example *****
-This example uses one I2C peripheral as a master
-to read and write to another I2C which acts as a slave.
+******** I2C Master-Slave Transaction Demo *********
+
+This example uses one I2C peripheral as a master to
+read and write to another I2C which acts as a slave.
 
 You will need to connect P2.7 to P2.17 (SDA) and
 P2.8 to P2.18 (SCL).
 
+-->I2C Master Initialization Complete
+-->I2C Slave Initialization Complete
 
 -->Writing data to slave, and reading the data back
 
diff --git a/Examples/MAX32650/I2C/main.c b/Examples/MAX32650/I2C/main.c
index ab2f02d5e6..5fdfef5c64 100644
--- a/Examples/MAX32650/I2C/main.c
+++ b/Examples/MAX32650/I2C/main.c
@@ -33,7 +33,7 @@
 
 /**
  * @file        main.c
- * @brief       I2C Loopback Example
+ * @brief       I2C Master-Slave Transaction Demo
  * @details     This example uses the I2C Master to read/write from/to the I2C Slave. 
  *              For this example, user must connect I2C Master SCL pin to I2C Slave SCL 
  *              pin and I2C Master SDA pin to I2C Slave SDA pin. User must also connect
@@ -45,6 +45,7 @@
  */
 
 /***** Includes *****/
+
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
@@ -55,7 +56,8 @@
 #include "dma.h"
 
 /***** Definitions *****/
-// #define MASTERDMA
+
+#define MASTERDMA //Comment this line out if standard I2C transaction is required
 
 #define I2C_MASTER MXC_I2C0
 #define I2C_SLAVE MXC_I2C1
@@ -65,11 +67,13 @@
 #define I2C_BYTES 255
 
 /***** Globals *****/
+
 static uint8_t Stxdata[I2C_BYTES];
 static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA_TX_CH;
+int8_t DMA_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
@@ -81,28 +85,22 @@ volatile int rxnum = 0;
 void I2C1_IRQHandler(void)
 {
     MXC_I2C_AsyncHandler(I2C_SLAVE);
-    return;
 }
 
-void DMA0_IRQHandler(void)
+void DMA_TX_IRQHandler(void)
 {
     MXC_DMA_Handler();
-    MXC_DMA_ReleaseChannel(0);
-    DMA_FLAG = 1;
 }
 
-void DMA1_IRQHandler(void)
+void DMA_RX_IRQHandler(void)
 {
     MXC_DMA_Handler();
-    MXC_DMA_ReleaseChannel(1);
-    DMA_FLAG = 1;
 }
 
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
     I2C_FLAG = error;
-    return;
 }
 
 int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
@@ -113,19 +111,23 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         // Clear bytes written
         rxnum = 0;
         break;
+
     case MXC_I2C_EVT_MASTER_RD:
         // Serve as a 16 byte loopback, returning data*2
-        for (int i = 0; i < I2C_BYTES; i++) {
-            Stxdata[i] = Srxdata[i];
-        }
         txnum = I2C_BYTES;
         txcnt = 0;
         i2c->int_fl0 = MXC_F_I2C_INT_FL0_TXLOI | MXC_F_I2C_INT_FL0_AMI;
         break;
+
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
         rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
+        if (rxnum == I2C_BYTES) {
+            i2c->int_en0 |= MXC_F_I2C_INT_EN0_AMIE;
+        }
+
         break;
+
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
         // Write as much data as possible into TX FIFO
@@ -133,23 +135,27 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         if (txcnt >= txnum) {
             break;
         }
+
         int num = MXC_I2C_GetTXFIFOAvailable(i2c);
         num = (num > (txnum - txcnt)) ? (txnum - txcnt) : num;
         txcnt += MXC_I2C_WriteTXFIFO(i2c, &Stxdata[txcnt], num);
         break;
+
     default:
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
             printf("i2c->int_fl0 = 0x%08x\n", i2c->int_fl0);
-            printf("i2c->status  = 0x%08x\n", i2c->stat);
+            printf("i2c->stat    = 0x%08x\n", i2c->stat);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
             rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
             return 1;
         }
     }
+
     return 0;
 }
 
@@ -157,12 +163,15 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
+
     for (i = 0; i < sizeof(txdata); ++i) {
         printf("%02x ", txdata[i]);
     }
 
     printf("\n\n-->RxData: ");
+
     for (i = 0; i < sizeof(rxdata); ++i) {
         printf("%02x ", rxdata[i]);
     }
@@ -176,6 +185,7 @@ void printData(void)
 int verifyData(void)
 {
     int i, fails = 0;
+
     for (i = 0; i < I2C_BYTES; ++i) {
         if (txdata[i] != rxdata[i]) {
             ++fails;
@@ -192,9 +202,10 @@ int verifyData(void)
 // *****************************************************************************
 int main()
 {
-    printf("\n***** I2C Loopback Example *****\n");
-    printf("This example uses one I2C peripheral as a master\n");
-    printf("to read and write to another I2C which acts as a slave.\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
+    printf("\nThis example uses one I2C peripheral as a master to\n");
+    printf("read and write to another I2C which acts as a slave.\n");
+
     printf("\nYou will need to connect P2.7 to P2.17 (SDA) and\n");
     printf("P2.8 to P2.18 (SCL).\n");
 
@@ -203,17 +214,30 @@ int main()
     //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
     if (error != E_NO_ERROR) {
-        printf("Failed to initialize master.\n");
+        printf("Failed master.\n");
+        return error;
+    }
+
+#ifdef MASTERDMA
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA, true, true);
+    if (error != E_NO_ERROR) {
+        printf("Failed DMA master\n");
         return error;
     }
+#endif
+
+    printf("\n-->I2C Master Initialization Complete");
 
     //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
     if (error != E_NO_ERROR) {
-        printf("Failed to initialize slave.\n");
+        printf("Failed slave\n");
         return error;
     }
 
+    printf("\n-->I2C Slave Initialization Complete");
+
     MXC_NVIC_SetVector(I2C1_IRQn, I2C1_IRQHandler);
     NVIC_EnableIRQ(I2C1_IRQn);
     __enable_irq();
@@ -226,6 +250,8 @@ int main()
     for (i = 0; i < I2C_BYTES; i++) {
         txdata[i] = i;
         rxdata[i] = 0;
+        Stxdata[i] = i;
+        Srxdata[i] = 0;
     }
 
     // This will write data to slave
@@ -249,31 +275,35 @@ int main()
     }
 
 #ifdef MASTERDMA
-    MXC_DMA_ReleaseChannel(0);
-    MXC_DMA_ReleaseChannel(1);
+    DMA_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
 
-    NVIC_EnableIRQ(DMA0_IRQn);
-    NVIC_EnableIRQ(DMA1_IRQn);
-    __enable_irq();
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_TX_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_RX_CH), DMA_RX_IRQHandler);
 
     if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
-    while (DMA_FLAG == 0) {}
 #else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
-#endif
 
     printf("\n-->Result: \n");
     printData();
     printf("\n");
 
+    MXC_I2C_Shutdown(I2C_MASTER);
+    MXC_I2C_Shutdown(I2C_SLAVE);
+
     if (verifyData() == E_NO_ERROR) {
         printf("\n-->I2C Transaction Successful\n");
     } else {
diff --git a/Examples/MAX32650/Library_Generate/gpiolib.c b/Examples/MAX32650/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32650/Library_Generate/gpiolib.c
+++ b/Examples/MAX32650/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32650/Library_Generate/gpiolib.h b/Examples/MAX32650/Library_Generate/gpiolib.h
index 9fd4bee5ba..2c77d1b836 100644
--- a/Examples/MAX32650/Library_Generate/gpiolib.h
+++ b/Examples/MAX32650/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32650_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32650_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32650_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32650/Library_Use/lib/include/gpiolib.h b/Examples/MAX32650/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..85c4b6416c 100644
--- a/Examples/MAX32650/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32650/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32650_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32650_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32650_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX32655/EEPROM_Emulator/src/eeprom.c b/Examples/MAX32655/EEPROM_Emulator/src/eeprom.c
index aa96c0e58a..38e3748ac2 100644
--- a/Examples/MAX32655/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX32655/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX32655/GPIO/main.c b/Examples/MAX32655/GPIO/main.c
index 466fb09e28..3fc4f348a9 100644
--- a/Examples/MAX32655/GPIO/main.c
+++ b/Examples/MAX32655/GPIO/main.c
@@ -111,6 +111,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -123,6 +124,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_isr, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -139,6 +141,7 @@ int main(void)
     gpio_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_in.func = MXC_GPIO_FUNC_IN;
     gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -146,7 +149,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
-    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32655/I2C/README.md b/Examples/MAX32655/I2C/README.md
index 8fd647fe1d..0732ea4322 100644
--- a/Examples/MAX32655/I2C/README.md
+++ b/Examples/MAX32655/I2C/README.md
@@ -31,7 +31,7 @@ If using the MAX32655EVKIT (EvKit_V1):
 The Console UART of the device will output these messages:
 
 ```
-******** I2C SLAVE ASYNC TRANSACTION TEST *********
+******** I2C Master-Slave Transaction Demo *********
 
 This example uses one I2C peripheral as a master to
 read and write to another I2C which acts as a slave.
@@ -46,9 +46,9 @@ P0.11 to P0.17 (SDA).
 
 -->Result:
 
--->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
--->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
 
 -->I2C Transaction Successful
diff --git a/Examples/MAX32655/I2C/main.c b/Examples/MAX32655/I2C/main.c
index 13e1424e0f..12225190d4 100644
--- a/Examples/MAX32655/I2C/main.c
+++ b/Examples/MAX32655/I2C/main.c
@@ -33,7 +33,7 @@
 
 /**
  * @file        main.c
- * @brief       I2C Loopback Example
+ * @brief       I2C Master-Slave Transaction Demo
  * @details     This example uses the I2C Master to read/write from/to the I2C Slave. For
  *              this example you must connect P0.10 to P0.16 (SCL) and P0.11 to P0.17 (SDA). The Master
  *              will use P0.10 and P0.11. The Slave will use P0.16 and P0.17. You must also
@@ -41,6 +41,7 @@
  */
 
 /***** Includes *****/
+
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
@@ -51,38 +52,51 @@
 #include "dma.h"
 
 /***** Definitions *****/
+
+#define MASTERDMA //Comment this line out if standard I2C transaction is required
+
 #define I2C_MASTER MXC_I2C1
 #define I2C_SLAVE MXC_I2C0
 
 #define I2C_FREQ 100000
 #define I2C_SLAVE_ADDR (0x51)
-#define I2C_BYTES 100
+#define I2C_BYTES 255
 
 /***** Globals *****/
+
 static uint8_t Stxdata[I2C_BYTES];
 static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA_TX_CH;
+int8_t DMA_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
 volatile int rxnum = 0;
-volatile int num;
+
 /***** Functions *****/
 
 //Slave interrupt handler
 void I2C0_IRQHandler(void)
 {
     MXC_I2C_AsyncHandler(I2C_SLAVE);
-    return;
+}
+
+void DMA_TX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
+}
+
+void DMA_RX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
 }
 
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
     I2C_FLAG = error;
-    return;
 }
 
 int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
@@ -95,12 +109,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         break;
 
     case MXC_I2C_EVT_MASTER_RD:
-
         // Serve as a 16 byte loopback, returning data*2
-        for (int i = 0; i < I2C_BYTES; i++) {
-            Stxdata[i] = Srxdata[i];
-        }
-
         txnum = I2C_BYTES;
         txcnt = 0;
         i2c->intfl0 = MXC_F_I2C_INTFL0_TX_LOCKOUT | MXC_F_I2C_INTFL0_ADDR_MATCH;
@@ -109,7 +118,6 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
         rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
-
         if (rxnum == I2C_BYTES) {
             i2c->inten0 |= MXC_F_I2C_INTEN0_ADDR_MATCH;
         }
@@ -118,7 +126,6 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
-
         // Write as much data as possible into TX FIFO
         // Unless we're at the end of the transaction (only write what's needed)
         if (txcnt >= txnum) {
@@ -133,10 +140,11 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
     default:
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
-            printf("i2c->int_fl0 = 0x%08x\n", i2c->intfl0);
-            printf("i2c->status  = 0x%08x\n", i2c->status);
+            printf("i2c->intfl0 = 0x%08x\n", i2c->intfl0);
+            printf("i2c->status = 0x%08x\n", i2c->status);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
             rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
@@ -151,6 +159,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
 
     for (i = 0; i < sizeof(txdata); ++i) {
@@ -189,7 +198,7 @@ int verifyData(void)
 // *****************************************************************************
 int main()
 {
-    printf("\n******** I2C SLAVE ASYNC TRANSACTION TEST *********\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
     printf("\nThis example uses one I2C peripheral as a master to\n");
     printf("read and write to another I2C which acts as a slave.\n");
 
@@ -200,26 +209,34 @@ int main()
 
     //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
+    if (error != E_NO_ERROR) {
+        printf("Failed master\n");
+        return error;
+    }
 
+#ifdef MASTERDMA
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA, true, true);
     if (error != E_NO_ERROR) {
-        printf("-->Failed master\n");
-        return E_FAIL;
-    } else {
-        printf("\n-->I2C Master Initialization Complete");
+        printf("Failed DMA master\n");
+        return error;
     }
+#endif
+
+    printf("\n-->I2C Master Initialization Complete");
 
     //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
-
     if (error != E_NO_ERROR) {
         printf("Failed slave\n");
-        return E_FAIL;
-    } else {
-        printf("\n-->I2C Slave Initialization Complete");
+        return error;
     }
 
+    printf("\n-->I2C Slave Initialization Complete");
+
     MXC_NVIC_SetVector(I2C0_IRQn, I2C0_IRQHandler);
     NVIC_EnableIRQ(I2C0_IRQn);
+    __enable_irq();
 
     MXC_I2C_SetFrequency(I2C_MASTER, I2C_FREQ);
 
@@ -253,19 +270,36 @@ int main()
         return E_FAIL;
     }
 
+#ifdef MASTERDMA
+    DMA_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
+
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_TX_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_RX_CH), DMA_RX_IRQHandler);
+
+    if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster)) != 0) {
+        printf("Error writing: %d\n", error);
+        return error;
+    }
+#else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
-        return E_FAIL;
+        return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
 
     printf("\n-->Result: \n");
-
     printData();
-
     printf("\n");
 
+    MXC_I2C_Shutdown(I2C_MASTER);
+    MXC_I2C_Shutdown(I2C_SLAVE);
+
     if (verifyData() == E_NO_ERROR) {
         printf("\n-->I2C Transaction Successful\n");
     } else {
diff --git a/Examples/MAX32655/Library_Generate/gpiolib.c b/Examples/MAX32655/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32655/Library_Generate/gpiolib.c
+++ b/Examples/MAX32655/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32655/Library_Generate/gpiolib.h b/Examples/MAX32655/Library_Generate/gpiolib.h
index 9fd4bee5ba..7cbd63b512 100644
--- a/Examples/MAX32655/Library_Generate/gpiolib.h
+++ b/Examples/MAX32655/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32655_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32655_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32655_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32655/Library_Use/lib/include/gpiolib.h b/Examples/MAX32655/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..9025b12a93 100644
--- a/Examples/MAX32655/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32655/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32655_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32655_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32655_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX32660/EEPROM_Emulator/src/eeprom.c b/Examples/MAX32660/EEPROM_Emulator/src/eeprom.c
index 7b12106486..c56f934997 100644
--- a/Examples/MAX32660/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX32660/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX32660/GPIO/main.c b/Examples/MAX32660/GPIO/main.c
index b29b27f960..16afc684e4 100644
--- a/Examples/MAX32660/GPIO/main.c
+++ b/Examples/MAX32660/GPIO/main.c
@@ -104,6 +104,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -116,6 +117,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_isr, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -138,6 +140,8 @@ int main(void)
     gpio_in.mask = BUTTON_PIN;
     gpio_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_in.func = MXC_GPIO_FUNC_IN;
+    gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -145,6 +149,8 @@ int main(void)
     gpio_out.mask = LED_PIN;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32660/I2C/README.md b/Examples/MAX32660/I2C/README.md
index 91aafc8966..2c0de0dbe8 100644
--- a/Examples/MAX32660/I2C/README.md
+++ b/Examples/MAX32660/I2C/README.md
@@ -21,7 +21,7 @@ Universal instructions on building, flashing, and debugging this project can be
 
 ## Expected Output
 ```
-******** I2C SLAVE ASYNC TRANSACTION TEST *********
+******** I2C Master-Slave Transaction Demo *********
 
 This example uses one I2C peripheral as a master to
 read and write to another I2C which acts as a slave.
@@ -29,6 +29,8 @@ read and write to another I2C which acts as a slave.
 You will need to connect P0.8->P0.2 (SCL) and
 P0.9->P0.3 (SDA).
 
+-->I2C Master Initialization Complete
+-->I2C Slave Initialization Complete
 
 -->Writing data to slave, and reading the data back
 
diff --git a/Examples/MAX32660/I2C/main.c b/Examples/MAX32660/I2C/main.c
index 8733f66060..1700b564e6 100644
--- a/Examples/MAX32660/I2C/main.c
+++ b/Examples/MAX32660/I2C/main.c
@@ -33,7 +33,7 @@
 
 /**
  * @file        main.c
- * @brief       I2C Loopback Example
+ * @brief       I2C Master-Slave Transaction Demo
  * @details     This example uses the I2C Master to read/write from/to the I2C Slave. 
  *              For this example, user must connect I2C Master SCL pin to I2C Slave SCL 
  *              pin and I2C Master SDA pin to I2C Slave SDA pin. User must also connect
@@ -45,6 +45,7 @@
  */
 
 /***** Includes *****/
+
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
@@ -56,7 +57,8 @@
 #include "dma.h"
 
 /***** Definitions *****/
-// #define MASTERDMA        //Comment this line out if standard I2C transaction is required
+
+#define MASTERDMA //Comment this line out if standard I2C transaction is required
 
 #define I2C_MASTER MXC_I2C0
 #define I2C_SLAVE MXC_I2C1
@@ -66,11 +68,13 @@
 #define I2C_BYTES 255
 
 /***** Globals *****/
+
 static uint8_t Stxdata[I2C_BYTES];
 static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA_TX_CH;
+int8_t DMA_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
@@ -82,28 +86,22 @@ volatile int rxnum = 0;
 void I2C1_IRQHandler(void)
 {
     MXC_I2C_AsyncHandler(I2C_SLAVE);
-    return;
 }
 
-void DMA0_IRQHandler(void)
+void DMA_TX_IRQHandler(void)
 {
     MXC_DMA_Handler();
-    MXC_DMA_ReleaseChannel(0);
-    DMA_FLAG = 1;
 }
 
-void DMA1_IRQHandler(void)
+void DMA_RX_IRQHandler(void)
 {
     MXC_DMA_Handler();
-    MXC_DMA_ReleaseChannel(1);
-    DMA_FLAG = 1;
 }
 
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
     I2C_FLAG = error;
-    return;
 }
 
 int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
@@ -114,22 +112,23 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         // Clear bytes written
         rxnum = 0;
         break;
+
     case MXC_I2C_EVT_MASTER_RD:
-        // Echo data from Srxdata buffer
-        for (int i = 0; i < I2C_BYTES; i++) {
-            Stxdata[i] = Srxdata[i];
-        }
+        // Serve as a 16 byte loopback, returning data*2
         txnum = I2C_BYTES;
         txcnt = 0;
         i2c->intfl0 = MXC_F_I2C_INTFL0_TXLOI | MXC_F_I2C_INTFL0_AMI;
         break;
+
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
         rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
         if (rxnum == I2C_BYTES) {
             i2c->inten0 |= MXC_F_I2C_INTEN0_AMIE;
         }
+
         break;
+
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
         // Write as much data as possible into TX FIFO
@@ -137,23 +136,27 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         if (txcnt >= txnum) {
             break;
         }
+
         int num = MXC_I2C_GetTXFIFOAvailable(i2c);
         num = (num > (txnum - txcnt)) ? (txnum - txcnt) : num;
         txcnt += MXC_I2C_WriteTXFIFO(i2c, &Stxdata[txcnt], num);
         break;
+
     default:
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
             printf("i2c->intfl0 = 0x%08x\n", i2c->intfl0);
-            printf("i2c->status  = 0x%08x\n", i2c->status);
+            printf("i2c->status = 0x%08x\n", i2c->status);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
             rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
             return 1;
         }
     }
+
     return 0;
 }
 
@@ -161,12 +164,15 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
+
     for (i = 0; i < sizeof(txdata); ++i) {
         printf("%02x ", txdata[i]);
     }
 
     printf("\n\n-->RxData: ");
+
     for (i = 0; i < sizeof(rxdata); ++i) {
         printf("%02x ", rxdata[i]);
     }
@@ -180,11 +186,13 @@ void printData(void)
 int verifyData(void)
 {
     int i, fails = 0;
+
     for (i = 0; i < I2C_BYTES; ++i) {
         if (txdata[i] != rxdata[i]) {
             ++fails;
         }
     }
+
     if (fails > 0) {
         return E_FAIL;
     }
@@ -195,7 +203,7 @@ int verifyData(void)
 // *****************************************************************************
 int main()
 {
-    printf("\n******** I2C SLAVE ASYNC TRANSACTION TEST *********\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
     printf("\nThis example uses one I2C peripheral as a master to\n");
     printf("read and write to another I2C which acts as a slave.\n");
 
@@ -207,9 +215,20 @@ int main()
     //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
     if (error != E_NO_ERROR) {
-        printf("Failed master\n");
+        printf("Failed master.\n");
+        return error;
+    }
+
+#ifdef MASTERDMA
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA, true, true);
+    if (error != E_NO_ERROR) {
+        printf("Failed DMA master\n");
         return error;
     }
+#endif
+
+    printf("\n-->I2C Master Initialization Complete");
 
     //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
@@ -218,6 +237,8 @@ int main()
         return error;
     }
 
+    printf("\n-->I2C Slave Initialization Complete");
+
     MXC_NVIC_SetVector(I2C1_IRQn, I2C1_IRQHandler);
     NVIC_EnableIRQ(I2C1_IRQn);
     __enable_irq();
@@ -229,7 +250,9 @@ int main()
     // Initialize test data
     for (i = 0; i < I2C_BYTES; i++) {
         txdata[i] = i;
-        rxdata[i] = 0xFF;
+        rxdata[i] = 0;
+        Stxdata[i] = i;
+        Srxdata[i] = 0;
     }
 
     // This will write data to slave
@@ -253,31 +276,35 @@ int main()
     }
 
 #ifdef MASTERDMA
-    MXC_DMA_ReleaseChannel(0);
-    MXC_DMA_ReleaseChannel(1);
+    DMA_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
 
-    NVIC_EnableIRQ(DMA0_IRQn);
-    NVIC_EnableIRQ(DMA1_IRQn);
-    __enable_irq();
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_TX_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_RX_CH), DMA_RX_IRQHandler);
 
     if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
-        return FAILED;
+        return error;
     }
-    while (DMA_FLAG == 0) {}
 #else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
-#endif
 
     printf("\n-->Result: \n");
     printData();
     printf("\n");
 
+    MXC_I2C_Shutdown(I2C_MASTER);
+    MXC_I2C_Shutdown(I2C_SLAVE);
+
     if (verifyData() == E_NO_ERROR) {
         printf("\n-->I2C Transaction Successful\n");
     } else {
diff --git a/Examples/MAX32660/Library_Generate/gpiolib.c b/Examples/MAX32660/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32660/Library_Generate/gpiolib.c
+++ b/Examples/MAX32660/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32660/Library_Generate/gpiolib.h b/Examples/MAX32660/Library_Generate/gpiolib.h
index 9fd4bee5ba..54740011ca 100644
--- a/Examples/MAX32660/Library_Generate/gpiolib.h
+++ b/Examples/MAX32660/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32660_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32660_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32660_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32660/Library_Use/lib/include/gpiolib.h b/Examples/MAX32660/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..27d72b1cef 100644
--- a/Examples/MAX32660/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32660/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32660_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32660_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32660_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX32660/TMR/main.c b/Examples/MAX32660/TMR/main.c
index 2e25bc2957..64baab06d2 100644
--- a/Examples/MAX32660/TMR/main.c
+++ b/Examples/MAX32660/TMR/main.c
@@ -99,6 +99,7 @@ void PWMTimer()
     pwmOut.func = MXC_GPIO_FUNC_ALT3;
     pwmOut.pad = MXC_GPIO_PAD_NONE;
     pwmOut.vssel = MXC_GPIO_VSSEL_VDDIO;
+    pwmOut.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&pwmOut);
 
     /*    
diff --git a/Examples/MAX32662/EEPROM_Emulator/src/eeprom.c b/Examples/MAX32662/EEPROM_Emulator/src/eeprom.c
index aa96c0e58a..38e3748ac2 100644
--- a/Examples/MAX32662/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX32662/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX32662/GPIO/main.c b/Examples/MAX32662/GPIO/main.c
index c69351e422..349c028113 100644
--- a/Examples/MAX32662/GPIO/main.c
+++ b/Examples/MAX32662/GPIO/main.c
@@ -87,6 +87,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -99,6 +100,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_isr, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -112,6 +114,8 @@ int main(void)
     gpio_in.mask = MXC_GPIO_PIN_IN;
     gpio_in.pad = MXC_GPIO_PAD_NONE;
     gpio_in.func = MXC_GPIO_FUNC_IN;
+    gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -119,6 +123,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32662/I2C/README.md b/Examples/MAX32662/I2C/README.md
index b34e22c7e6..b72a594976 100644
--- a/Examples/MAX32662/I2C/README.md
+++ b/Examples/MAX32662/I2C/README.md
@@ -31,6 +31,8 @@ You will need to connect P0.12->P0.6 (SCL) and
 P0.13->P0.9 (SDA). As well jumper JP1 (VREF) needs
 to be removed.
 
+-->I2C Master Initialization Complete
+-->I2C Slave Initialization Complete
 
 -->Writing data to slave, and reading the data back
 
diff --git a/Examples/MAX32662/I2C/main.c b/Examples/MAX32662/I2C/main.c
index f413370849..fae45a3f72 100644
--- a/Examples/MAX32662/I2C/main.c
+++ b/Examples/MAX32662/I2C/main.c
@@ -33,10 +33,10 @@
 
 /**
  * @file        main.c
- * @brief       I2C Loopback Example 
+ * @brief       I2C Master-Slave Transaction Demo
  * @details     This example uses the I2C Master to read/write from/to the I2C Slave. For
- *              this example you must connect P0.12 to P0.18 (SCL) and P0.13 to P0.19 (SCL). The Master
- *              will use P0.12 and P0.13. The Slave will use P0.18 and P0.19. You must also
+ *              this example you must connect P0.12 to P0.6 (SCL) and P0.13 to P0.9 (SCL). The Master
+ *              will use P0.12 and P0.13. The Slave will use P0.6 and P0.9. You must also
  *              connect the pull-up jumpers (JP23 and JP24) to the proper I/O voltage.
  *              Refer to JP27 to determine the I/O voltage.
  * @note        Other devices on the EvKit will be using the same bus. This example cannot be combined with
@@ -44,6 +44,7 @@
  */
 
 /***** Includes *****/
+
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
@@ -56,7 +57,8 @@
 #include "board.h"
 
 /***** Definitions *****/
-//#define MASTERDMA     //Comment this line out if standard I2C transaction is required
+
+#define MASTERDMA //Comment this line out if standard I2C transaction is required
 
 #define I2C_MASTER MXC_I2C0
 #define I2C_SLAVE MXC_I2C1
@@ -66,11 +68,13 @@
 #define I2C_BYTES 255
 
 /***** Globals *****/
+
 static uint8_t Stxdata[I2C_BYTES];
 static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA_TX_CH;
+int8_t DMA_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
@@ -82,28 +86,22 @@ volatile int rxnum = 0;
 void I2C1_IRQHandler(void)
 {
     MXC_I2C_AsyncHandler(I2C_SLAVE);
-    return;
 }
 
-void DMA0_IRQHandler(void)
+void DMA_TX_IRQHandler(void)
 {
     MXC_DMA_Handler();
-    MXC_DMA_ReleaseChannel(0);
-    DMA_FLAG = 1;
 }
 
-void DMA1_IRQHandler(void)
+void DMA_RX_IRQHandler(void)
 {
     MXC_DMA_Handler();
-    MXC_DMA_ReleaseChannel(1);
-    DMA_FLAG = 1;
 }
 
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
     I2C_FLAG = error;
-    return;
 }
 
 int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
@@ -114,22 +112,23 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         // Clear bytes written
         rxnum = 0;
         break;
+
     case MXC_I2C_EVT_MASTER_RD:
         // Serve as a 16 byte loopback, returning data*2
-        for (int i = 0; i < I2C_BYTES; i++) {
-            Stxdata[i] = i;
-        }
         txnum = I2C_BYTES;
         txcnt = 0;
         i2c->intfl0 = MXC_F_I2C_INTFL0_TX_LOCKOUT | MXC_F_I2C_INTFL0_ADDR_MATCH;
         break;
+
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
         rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
         if (rxnum == I2C_BYTES) {
             i2c->inten0 |= MXC_F_I2C_INTEN0_ADDR_MATCH;
         }
+
         break;
+
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
         // Write as much data as possible into TX FIFO
@@ -137,23 +136,27 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         if (txcnt >= txnum) {
             break;
         }
+
         int num = MXC_I2C_GetTXFIFOAvailable(i2c);
         num = (num > (txnum - txcnt)) ? (txnum - txcnt) : num;
         txcnt += MXC_I2C_WriteTXFIFO(i2c, &Stxdata[txcnt], num);
         break;
+
     default:
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
             printf("i2c->intfl0 = 0x%08x\n", i2c->intfl0);
-            printf("i2c->status  = 0x%08x\n", i2c->status);
+            printf("i2c->status = 0x%08x\n", i2c->status);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
             rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
             return 1;
         }
     }
+
     return 0;
 }
 
@@ -161,12 +164,15 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
+
     for (i = 0; i < sizeof(txdata); ++i) {
         printf("%02x ", txdata[i]);
     }
 
     printf("\n\n-->RxData: ");
+
     for (i = 0; i < sizeof(rxdata); ++i) {
         printf("%02x ", rxdata[i]);
     }
@@ -180,22 +186,24 @@ void printData(void)
 int verifyData(void)
 {
     int i, fails = 0;
+
     for (i = 0; i < I2C_BYTES; ++i) {
         if (txdata[i] != rxdata[i]) {
             ++fails;
         }
     }
+
     if (fails > 0) {
         return E_FAIL;
-    } else {
-        return E_NO_ERROR;
     }
+
+    return E_NO_ERROR;
 }
 
 // *****************************************************************************
 int main()
 {
-    printf("\n******** I2C SLAVE ASYNC TRANSACTION TEST *********\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
     printf("\nThis example uses one I2C peripheral as a master to\n");
     printf("read and write to another I2C which acts as a slave.\n");
 
@@ -209,17 +217,28 @@ int main()
     printf("Either connect SLAVE_SCL to P0.12 and SLAVE_SDA to P0.13\n");
     printf("Or use breadboard and connect P0.12 to 3.3V with 4.7k \n");
     printf("and P0.13 to 3.3V with 4.7k\n");
-
 #endif
+
     int error, i = 0;
 
     //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
     if (error != E_NO_ERROR) {
-        printf("Failed master\n");
+        printf("Failed master.\n");
         return error;
     }
 
+#ifdef MASTERDMA
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA, true, true);
+    if (error != E_NO_ERROR) {
+        printf("Failed DMA master\n");
+        return error;
+    }
+#endif
+
+    printf("\n-->I2C Master Initialization Complete");
+
     //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
     if (error != E_NO_ERROR) {
@@ -227,6 +246,8 @@ int main()
         return error;
     }
 
+    printf("\n-->I2C Slave Initialization Complete");
+
     MXC_NVIC_SetVector(I2C1_IRQn, I2C1_IRQHandler);
     NVIC_EnableIRQ(I2C1_IRQn);
     __enable_irq();
@@ -239,6 +260,8 @@ int main()
     for (i = 0; i < I2C_BYTES; i++) {
         txdata[i] = i;
         rxdata[i] = 0;
+        Stxdata[i] = i;
+        Srxdata[i] = 0;
     }
 
     // This will write data to slave
@@ -262,31 +285,35 @@ int main()
     }
 
 #ifdef MASTERDMA
-    MXC_DMA_ReleaseChannel(0);
-    MXC_DMA_ReleaseChannel(1);
+    DMA_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
 
-    NVIC_EnableIRQ(DMA0_IRQn);
-    NVIC_EnableIRQ(DMA1_IRQn);
-    __enable_irq();
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_TX_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_RX_CH), DMA_RX_IRQHandler);
 
     if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
-        return FAILED;
+        return error;
     }
-    while (DMA_FLAG == 0) {}
 #else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
-#endif
 
     printf("\n-->Result: \n");
     printData();
     printf("\n");
 
+    MXC_I2C_Shutdown(I2C_MASTER);
+    MXC_I2C_Shutdown(I2C_SLAVE);
+
     if (verifyData() == E_NO_ERROR) {
         printf("\n-->I2C Transaction Successful\n");
     } else {
diff --git a/Examples/MAX32662/Library_Generate/gpiolib.c b/Examples/MAX32662/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32662/Library_Generate/gpiolib.c
+++ b/Examples/MAX32662/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32662/Library_Generate/gpiolib.h b/Examples/MAX32662/Library_Generate/gpiolib.h
index 9fd4bee5ba..e850f65036 100644
--- a/Examples/MAX32662/Library_Generate/gpiolib.h
+++ b/Examples/MAX32662/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32662_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32662_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32662_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32662/Library_Use/lib/include/gpiolib.h b/Examples/MAX32662/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..57bab19016 100644
--- a/Examples/MAX32662/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32662/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32662_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32662_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32662_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX32662/TMR/main.c b/Examples/MAX32662/TMR/main.c
index fda8bd5e84..9b17463fd4 100644
--- a/Examples/MAX32662/TMR/main.c
+++ b/Examples/MAX32662/TMR/main.c
@@ -224,6 +224,7 @@ void OneshotTimer()
     ost_pin.func = MXC_GPIO_FUNC_OUT;
     ost_pin.pad = MXC_GPIO_PAD_NONE;
     ost_pin.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    ost_pin.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&ost_pin);
     MXC_GPIO_OutClr(ost_pin.port, ost_pin.mask);
 }
diff --git a/Examples/MAX32665/EEPROM_Emulator/src/eeprom.c b/Examples/MAX32665/EEPROM_Emulator/src/eeprom.c
index dbae84653c..14e2dff007 100644
--- a/Examples/MAX32665/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX32665/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX32665/GPIO/main.c b/Examples/MAX32665/GPIO/main.c
index b3daa56104..39b47509f5 100644
--- a/Examples/MAX32665/GPIO/main.c
+++ b/Examples/MAX32665/GPIO/main.c
@@ -84,6 +84,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -110,6 +111,8 @@ int main(void)
     gpio_in.mask = MXC_GPIO_PIN_IN;
     gpio_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_in.func = MXC_GPIO_FUNC_IN;
+    gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -117,6 +120,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32665/I2C/README.md b/Examples/MAX32665/I2C/README.md
index 526f5e9732..db6d800213 100644
--- a/Examples/MAX32665/I2C/README.md
+++ b/Examples/MAX32665/I2C/README.md
@@ -23,13 +23,16 @@ Universal instructions on building, flashing, and debugging this project can be
 
 ## Expected Output
 ```
-***** I2C Loopback Example *****
-This example uses one I2C peripheral as a master
-to read and write to another I2C which acts as a slave.
+******** I2C Master-Slave Transaction Demo *********
+
+This example uses one I2C peripheral as a master to
+read and write to another I2C which acts as a slave.
 
 You will need to connect P0.6 (I2C0 SDA) to P0.14 (I2C1 SDA) and
 P0.7 (I2C0 SCL) to P0.15 (I2C1 SCL).
 
+-->I2C Master Initialization Complete
+-->I2C Slave Initialization Complete
 
 -->Writing data to slave, and reading the data back
 
diff --git a/Examples/MAX32665/I2C/main.c b/Examples/MAX32665/I2C/main.c
index 7eb9661218..37191c8697 100644
--- a/Examples/MAX32665/I2C/main.c
+++ b/Examples/MAX32665/I2C/main.c
@@ -45,6 +45,7 @@
  */
 
 /***** Includes *****/
+
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
@@ -56,7 +57,8 @@
 #include "board.h"
 
 /***** Definitions *****/
-// #define MASTERDMA
+
+#define MASTERDMA //Comment this line out if standard I2C transaction is required
 
 #define I2C_MASTER MXC_I2C0_BUS0
 #if defined(BOARD_FTHR2)
@@ -72,10 +74,13 @@
 #define I2C_BYTES 255
 
 /***** Globals *****/
-static uint8_t Sdata[I2C_BYTES];
+
+static uint8_t Stxdata[I2C_BYTES];
+static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA0_TX_CH;
+int8_t DMA0_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
@@ -87,28 +92,22 @@ volatile int rxnum = 0;
 void I2C_Slave_IRQHandler(void)
 {
     MXC_I2C_AsyncHandler(I2C_SLAVE);
-    return;
 }
 
-void DMA0_IRQHandler(void)
+void DMA0_TX_IRQHandler(void)
 {
     MXC_DMA_Handler(MXC_DMA0);
-    MXC_DMA_ReleaseChannel(0);
-    DMA_FLAG = 1;
 }
 
-void DMA1_IRQHandler(void)
+void DMA0_RX_IRQHandler(void)
 {
     MXC_DMA_Handler(MXC_DMA0);
-    MXC_DMA_ReleaseChannel(1);
-    DMA_FLAG = 1;
 }
 
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
     I2C_FLAG = error;
-    return;
 }
 
 int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
@@ -119,15 +118,23 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         // Clear bytes written
         rxnum = 0;
         break;
+
     case MXC_I2C_EVT_MASTER_RD:
+        // Serve as a 16 byte loopback, returning data*2
         txnum = I2C_BYTES;
         txcnt = 0;
         i2c->int_fl0 = MXC_F_I2C_INT_FL0_TX_LOCK_OUT | MXC_F_I2C_INT_FL0_ADDR_MATCH;
         break;
+
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
-        rxnum += MXC_I2C_ReadRXFIFO(i2c, &Sdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
+        rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
+        if (rxnum == I2C_BYTES) {
+            i2c->int_en0 |= MXC_F_I2C_INT_EN0_ADDR_MATCH;
+        }
+
         break;
+
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
         // Write as much data as possible into TX FIFO
@@ -135,10 +142,12 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         if (txcnt >= txnum) {
             break;
         }
+
         int num = MXC_I2C_GetTXFIFOAvailable(i2c);
         num = (num > (txnum - txcnt)) ? (txnum - txcnt) : num;
-        txcnt += MXC_I2C_WriteTXFIFO(i2c, &Sdata[txcnt], num);
+        txcnt += MXC_I2C_WriteTXFIFO(i2c, &Stxdata[txcnt], num);
         break;
+
     default:
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
@@ -146,12 +155,14 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
             printf("i2c->status  = 0x%08x\n", i2c->status);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
-            rxnum += MXC_I2C_ReadRXFIFO(i2c, &Sdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
+            rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
             return 1;
         }
     }
+
     return 0;
 }
 
@@ -159,12 +170,15 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
+
     for (i = 0; i < sizeof(txdata); ++i) {
         printf("%02x ", txdata[i]);
     }
 
     printf("\n\n-->RxData: ");
+
     for (i = 0; i < sizeof(rxdata); ++i) {
         printf("%02x ", rxdata[i]);
     }
@@ -178,24 +192,26 @@ void printData(void)
 int verifyData(void)
 {
     int i, fails = 0;
+
     for (i = 0; i < I2C_BYTES; ++i) {
         if (txdata[i] != rxdata[i]) {
             ++fails;
         }
     }
+
     if (fails > 0) {
         return E_FAIL;
-    } else {
-        return E_NO_ERROR;
     }
+
+    return E_NO_ERROR;
 }
 
 // *****************************************************************************
 int main()
 {
-    printf("\n***** I2C Loopback Example *****\n");
-    printf("This example uses one I2C peripheral as a master\n");
-    printf("to read and write to another I2C which acts as a slave.\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
+    printf("\nThis example uses one I2C peripheral as a master to\n");
+    printf("read and write to another I2C which acts as a slave.\n");
 #if defined(BOARD_FTHR2)
     printf("\nYou will need to connect P0.6 (I2C0 SDA) to P1.14 (I2C2 SDA) and\n");
     printf("P0.7 (I2C0 SCL) to P1.15 (I2C2 SCL).\n");
@@ -209,17 +225,30 @@ int main()
     //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
     if (error != E_NO_ERROR) {
-        printf("Failed to initialize master.\n");
+        printf("Failed master\n");
         return error;
     }
 
+#ifdef MASTERDMA
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA0, true, true);
+    if (error != E_NO_ERROR) {
+        printf("Failed DMA master\n");
+        return error;
+    }
+#endif
+
+    printf("\n-->I2C Master Initialization Complete");
+
     //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
     if (error != E_NO_ERROR) {
-        printf("Failed to initialize slave.\n");
+        printf("Failed slave\n");
         return error;
     }
 
+    printf("\n-->I2C Slave Initialization Complete");
+
     MXC_NVIC_SetVector(I2C_SLAVE_IRQn, I2C_Slave_IRQHandler);
     NVIC_EnableIRQ(I2C_SLAVE_IRQn);
     __enable_irq();
@@ -232,6 +261,8 @@ int main()
     for (i = 0; i < I2C_BYTES; i++) {
         txdata[i] = i;
         rxdata[i] = 0;
+        Stxdata[i] = i;
+        Srxdata[i] = 0;
     }
 
     // This will write data to slave
@@ -254,27 +285,29 @@ int main()
         return error;
     }
 
-    MXC_DMA_ReleaseChannel(0);
-    MXC_DMA_ReleaseChannel(1);
-
 #ifdef MASTERDMA
-    NVIC_EnableIRQ(DMA0_IRQn);
-    NVIC_EnableIRQ(DMA1_IRQn);
-    __enable_irq();
+    DMA0_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA0_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
+
+    //There are two DMA instances for the MAX32665
+    NVIC_EnableIRQ(MXC_DMA0_CH_GET_IRQ(DMA0_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA0_CH_GET_IRQ(DMA0_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA0_CH_GET_IRQ(DMA0_TX_CH), DMA0_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA0_CH_GET_IRQ(DMA0_RX_CH), DMA0_RX_IRQHandler);
 
     if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster, MXC_DMA0)) != 0) {
         printf("Error writing: %d\n", error);
-        return FAILED;
+        return error;
     }
-    while (DMA_FLAG == 0) {}
 #else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
-#endif
 
     printf("\n-->Result: \n");
     printData();
diff --git a/Examples/MAX32665/Library_Generate/gpiolib.c b/Examples/MAX32665/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32665/Library_Generate/gpiolib.c
+++ b/Examples/MAX32665/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32665/Library_Generate/gpiolib.h b/Examples/MAX32665/Library_Generate/gpiolib.h
index 9fd4bee5ba..a43236f5dd 100644
--- a/Examples/MAX32665/Library_Generate/gpiolib.h
+++ b/Examples/MAX32665/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32665_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32665_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32665_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32665/Library_Use/lib/include/gpiolib.h b/Examples/MAX32665/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..afbbb6ecd7 100644
--- a/Examples/MAX32665/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32665/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32665_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32665_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32665_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX32670/EEPROM_Emulator/src/eeprom.c b/Examples/MAX32670/EEPROM_Emulator/src/eeprom.c
index aa96c0e58a..38e3748ac2 100644
--- a/Examples/MAX32670/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX32670/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX32670/GPIO/main.c b/Examples/MAX32670/GPIO/main.c
index db0ac3e9a1..2865139aba 100644
--- a/Examples/MAX32670/GPIO/main.c
+++ b/Examples/MAX32670/GPIO/main.c
@@ -84,6 +84,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -96,6 +97,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_isr, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -111,6 +113,8 @@ int main(void)
     gpio_in.mask = MXC_GPIO_PIN_IN;
     gpio_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_in.func = MXC_GPIO_FUNC_IN;
+    gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -118,6 +122,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32670/I2C/README.md b/Examples/MAX32670/I2C/README.md
index 61d4077979..65ca351c59 100644
--- a/Examples/MAX32670/I2C/README.md
+++ b/Examples/MAX32670/I2C/README.md
@@ -22,7 +22,7 @@ Universal instructions on building, flashing, and debugging this project can be
 
 ## Expected Output
 ```
-******** I2C SLAVE ASYNC TRANSACTION TEST *********
+******** I2C Master-Slave Transaction Demo *********
 
 This example uses one I2C peripheral as a master to
 read and write to another I2C which acts as a slave.
@@ -37,9 +37,9 @@ P0.13 to P0.7 (SDA).
 
 -->Result:
 
--->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
--->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
 
 -->I2C Transaction Successful
diff --git a/Examples/MAX32670/I2C/main.c b/Examples/MAX32670/I2C/main.c
index 45fd1e20db..688e50cd39 100644
--- a/Examples/MAX32670/I2C/main.c
+++ b/Examples/MAX32670/I2C/main.c
@@ -33,7 +33,7 @@
 
 /**
  * @file        main.c
- * @brief       I2C Loopback Example
+ * @brief       I2C Master-Slave Transaction Demo
  * @details     This example uses the I2C Master to read/write from/to the I2C Slave. 
  *              For this example, user must connect I2C Master SCL pin to I2C Slave SCL 
  *              pin and I2C Master SDA pin to I2C Slave SDA pin. User must also connect
@@ -45,50 +45,64 @@
  */
 
 /***** Includes *****/
+
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
 #include "mxc_device.h"
 #include "mxc_delay.h"
+#include "mxc_errors.h"
 #include "nvic_table.h"
 #include "i2c.h"
 #include "dma.h"
+#include "led.h"
 
 /***** Definitions *****/
-// #define MASTERDMA
+
+#define MASTERDMA //Comment this line out if standard I2C transaction is required
 
 #define I2C_MASTER MXC_I2C1
 #define I2C_SLAVE MXC_I2C0
 
 #define I2C_FREQ 100000
 #define I2C_SLAVE_ADDR (0x51)
-#define I2C_BYTES 100
+#define I2C_BYTES 255
 
 /***** Globals *****/
+
 static uint8_t Stxdata[I2C_BYTES];
 static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA_TX_CH;
+int8_t DMA_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
 volatile int rxnum = 0;
-volatile int num;
+
 /***** Functions *****/
 
 //Slave interrupt handler
 void I2C0_IRQHandler(void)
 {
     MXC_I2C_AsyncHandler(I2C_SLAVE);
-    return;
+}
+
+void DMA_TX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
+}
+
+void DMA_RX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
 }
 
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
     I2C_FLAG = error;
-    return;
 }
 
 int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
@@ -101,12 +115,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         break;
 
     case MXC_I2C_EVT_MASTER_RD:
-
         // Serve as a 16 byte loopback, returning data*2
-        for (int i = 0; i < I2C_BYTES; i++) {
-            Stxdata[i] = Srxdata[i];
-        }
-
         txnum = I2C_BYTES;
         txcnt = 0;
         i2c->intfl0 = MXC_F_I2C_INTFL0_TX_LOCKOUT | MXC_F_I2C_INTFL0_ADDR_MATCH;
@@ -115,16 +124,14 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
         rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
-
         if (rxnum == I2C_BYTES) {
-            i2c->inten0 |= MXC_F_I2C_INTFL0_ADDR_MATCH;
+            i2c->inten0 |= MXC_F_I2C_INTEN0_ADDR_MATCH;
         }
 
         break;
 
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
-
         // Write as much data as possible into TX FIFO
         // Unless we're at the end of the transaction (only write what's needed)
         if (txcnt >= txnum) {
@@ -140,9 +147,10 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
             printf("i2c->intfl0 = 0x%08x\n", i2c->intfl0);
-            printf("i2c->status  = 0x%08x\n", i2c->status);
+            printf("i2c->status = 0x%08x\n", i2c->status);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
             rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
@@ -157,6 +165,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
 
     for (i = 0; i < sizeof(txdata); ++i) {
@@ -195,7 +204,7 @@ int verifyData(void)
 // *****************************************************************************
 int main()
 {
-    printf("\n******** I2C SLAVE ASYNC TRANSACTION TEST *********\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
     printf("\nThis example uses one I2C peripheral as a master to\n");
     printf("read and write to another I2C which acts as a slave.\n");
 
@@ -206,25 +215,34 @@ int main()
 
     //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
+    if (error != E_NO_ERROR) {
+        printf("Failed master\n");
+        return error;
+    }
 
+#ifdef MASTERDMA
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA, true, true);
     if (error != E_NO_ERROR) {
-        printf("-->Failed master\n");
+        printf("Failed DMA master\n");
         return error;
-    } else {
-        printf("\n-->I2C Master Initialization Complete");
     }
+#endif
+
+    printf("\n-->I2C Master Initialization Complete");
 
     //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
-
     if (error != E_NO_ERROR) {
         printf("Failed slave\n");
         return error;
-    } else {
-        printf("\n-->I2C Slave Initialization Complete");
     }
 
+    printf("\n-->I2C Slave Initialization Complete");
+
+    MXC_NVIC_SetVector(I2C0_IRQn, I2C0_IRQHandler);
     NVIC_EnableIRQ(I2C0_IRQn);
+    __enable_irq();
 
     MXC_I2C_SetFrequency(I2C_MASTER, I2C_FREQ);
 
@@ -258,23 +276,42 @@ int main()
         return error;
     }
 
+#ifdef MASTERDMA
+    DMA_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
+
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_TX_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_RX_CH), DMA_RX_IRQHandler);
+
+    if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster)) != 0) {
+        printf("Error writing: %d\n", error);
+        return error;
+    }
+#else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
 
     printf("\n-->Result: \n");
-
     printData();
-
     printf("\n");
 
+    MXC_I2C_Shutdown(I2C_MASTER);
+    MXC_I2C_Shutdown(I2C_SLAVE);
+
     if (verifyData() == E_NO_ERROR) {
         printf("\n-->I2C Transaction Successful\n");
+        LED_On(LED_GREEN);
     } else {
         printf("\n-->I2C Transaction Failed\n");
+        LED_On(LED_RED);
         return E_FAIL;
     }
 
diff --git a/Examples/MAX32670/Library_Generate/gpiolib.c b/Examples/MAX32670/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32670/Library_Generate/gpiolib.c
+++ b/Examples/MAX32670/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32670/Library_Generate/gpiolib.h b/Examples/MAX32670/Library_Generate/gpiolib.h
index 9fd4bee5ba..a8aa5830c2 100644
--- a/Examples/MAX32670/Library_Generate/gpiolib.h
+++ b/Examples/MAX32670/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32670_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32670_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32670_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32670/Library_Use/lib/include/gpiolib.h b/Examples/MAX32670/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..3f5af7a2e2 100644
--- a/Examples/MAX32670/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32670/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32670_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32670_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32670_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX32672/EEPROM_Emulator/src/eeprom.c b/Examples/MAX32672/EEPROM_Emulator/src/eeprom.c
index aa96c0e58a..38e3748ac2 100644
--- a/Examples/MAX32672/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX32672/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX32672/GPIO/main.c b/Examples/MAX32672/GPIO/main.c
index afe08d0b67..08babec88e 100644
--- a/Examples/MAX32672/GPIO/main.c
+++ b/Examples/MAX32672/GPIO/main.c
@@ -103,6 +103,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -115,6 +116,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_isr, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -126,6 +128,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32672/I2C/README.md b/Examples/MAX32672/I2C/README.md
index ea76e3132a..4b64dd17ea 100644
--- a/Examples/MAX32672/I2C/README.md
+++ b/Examples/MAX32672/I2C/README.md
@@ -22,7 +22,7 @@ Universal instructions on building, flashing, and debugging this project can be
 
 ## Expected Output
 ```
-******** I2C SLAVE ASYNC TRANSACTION TEST *********
+******** I2C Master-Slave Transaction Demo *********
 
 This example uses one I2C peripheral as a master to
 read and write to another I2C which acts as a slave.
@@ -40,9 +40,9 @@ at JP4 and JP5.
 
 -->Result:
 
--->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
--->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
 
 -->I2C Transaction Successful
diff --git a/Examples/MAX32672/I2C/main.c b/Examples/MAX32672/I2C/main.c
index 3ef22155dc..bd75630995 100644
--- a/Examples/MAX32672/I2C/main.c
+++ b/Examples/MAX32672/I2C/main.c
@@ -33,7 +33,7 @@
 
 /**
  * @file        main.c
- * @brief       I2C Loopback Example
+ * @brief       I2C Master-Slave Transaction Demo
  * @details     This example uses the I2C Master to read/write from/to the I2C Slave. 
  *              For this example, user must connect I2C Master SCL pin to I2C Slave SCL 
  *              pin and I2C Master SDA pin to I2C Slave SDA pin. User must also connect
@@ -45,6 +45,7 @@
  */
 
 /***** Includes *****/
+
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
@@ -55,24 +56,29 @@
 #include "dma.h"
 
 /***** Definitions *****/
+
+#define MASTERDMA //Comment this line out if standard I2C transaction is required
+
 #define I2C_MASTER MXC_I2C0
 #define I2C_SLAVE MXC_I2C2
 
 #define I2C_FREQ 100000
 #define I2C_SLAVE_ADDR (0x51)
-#define I2C_BYTES 100
+#define I2C_BYTES 255
 
 /***** Globals *****/
+
 static uint8_t Stxdata[I2C_BYTES];
 static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA_TX_CH;
+int8_t DMA_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
 volatile int rxnum = 0;
-volatile int num;
+
 /***** Functions *****/
 
 //Slave interrupt handler
@@ -81,6 +87,16 @@ void I2C2_IRQHandler(void)
     MXC_I2C_AsyncHandler(I2C_SLAVE);
 }
 
+void DMA_TX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
+}
+
+void DMA_RX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
+}
+
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
@@ -97,12 +113,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         break;
 
     case MXC_I2C_EVT_MASTER_RD:
-
         // Serve as a 16 byte loopback, returning data*2
-        for (int i = 0; i < I2C_BYTES; i++) {
-            Stxdata[i] = Srxdata[i];
-        }
-
         txnum = I2C_BYTES;
         txcnt = 0;
         i2c->intfl0 = MXC_F_I2C_INTFL0_TX_LOCKOUT | MXC_F_I2C_INTFL0_ADDR_MATCH;
@@ -111,16 +122,14 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
         rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
-
         if (rxnum == I2C_BYTES) {
-            i2c->inten0 |= MXC_F_I2C_INTFL0_ADDR_MATCH;
+            i2c->inten0 |= MXC_F_I2C_INTEN0_ADDR_MATCH;
         }
 
         break;
 
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
-
         // Write as much data as possible into TX FIFO
         // Unless we're at the end of the transaction (only write what's needed)
         if (txcnt >= txnum) {
@@ -136,9 +145,10 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
             printf("i2c->intfl0 = 0x%08x\n", i2c->intfl0);
-            printf("i2c->status  = 0x%08x\n", i2c->status);
+            printf("i2c->status = 0x%08x\n", i2c->status);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
             rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
@@ -153,6 +163,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
 
     for (i = 0; i < sizeof(txdata); ++i) {
@@ -191,7 +202,7 @@ int verifyData(void)
 // *****************************************************************************
 int main()
 {
-    printf("\n******** I2C SLAVE ASYNC TRANSACTION TEST *********\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
     printf("\nThis example uses one I2C peripheral as a master to\n");
     printf("read and write to another I2C which acts as a slave.\n");
 
@@ -203,25 +214,36 @@ int main()
 
     int error, i = 0;
 
-    //Set up the I2C Master
+    //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
     if (error != E_NO_ERROR) {
-        printf("-->Failed master\n");
+        printf("Failed master\n");
+        return error;
+    }
+
+#ifdef MASTERDMA
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA, true, true);
+    if (error != E_NO_ERROR) {
+        printf("Failed DMA master\n");
         return error;
-    } else {
-        printf("\n-->I2C Master Initialization Complete");
     }
+#endif
 
-    //Set up the I2C Slave
+    printf("\n-->I2C Master Initialization Complete");
+
+    //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
     if (error != E_NO_ERROR) {
         printf("Failed slave\n");
         return error;
-    } else {
-        printf("\n-->I2C Slave Initialization Complete");
     }
 
+    printf("\n-->I2C Slave Initialization Complete");
+
+    MXC_NVIC_SetVector(I2C2_IRQn, I2C2_IRQHandler);
     NVIC_EnableIRQ(I2C2_IRQn);
+    __enable_irq();
 
     // Set I2C frequency
     MXC_I2C_SetFrequency(I2C_MASTER, I2C_FREQ);
@@ -256,20 +278,36 @@ int main()
         return error;
     }
 
-    // Run I2C transaction with I2C0
+#ifdef MASTERDMA
+    DMA_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
+
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_TX_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_RX_CH), DMA_RX_IRQHandler);
+
+    if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster)) != 0) {
+        printf("Error writing: %d\n", error);
+        return error;
+    }
+#else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
 
     printf("\n-->Result: \n");
-
     printData();
-
     printf("\n");
 
+    MXC_I2C_Shutdown(I2C_MASTER);
+    MXC_I2C_Shutdown(I2C_SLAVE);
+
     if (verifyData() == E_NO_ERROR) {
         printf("\n-->I2C Transaction Successful\n");
     } else {
diff --git a/Examples/MAX32672/LP/main.c b/Examples/MAX32672/LP/main.c
index 862080b364..d22c950afe 100644
--- a/Examples/MAX32672/LP/main.c
+++ b/Examples/MAX32672/LP/main.c
@@ -189,6 +189,7 @@ void configure_gpios(void)
     out_clr.func = MXC_GPIO_FUNC_OUT;
     out_clr.pad = MXC_GPIO_PAD_NONE;
     out_clr.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    out_clr.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&out_clr);
     MXC_GPIO_OutClr(out_clr.port, out_clr.mask);
 
@@ -198,6 +199,7 @@ void configure_gpios(void)
     out_set.func = MXC_GPIO_FUNC_OUT;
     out_set.pad = MXC_GPIO_PAD_NONE;
     out_set.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    out_set.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&out_set);
     MXC_GPIO_OutSet(out_set.port, out_set.mask);
 }
diff --git a/Examples/MAX32672/Library_Generate/gpiolib.c b/Examples/MAX32672/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32672/Library_Generate/gpiolib.c
+++ b/Examples/MAX32672/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32672/Library_Generate/gpiolib.h b/Examples/MAX32672/Library_Generate/gpiolib.h
index 9fd4bee5ba..36e60aea08 100644
--- a/Examples/MAX32672/Library_Generate/gpiolib.h
+++ b/Examples/MAX32672/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32672_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32672_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32672_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32672/Library_Use/lib/include/gpiolib.h b/Examples/MAX32672/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..4e0f30b44c 100644
--- a/Examples/MAX32672/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32672/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32672_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32672_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32672_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX32675/EEPROM_Emulator/src/eeprom.c b/Examples/MAX32675/EEPROM_Emulator/src/eeprom.c
index aa96c0e58a..38e3748ac2 100644
--- a/Examples/MAX32675/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX32675/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX32675/GPIO/main.c b/Examples/MAX32675/GPIO/main.c
index c70569fc8a..03da5f92cf 100644
--- a/Examples/MAX32675/GPIO/main.c
+++ b/Examples/MAX32675/GPIO/main.c
@@ -104,6 +104,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -116,6 +117,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_isr, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -131,6 +133,8 @@ int main(void)
     gpio_in.mask = MXC_GPIO_PIN_IN;
     gpio_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_in.func = MXC_GPIO_FUNC_IN;
+    gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -138,6 +142,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32675/I2C/README.md b/Examples/MAX32675/I2C/README.md
index aa308f3085..51e19eed72 100644
--- a/Examples/MAX32675/I2C/README.md
+++ b/Examples/MAX32675/I2C/README.md
@@ -36,9 +36,9 @@ P0.19 to P0.7 (SDA).
 
 -->Result:
 
--->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
--->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
 
 -->I2C Transaction Successful
diff --git a/Examples/MAX32675/I2C/main.c b/Examples/MAX32675/I2C/main.c
index 4c0415d289..0d84ece7ec 100644
--- a/Examples/MAX32675/I2C/main.c
+++ b/Examples/MAX32675/I2C/main.c
@@ -33,7 +33,7 @@
 
 /**
  * @file        main.c
- * @brief       I2C Loopback Example
+ * @brief       I2C Master-Slave Transaction Demo
  * @details     This example uses the I2C Master to read/write from/to the I2C Slave. 
  *              For this example, user must connect I2C Master SCL pin to I2C Slave SCL 
  *              pin and I2C Master SDA pin to I2C Slave SDA pin. User must also connect
@@ -45,50 +45,64 @@
  */
 
 /***** Includes *****/
+
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
 #include "mxc_device.h"
 #include "mxc_delay.h"
+#include "mxc_errors.h"
 #include "nvic_table.h"
 #include "i2c.h"
 #include "dma.h"
+#include "led.h"
 
 /***** Definitions *****/
-// #define MASTERDMA
 
-#define I2C_MASTER MXC_I2C2
-#define I2C_SLAVE MXC_I2C0
+#define MASTERDMA //Comment this line out if standard I2C transaction is required
+
+#define I2C_MASTER MXC_I2C0
+#define I2C_SLAVE MXC_I2C2
 
 #define I2C_FREQ 100000
 #define I2C_SLAVE_ADDR (0x51)
-#define I2C_BYTES 100
+#define I2C_BYTES 255
 
 /***** Globals *****/
+
 static uint8_t Stxdata[I2C_BYTES];
 static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA_TX_CH;
+int8_t DMA_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
 volatile int rxnum = 0;
-volatile int num;
+
 /***** Functions *****/
 
 //Slave interrupt handler
-void I2C0_IRQHandler(void)
+void I2C2_IRQHandler(void)
 {
     MXC_I2C_AsyncHandler(I2C_SLAVE);
-    return;
+}
+
+void DMA_TX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
+}
+
+void DMA_RX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
 }
 
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
     I2C_FLAG = error;
-    return;
 }
 
 int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
@@ -101,12 +115,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         break;
 
     case MXC_I2C_EVT_MASTER_RD:
-
         // Serve as a 16 byte loopback, returning data*2
-        for (int i = 0; i < I2C_BYTES; i++) {
-            Stxdata[i] = Srxdata[i];
-        }
-
         txnum = I2C_BYTES;
         txcnt = 0;
         i2c->intfl0 = MXC_F_I2C_INTFL0_TX_LOCKOUT | MXC_F_I2C_INTFL0_ADDR_MATCH;
@@ -115,16 +124,14 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
         rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
-
         if (rxnum == I2C_BYTES) {
-            i2c->inten0 |= MXC_F_I2C_INTFL0_ADDR_MATCH;
+            i2c->inten0 |= MXC_F_I2C_INTEN0_ADDR_MATCH;
         }
 
         break;
 
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
-
         // Write as much data as possible into TX FIFO
         // Unless we're at the end of the transaction (only write what's needed)
         if (txcnt >= txnum) {
@@ -140,9 +147,10 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
             printf("i2c->intfl0 = 0x%08x\n", i2c->intfl0);
-            printf("i2c->status  = 0x%08x\n", i2c->status);
+            printf("i2c->status = 0x%08x\n", i2c->status);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
             rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
@@ -157,6 +165,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
 
     for (i = 0; i < sizeof(txdata); ++i) {
@@ -195,7 +204,7 @@ int verifyData(void)
 // *****************************************************************************
 int main()
 {
-    printf("\n******** I2C SLAVE ASYNC TRANSACTION TEST *********\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
     printf("\nThis example uses one I2C peripheral as a master to\n");
     printf("read and write to another I2C which acts as a slave.\n");
 
@@ -206,25 +215,34 @@ int main()
 
     //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
+    if (error != E_NO_ERROR) {
+        printf("Failed master\n");
+        return error;
+    }
 
+#ifdef MASTERDMA
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA, true, true);
     if (error != E_NO_ERROR) {
-        printf("-->Failed master\n");
+        printf("Failed DMA master\n");
         return error;
-    } else {
-        printf("\n-->I2C Master Initialization Complete");
     }
+#endif
+
+    printf("\n-->I2C Master Initialization Complete");
 
     //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
-
     if (error != E_NO_ERROR) {
         printf("Failed slave\n");
         return error;
-    } else {
-        printf("\n-->I2C Slave Initialization Complete");
     }
 
-    NVIC_EnableIRQ(I2C0_IRQn);
+    printf("\n-->I2C Slave Initialization Complete");
+
+    MXC_NVIC_SetVector(I2C2_IRQn, I2C2_IRQHandler);
+    NVIC_EnableIRQ(I2C2_IRQn);
+    __enable_irq();
 
     MXC_I2C_SetFrequency(I2C_MASTER, I2C_FREQ);
 
@@ -258,19 +276,36 @@ int main()
         return error;
     }
 
+#ifdef MASTERDMA
+    DMA_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
+
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_TX_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_RX_CH), DMA_RX_IRQHandler);
+
+    if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster)) != 0) {
+        printf("Error writing: %d\n", error);
+        return error;
+    }
+#else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
 
     printf("\n-->Result: \n");
-
     printData();
-
     printf("\n");
 
+    MXC_I2C_Shutdown(I2C_MASTER);
+    MXC_I2C_Shutdown(I2C_SLAVE);
+
     if (verifyData() == E_NO_ERROR) {
         printf("\n-->I2C Transaction Successful\n");
     } else {
diff --git a/Examples/MAX32675/Library_Generate/gpiolib.c b/Examples/MAX32675/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32675/Library_Generate/gpiolib.c
+++ b/Examples/MAX32675/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32675/Library_Generate/gpiolib.h b/Examples/MAX32675/Library_Generate/gpiolib.h
index 9fd4bee5ba..e63403cbc2 100644
--- a/Examples/MAX32675/Library_Generate/gpiolib.h
+++ b/Examples/MAX32675/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32675_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32675_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32675_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32675/Library_Use/lib/include/gpiolib.h b/Examples/MAX32675/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..398a006f60 100644
--- a/Examples/MAX32675/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32675/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32675_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32675_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32675_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX32680/EEPROM_Emulator/src/eeprom.c b/Examples/MAX32680/EEPROM_Emulator/src/eeprom.c
index aa96c0e58a..38e3748ac2 100644
--- a/Examples/MAX32680/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX32680/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX32680/GPIO/main.c b/Examples/MAX32680/GPIO/main.c
index 80290f658d..adc2d0b50d 100644
--- a/Examples/MAX32680/GPIO/main.c
+++ b/Examples/MAX32680/GPIO/main.c
@@ -92,6 +92,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -104,6 +105,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_isr, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -120,6 +122,7 @@ int main(void)
     gpio_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_in.func = MXC_GPIO_FUNC_IN;
     gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -127,7 +130,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
-    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32680/I2C/README.md b/Examples/MAX32680/I2C/README.md
index 4456d5bc3f..4f6bea53b5 100644
--- a/Examples/MAX32680/I2C/README.md
+++ b/Examples/MAX32680/I2C/README.md
@@ -27,7 +27,7 @@ Universal instructions on building, flashing, and debugging this project can be
 The Console UART of the device will output these messages:
 
 ```
-******** I2C SLAVE ASYNC TRANSACTION TEST *********
+******** I2C Master-Slave Transaction Demo *********
 
 This example uses one I2C peripheral as a master to
 read and write to another I2C which acts as a slave.
@@ -42,9 +42,9 @@ P0.11 to P0.17 (SDA).
 
 -->Result:
 
--->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
--->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
 
 -->I2C Transaction Successful
diff --git a/Examples/MAX32680/I2C/main.c b/Examples/MAX32680/I2C/main.c
index abb37c79ba..a442856629 100644
--- a/Examples/MAX32680/I2C/main.c
+++ b/Examples/MAX32680/I2C/main.c
@@ -33,7 +33,7 @@
 
 /**
  * @file        main.c
- * @brief       I2C Loopback Example
+ * @brief       I2C Master-Slave Transaction Demo
  * @details     This example uses the I2C Master to read/write from/to the I2C Slave. For
  *              this example you must connect P0.10 to P0.16 (SCL) and P0.11 to P0.17 (SCL). The Master
  *              will use P0.10 and P0.11. The Slave will use P0.16 and P0.17. You must also
@@ -51,40 +51,51 @@
 #include "dma.h"
 
 /***** Definitions *****/
-// #define MASTERDMA
+
+#define MASTERDMA //Comment this line out if standard I2C transaction is required
 
 #define I2C_MASTER MXC_I2C1
 #define I2C_SLAVE MXC_I2C0
 
 #define I2C_FREQ 100000
 #define I2C_SLAVE_ADDR (0x51)
-#define I2C_BYTES 100
+#define I2C_BYTES 255
 
 /***** Globals *****/
+
 static uint8_t Stxdata[I2C_BYTES];
 static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA_TX_CH;
+int8_t DMA_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
 volatile int rxnum = 0;
-volatile int num;
+
 /***** Functions *****/
 
 //Slave interrupt handler
 void I2C0_IRQHandler(void)
 {
     MXC_I2C_AsyncHandler(I2C_SLAVE);
-    return;
+}
+
+void DMA_TX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
+}
+
+void DMA_RX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
 }
 
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
     I2C_FLAG = error;
-    return;
 }
 
 int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
@@ -97,12 +108,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         break;
 
     case MXC_I2C_EVT_MASTER_RD:
-
         // Serve as a 16 byte loopback, returning data*2
-        for (int i = 0; i < I2C_BYTES; i++) {
-            Stxdata[i] = Srxdata[i];
-        }
-
         txnum = I2C_BYTES;
         txcnt = 0;
         i2c->intfl0 = MXC_F_I2C_INTFL0_TX_LOCKOUT | MXC_F_I2C_INTFL0_ADDR_MATCH;
@@ -111,7 +117,6 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
         rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
-
         if (rxnum == I2C_BYTES) {
             i2c->inten0 |= MXC_F_I2C_INTEN0_ADDR_MATCH;
         }
@@ -120,7 +125,6 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
-
         // Write as much data as possible into TX FIFO
         // Unless we're at the end of the transaction (only write what's needed)
         if (txcnt >= txnum) {
@@ -135,10 +139,11 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
     default:
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
-            printf("i2c->int_fl0 = 0x%08x\n", i2c->intfl0);
-            printf("i2c->status  = 0x%08x\n", i2c->status);
+            printf("i2c->intfl0 = 0x%08x\n", i2c->intfl0);
+            printf("i2c->status = 0x%08x\n", i2c->status);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
             rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
@@ -153,6 +158,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
 
     for (i = 0; i < sizeof(txdata); ++i) {
@@ -191,7 +197,7 @@ int verifyData(void)
 // *****************************************************************************
 int main()
 {
-    printf("\n******** I2C SLAVE ASYNC TRANSACTION TEST *********\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
     printf("\nThis example uses one I2C peripheral as a master to\n");
     printf("read and write to another I2C which acts as a slave.\n");
 
@@ -202,26 +208,34 @@ int main()
 
     //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
+    if (error != E_NO_ERROR) {
+        printf("Failed master\n");
+        return error;
+    }
 
+#ifdef MASTERDMA
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA, true, true);
     if (error != E_NO_ERROR) {
-        printf("-->Failed master\n");
+        printf("Failed DMA master\n");
         return error;
-    } else {
-        printf("\n-->I2C Master Initialization Complete");
     }
+#endif
+
+    printf("\n-->I2C Master Initialization Complete");
 
     //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
-
     if (error != E_NO_ERROR) {
         printf("Failed slave\n");
         return error;
-    } else {
-        printf("\n-->I2C Slave Initialization Complete");
     }
 
+    printf("\n-->I2C Slave Initialization Complete");
+
     MXC_NVIC_SetVector(I2C0_IRQn, I2C0_IRQHandler);
     NVIC_EnableIRQ(I2C0_IRQn);
+    __enable_irq();
 
     MXC_I2C_SetFrequency(I2C_MASTER, I2C_FREQ);
 
@@ -255,19 +269,36 @@ int main()
         return error;
     }
 
+#ifdef MASTERDMA
+    DMA_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
+
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_TX_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_RX_CH), DMA_RX_IRQHandler);
+
+    if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster)) != 0) {
+        printf("Error writing: %d\n", error);
+        return error;
+    }
+#else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
 
     printf("\n-->Result: \n");
-
     printData();
-
     printf("\n");
 
+    MXC_I2C_Shutdown(I2C_MASTER);
+    MXC_I2C_Shutdown(I2C_SLAVE);
+
     if (verifyData() == E_NO_ERROR) {
         printf("\n-->I2C Transaction Successful\n");
     } else {
diff --git a/Examples/MAX32680/Library_Generate/gpiolib.c b/Examples/MAX32680/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32680/Library_Generate/gpiolib.c
+++ b/Examples/MAX32680/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32680/Library_Generate/gpiolib.h b/Examples/MAX32680/Library_Generate/gpiolib.h
index 9fd4bee5ba..932ea994da 100644
--- a/Examples/MAX32680/Library_Generate/gpiolib.h
+++ b/Examples/MAX32680/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32680_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32680_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32680_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32680/Library_Use/lib/include/gpiolib.h b/Examples/MAX32680/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..f92dae5e64 100644
--- a/Examples/MAX32680/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32680/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32680_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32680_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32680_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX32690/EEPROM_Emulator/src/eeprom.c b/Examples/MAX32690/EEPROM_Emulator/src/eeprom.c
index aa96c0e58a..38e3748ac2 100644
--- a/Examples/MAX32690/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX32690/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX32690/GPIO/main.c b/Examples/MAX32690/GPIO/main.c
index 70683ec1a1..28396a60f2 100644
--- a/Examples/MAX32690/GPIO/main.c
+++ b/Examples/MAX32690/GPIO/main.c
@@ -100,6 +100,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 #endif
 
@@ -113,6 +114,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_callback, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -126,6 +128,7 @@ int main(void)
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
     gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX32690/I2C/README.md b/Examples/MAX32690/I2C/README.md
index bb01a39bc1..636a722086 100644
--- a/Examples/MAX32690/I2C/README.md
+++ b/Examples/MAX32690/I2C/README.md
@@ -31,7 +31,7 @@ If using the MAX32690FTHR:
 The Console UART of the device will output these messages:
 
 ```
-******** I2C SLAVE ASYNC TRANSACTION TEST *********
+******** I2C Master-Slave Transaction Demo *********
 
 This example uses one I2C peripheral as a master to
 read and write to another I2C which acts as a slave.
@@ -46,9 +46,9 @@ P1.7->P2.7 (SDA).
 
 -->Result:
 
--->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
--->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
 
 -->I2C Transaction Successful
diff --git a/Examples/MAX32690/I2C/main.c b/Examples/MAX32690/I2C/main.c
index fd02f339a9..f2db68c943 100644
--- a/Examples/MAX32690/I2C/main.c
+++ b/Examples/MAX32690/I2C/main.c
@@ -33,7 +33,7 @@
 
 /**
  * @file        main.c
- * @brief       I2C Loopback Example
+ * @brief       I2C Master-Slave Transaction Demo
  * @details     This example uses the I2C Master to read/write from/to the I2C Slave. 
  *              For this example, user must connect I2C Master SCL pin to I2C Slave SCL 
  *              pin and I2C Master SDA pin to I2C Slave SDA pin. User must also connect
@@ -45,6 +45,7 @@
  */
 
 /***** Includes *****/
+
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
@@ -57,6 +58,7 @@
 #include "led.h"
 
 /***** Definitions *****/
+
 #define MASTERDMA //Comment this line out if standard I2C transaction is required
 
 #define I2C_MASTER MXC_I2C0
@@ -67,11 +69,13 @@
 #define I2C_BYTES 255
 
 /***** Globals *****/
+
 static uint8_t Stxdata[I2C_BYTES];
 static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA_TX_CH;
+int8_t DMA_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
@@ -83,28 +87,22 @@ volatile int rxnum = 0;
 void I2C2_IRQHandler(void)
 {
     MXC_I2C_AsyncHandler(I2C_SLAVE);
-    return;
 }
 
-void DMA0_IRQHandler(void)
+void DMA_TX_IRQHandler(void)
 {
     MXC_DMA_Handler();
-    MXC_DMA_ReleaseChannel(0);
-    DMA_FLAG = 1;
 }
 
-void DMA1_IRQHandler(void)
+void DMA_RX_IRQHandler(void)
 {
     MXC_DMA_Handler();
-    MXC_DMA_ReleaseChannel(1);
-    DMA_FLAG = 1;
 }
 
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
     I2C_FLAG = error;
-    return;
 }
 
 int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
@@ -115,22 +113,23 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         // Clear bytes written
         rxnum = 0;
         break;
+
     case MXC_I2C_EVT_MASTER_RD:
         // Serve as a 16 byte loopback, returning data*2
-        for (int i = 0; i < I2C_BYTES; i++) {
-            Stxdata[i] = Srxdata[i];
-        }
         txnum = I2C_BYTES;
         txcnt = 0;
         i2c->intfl0 = MXC_F_I2C_INTFL0_TX_LOCKOUT | MXC_F_I2C_INTFL0_ADDR_MATCH;
         break;
+
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
         rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
         if (rxnum == I2C_BYTES) {
             i2c->inten0 |= MXC_F_I2C_INTEN0_ADDR_MATCH;
         }
+
         break;
+
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
         // Write as much data as possible into TX FIFO
@@ -138,23 +137,27 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         if (txcnt >= txnum) {
             break;
         }
+
         int num = MXC_I2C_GetTXFIFOAvailable(i2c);
         num = (num > (txnum - txcnt)) ? (txnum - txcnt) : num;
         txcnt += MXC_I2C_WriteTXFIFO(i2c, &Stxdata[txcnt], num);
         break;
+
     default:
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
             printf("i2c->intfl0 = 0x%08x\n", i2c->intfl0);
-            printf("i2c->status  = 0x%08x\n", i2c->status);
+            printf("i2c->status = 0x%08x\n", i2c->status);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
             rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
             return 1;
         }
     }
+
     return 0;
 }
 
@@ -162,12 +165,15 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
+
     for (i = 0; i < sizeof(txdata); ++i) {
         printf("%02x ", txdata[i]);
     }
 
     printf("\n\n-->RxData: ");
+
     for (i = 0; i < sizeof(rxdata); ++i) {
         printf("%02x ", rxdata[i]);
     }
@@ -181,11 +187,13 @@ void printData(void)
 int verifyData(void)
 {
     int i, fails = 0;
+
     for (i = 0; i < I2C_BYTES; ++i) {
         if (txdata[i] != rxdata[i]) {
             ++fails;
         }
     }
+
     if (fails > 0) {
         return E_FAIL;
     }
@@ -196,7 +204,7 @@ int verifyData(void)
 // *****************************************************************************
 int main()
 {
-    printf("\n******** I2C SLAVE ASYNC TRANSACTION TEST *********\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
     printf("\nThis example uses one I2C peripheral as a master to\n");
     printf("read and write to another I2C which acts as a slave.\n");
 
@@ -208,9 +216,20 @@ int main()
     //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
     if (error != E_NO_ERROR) {
-        printf("Failed master\n");
+        printf("Failed master.\n");
+        return error;
+    }
+
+#ifdef MASTERDMA
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA, true, true);
+    if (error != E_NO_ERROR) {
+        printf("Failed DMA master\n");
         return error;
     }
+#endif
+
+    printf("\n-->I2C Master Initialization Complete");
 
     //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
@@ -219,6 +238,8 @@ int main()
         return error;
     }
 
+    printf("\n-->I2C Slave Initialization Complete");
+
     MXC_NVIC_SetVector(I2C2_IRQn, I2C2_IRQHandler);
     NVIC_EnableIRQ(I2C2_IRQn);
     __enable_irq();
@@ -231,6 +252,8 @@ int main()
     for (i = 0; i < I2C_BYTES; i++) {
         txdata[i] = i;
         rxdata[i] = 0;
+        Stxdata[i] = i;
+        Srxdata[i] = 0;
     }
 
     // This will write data to slave
@@ -254,37 +277,39 @@ int main()
     }
 
 #ifdef MASTERDMA
-    MXC_DMA_ReleaseChannel(0);
-    MXC_DMA_ReleaseChannel(1);
+    DMA_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
 
-    NVIC_EnableIRQ(DMA0_IRQn);
-    NVIC_EnableIRQ(DMA1_IRQn);
-    __enable_irq();
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_TX_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_RX_CH), DMA_RX_IRQHandler);
 
     if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
-    while (DMA_FLAG == 0) {}
 #else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
-#endif
 
     printf("\n-->Result: \n");
     printData();
     printf("\n");
 
+    MXC_I2C_Shutdown(I2C_MASTER);
+    MXC_I2C_Shutdown(I2C_SLAVE);
+
     if (verifyData() == E_NO_ERROR) {
         printf("\n-->I2C Transaction Successful\n");
-        LED_On(LED_GREEN);
     } else {
         printf("\n-->I2C Transaction Failed\n");
-        LED_On(LED_RED);
         return E_FAIL;
     }
 
diff --git a/Examples/MAX32690/Library_Generate/gpiolib.c b/Examples/MAX32690/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX32690/Library_Generate/gpiolib.c
+++ b/Examples/MAX32690/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX32690/Library_Generate/gpiolib.h b/Examples/MAX32690/Library_Generate/gpiolib.h
index 9fd4bee5ba..8763aa2472 100644
--- a/Examples/MAX32690/Library_Generate/gpiolib.h
+++ b/Examples/MAX32690/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32690_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX32690_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32690_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX32690/Library_Use/lib/include/gpiolib.h b/Examples/MAX32690/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..7333d11d9f 100644
--- a/Examples/MAX32690/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX32690/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX32690_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX32690_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX32690_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX78000/CNN/UNet-demo/cnn.c b/Examples/MAX78000/CNN/UNet-demo/cnn.c
index e22e35b7ed..44a9bf2e8e 100644
--- a/Examples/MAX78000/CNN/UNet-demo/cnn.c
+++ b/Examples/MAX78000/CNN/UNet-demo/cnn.c
@@ -1074,6 +1074,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1087,6 +1089,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/UNet-demo/main.c b/Examples/MAX78000/CNN/UNet-demo/main.c
index 733fa9bcf2..69794ec1ea 100644
--- a/Examples/MAX78000/CNN/UNet-demo/main.c
+++ b/Examples/MAX78000/CNN/UNet-demo/main.c
@@ -469,6 +469,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_5;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/UNet-highres-demo/cnn.c b/Examples/MAX78000/CNN/UNet-highres-demo/cnn.c
index 40932645b1..23c28fd2ca 100644
--- a/Examples/MAX78000/CNN/UNet-highres-demo/cnn.c
+++ b/Examples/MAX78000/CNN/UNet-highres-demo/cnn.c
@@ -1395,6 +1395,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1408,6 +1410,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/aisegment_unet-demo/cnn.c b/Examples/MAX78000/CNN/aisegment_unet-demo/cnn.c
index a433991dd1..bcad6bb403 100644
--- a/Examples/MAX78000/CNN/aisegment_unet-demo/cnn.c
+++ b/Examples/MAX78000/CNN/aisegment_unet-demo/cnn.c
@@ -1222,6 +1222,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1235,6 +1237,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/aisegment_unet/cnn.c b/Examples/MAX78000/CNN/aisegment_unet/cnn.c
index 361c342ae2..41a9a4075d 100644
--- a/Examples/MAX78000/CNN/aisegment_unet/cnn.c
+++ b/Examples/MAX78000/CNN/aisegment_unet/cnn.c
@@ -1219,6 +1219,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1232,6 +1234,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/asl/cnn.c b/Examples/MAX78000/CNN/asl/cnn.c
index 298dda190a..1fc17063fa 100644
--- a/Examples/MAX78000/CNN/asl/cnn.c
+++ b/Examples/MAX78000/CNN/asl/cnn.c
@@ -809,6 +809,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -822,6 +824,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/asl_demo/cnn.c b/Examples/MAX78000/CNN/asl_demo/cnn.c
index 3882efc344..eaa7d59c6c 100644
--- a/Examples/MAX78000/CNN/asl_demo/cnn.c
+++ b/Examples/MAX78000/CNN/asl_demo/cnn.c
@@ -809,6 +809,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -822,6 +824,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/asl_demo/main.c b/Examples/MAX78000/CNN/asl_demo/main.c
index b876fb15ab..bc4987a36a 100644
--- a/Examples/MAX78000/CNN/asl_demo/main.c
+++ b/Examples/MAX78000/CNN/asl_demo/main.c
@@ -317,6 +317,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_5;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
     /* Initialize TFT display */
diff --git a/Examples/MAX78000/CNN/camvid_unet/cnn.c b/Examples/MAX78000/CNN/camvid_unet/cnn.c
index 76e517eaa5..800b5371fa 100644
--- a/Examples/MAX78000/CNN/camvid_unet/cnn.c
+++ b/Examples/MAX78000/CNN/camvid_unet/cnn.c
@@ -1213,6 +1213,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1226,6 +1228,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/cats-dogs/cnn.c b/Examples/MAX78000/CNN/cats-dogs/cnn.c
index e66a965a44..1661862ea8 100644
--- a/Examples/MAX78000/CNN/cats-dogs/cnn.c
+++ b/Examples/MAX78000/CNN/cats-dogs/cnn.c
@@ -592,6 +592,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -605,6 +607,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/cats-dogs_demo/cnn.c b/Examples/MAX78000/CNN/cats-dogs_demo/cnn.c
index 9682eccac2..a0741e6e3b 100644
--- a/Examples/MAX78000/CNN/cats-dogs_demo/cnn.c
+++ b/Examples/MAX78000/CNN/cats-dogs_demo/cnn.c
@@ -775,6 +775,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -788,6 +790,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/cifar-10-auto-test/cnn.c b/Examples/MAX78000/CNN/cifar-10-auto-test/cnn.c
index 40e95b16cc..197a3c4dfc 100644
--- a/Examples/MAX78000/CNN/cifar-10-auto-test/cnn.c
+++ b/Examples/MAX78000/CNN/cifar-10-auto-test/cnn.c
@@ -663,6 +663,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -676,6 +678,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/cifar-10/cnn.c b/Examples/MAX78000/CNN/cifar-10/cnn.c
index 1809069538..34fd64bd5f 100644
--- a/Examples/MAX78000/CNN/cifar-10/cnn.c
+++ b/Examples/MAX78000/CNN/cifar-10/cnn.c
@@ -823,6 +823,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -836,6 +838,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/cifar-100-mixed/cnn.c b/Examples/MAX78000/CNN/cifar-100-mixed/cnn.c
index 1b974366fe..c848ebcd87 100644
--- a/Examples/MAX78000/CNN/cifar-100-mixed/cnn.c
+++ b/Examples/MAX78000/CNN/cifar-100-mixed/cnn.c
@@ -1086,6 +1086,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1099,6 +1101,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/cifar-100-residual/cnn.c b/Examples/MAX78000/CNN/cifar-100-residual/cnn.c
index 91c7484ddf..47713c7be7 100644
--- a/Examples/MAX78000/CNN/cifar-100-residual/cnn.c
+++ b/Examples/MAX78000/CNN/cifar-100-residual/cnn.c
@@ -1208,6 +1208,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1221,6 +1223,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/cifar-100-simplewide2x-mixed/cnn.c b/Examples/MAX78000/CNN/cifar-100-simplewide2x-mixed/cnn.c
index 39c1990085..eb46e32f42 100644
--- a/Examples/MAX78000/CNN/cifar-100-simplewide2x-mixed/cnn.c
+++ b/Examples/MAX78000/CNN/cifar-100-simplewide2x-mixed/cnn.c
@@ -1090,6 +1090,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1103,6 +1105,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/cifar-100/cnn.c b/Examples/MAX78000/CNN/cifar-100/cnn.c
index 723c6a2f49..ae85bfcf12 100644
--- a/Examples/MAX78000/CNN/cifar-100/cnn.c
+++ b/Examples/MAX78000/CNN/cifar-100/cnn.c
@@ -939,6 +939,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -952,6 +954,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/digit-detection-demo/cnn.c b/Examples/MAX78000/CNN/digit-detection-demo/cnn.c
index c479f485b6..693eac7ade 100644
--- a/Examples/MAX78000/CNN/digit-detection-demo/cnn.c
+++ b/Examples/MAX78000/CNN/digit-detection-demo/cnn.c
@@ -1271,6 +1271,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1284,6 +1286,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/digit-detection-demo/main.c b/Examples/MAX78000/CNN/digit-detection-demo/main.c
index da3750b668..72900c8c10 100644
--- a/Examples/MAX78000/CNN/digit-detection-demo/main.c
+++ b/Examples/MAX78000/CNN/digit-detection-demo/main.c
@@ -345,6 +345,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_5;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/faceid/cnn.c b/Examples/MAX78000/CNN/faceid/cnn.c
index 84930b2c49..4f7b5d1df4 100644
--- a/Examples/MAX78000/CNN/faceid/cnn.c
+++ b/Examples/MAX78000/CNN/faceid/cnn.c
@@ -1004,6 +1004,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1017,6 +1019,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/faceid_evkit-riscv/src/cnn.c b/Examples/MAX78000/CNN/faceid_evkit-riscv/src/cnn.c
index a277bdf1ff..c21cc6754e 100644
--- a/Examples/MAX78000/CNN/faceid_evkit-riscv/src/cnn.c
+++ b/Examples/MAX78000/CNN/faceid_evkit-riscv/src/cnn.c
@@ -1715,6 +1715,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1728,6 +1730,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/faceid_evkit/src/cnn.c b/Examples/MAX78000/CNN/faceid_evkit/src/cnn.c
index 3bcd5e4e1f..89d48483a7 100644
--- a/Examples/MAX78000/CNN/faceid_evkit/src/cnn.c
+++ b/Examples/MAX78000/CNN/faceid_evkit/src/cnn.c
@@ -1697,6 +1697,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1710,6 +1712,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/facial_recognition/SDHC_weights/main.c b/Examples/MAX78000/CNN/facial_recognition/SDHC_weights/main.c
index a04d30bd8d..b0bc2975df 100644
--- a/Examples/MAX78000/CNN/facial_recognition/SDHC_weights/main.c
+++ b/Examples/MAX78000/CNN/facial_recognition/SDHC_weights/main.c
@@ -396,6 +396,7 @@ void waitCardInserted()
     cardDetect.func = MXC_GPIO_FUNC_IN;
     cardDetect.pad = MXC_GPIO_PAD_NONE;
     cardDetect.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    cardDetect.drvstr = MXC_GPIO_DRVSTR_0;
 
     MXC_GPIO_Config(&cardDetect);
 
diff --git a/Examples/MAX78000/CNN/facial_recognition/src/cnn_1.c b/Examples/MAX78000/CNN/facial_recognition/src/cnn_1.c
index 315d95b180..90d658a5dc 100644
--- a/Examples/MAX78000/CNN/facial_recognition/src/cnn_1.c
+++ b/Examples/MAX78000/CNN/facial_recognition/src/cnn_1.c
@@ -1150,6 +1150,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1163,6 +1165,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/facial_recognition/src/sd.c b/Examples/MAX78000/CNN/facial_recognition/src/sd.c
index f85cc19503..f448316ea1 100644
--- a/Examples/MAX78000/CNN/facial_recognition/src/sd.c
+++ b/Examples/MAX78000/CNN/facial_recognition/src/sd.c
@@ -516,6 +516,7 @@ void waitCardInserted()
     cardDetect.func = MXC_GPIO_FUNC_IN;
     cardDetect.pad = MXC_GPIO_PAD_NONE;
     cardDetect.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    cardDetect.drvstr = MXC_GPIO_DRVSTR_0;
 
     MXC_GPIO_Config(&cardDetect);
 
diff --git a/Examples/MAX78000/CNN/kws20_demo-riscv/cnn.c b/Examples/MAX78000/CNN/kws20_demo-riscv/cnn.c
index 2d4c4d1e70..56d167b59f 100644
--- a/Examples/MAX78000/CNN/kws20_demo-riscv/cnn.c
+++ b/Examples/MAX78000/CNN/kws20_demo-riscv/cnn.c
@@ -860,6 +860,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -873,6 +875,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/kws20_demo/cnn.c b/Examples/MAX78000/CNN/kws20_demo/cnn.c
index 2f07fadafe..8dd2be6bc3 100644
--- a/Examples/MAX78000/CNN/kws20_demo/cnn.c
+++ b/Examples/MAX78000/CNN/kws20_demo/cnn.c
@@ -653,6 +653,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -666,6 +668,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/kws20_v3/cnn.c b/Examples/MAX78000/CNN/kws20_v3/cnn.c
index 2f07fadafe..8dd2be6bc3 100644
--- a/Examples/MAX78000/CNN/kws20_v3/cnn.c
+++ b/Examples/MAX78000/CNN/kws20_v3/cnn.c
@@ -653,6 +653,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -666,6 +668,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/mnist-riscv/cnn.c b/Examples/MAX78000/CNN/mnist-riscv/cnn.c
index 6a0d7c7268..ad4a7bc6cb 100644
--- a/Examples/MAX78000/CNN/mnist-riscv/cnn.c
+++ b/Examples/MAX78000/CNN/mnist-riscv/cnn.c
@@ -489,6 +489,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -502,6 +504,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/mnist/cnn.c b/Examples/MAX78000/CNN/mnist/cnn.c
index 8784251857..7759fa5f3f 100644
--- a/Examples/MAX78000/CNN/mnist/cnn.c
+++ b/Examples/MAX78000/CNN/mnist/cnn.c
@@ -483,6 +483,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -496,6 +498,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/rps-demo/cnn.c b/Examples/MAX78000/CNN/rps-demo/cnn.c
index 3f399aaca1..fe82a3ee49 100644
--- a/Examples/MAX78000/CNN/rps-demo/cnn.c
+++ b/Examples/MAX78000/CNN/rps-demo/cnn.c
@@ -782,6 +782,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -795,6 +797,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/rps-demo/main.c b/Examples/MAX78000/CNN/rps-demo/main.c
index 87cbe946dc..b7bf2f7651 100644
--- a/Examples/MAX78000/CNN/rps-demo/main.c
+++ b/Examples/MAX78000/CNN/rps-demo/main.c
@@ -413,6 +413,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_5;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/rps/cnn.c b/Examples/MAX78000/CNN/rps/cnn.c
index 3f399aaca1..fe82a3ee49 100644
--- a/Examples/MAX78000/CNN/rps/cnn.c
+++ b/Examples/MAX78000/CNN/rps/cnn.c
@@ -782,6 +782,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -795,6 +797,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/snake_game_demo/cnn.c b/Examples/MAX78000/CNN/snake_game_demo/cnn.c
index e104dd12a6..f0c4899641 100644
--- a/Examples/MAX78000/CNN/snake_game_demo/cnn.c
+++ b/Examples/MAX78000/CNN/snake_game_demo/cnn.c
@@ -854,6 +854,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -867,6 +869,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/CNN/svhn_tinierssd/cnn.c b/Examples/MAX78000/CNN/svhn_tinierssd/cnn.c
index 6f942581b3..3c70370109 100644
--- a/Examples/MAX78000/CNN/svhn_tinierssd/cnn.c
+++ b/Examples/MAX78000/CNN/svhn_tinierssd/cnn.c
@@ -1904,6 +1904,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1917,6 +1919,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78000/EEPROM_Emulator/src/eeprom.c b/Examples/MAX78000/EEPROM_Emulator/src/eeprom.c
index aa96c0e58a..38e3748ac2 100644
--- a/Examples/MAX78000/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX78000/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX78000/GPIO/main.c b/Examples/MAX78000/GPIO/main.c
index 2d4f81660c..e067ead235 100644
--- a/Examples/MAX78000/GPIO/main.c
+++ b/Examples/MAX78000/GPIO/main.c
@@ -112,6 +112,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -124,6 +125,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_isr, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -139,6 +141,8 @@ int main(void)
     gpio_in.mask = MXC_GPIO_PIN_IN;
     gpio_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_in.func = MXC_GPIO_FUNC_IN;
+    gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -146,6 +150,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX78000/LP/main.c b/Examples/MAX78000/LP/main.c
index fd7206b911..237d4e1b12 100644
--- a/Examples/MAX78000/LP/main.c
+++ b/Examples/MAX78000/LP/main.c
@@ -210,6 +210,7 @@ int main(void)
     gpios_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpios_in.func = MXC_GPIO_FUNC_IN;
     gpios_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpios_in.drvstr = MXC_GPIO_DRVSTR_0;
 
     // PORT3 input
     gpios_in.port = MXC_GPIO3;
diff --git a/Examples/MAX78000/Library_Generate/gpiolib.c b/Examples/MAX78000/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX78000/Library_Generate/gpiolib.c
+++ b/Examples/MAX78000/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX78000/Library_Generate/gpiolib.h b/Examples/MAX78000/Library_Generate/gpiolib.h
index 9fd4bee5ba..3f6bb285ee 100644
--- a/Examples/MAX78000/Library_Generate/gpiolib.h
+++ b/Examples/MAX78000/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX78000_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX78000_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX78000_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX78000/Library_Use/lib/include/gpiolib.h b/Examples/MAX78000/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..be95c1084f 100644
--- a/Examples/MAX78000/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX78000/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX78000_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX78000_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX78000_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX78000/SDHC_FTHR/main.c b/Examples/MAX78000/SDHC_FTHR/main.c
index cc34a7fdd7..5216dc9ed1 100644
--- a/Examples/MAX78000/SDHC_FTHR/main.c
+++ b/Examples/MAX78000/SDHC_FTHR/main.c
@@ -524,6 +524,7 @@ void waitCardInserted()
     cardDetect.func = MXC_GPIO_FUNC_IN;
     cardDetect.pad = MXC_GPIO_PAD_NONE;
     cardDetect.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    cardDetect.drvstr = MXC_GPIO_DRVSTR_0;
 
     MXC_GPIO_Config(&cardDetect);
 
diff --git a/Examples/MAX78002/CNN/cifar-100-effnet2/cnn.c b/Examples/MAX78002/CNN/cifar-100-effnet2/cnn.c
index 9cdd73c5b4..a068bbc3ca 100644
--- a/Examples/MAX78002/CNN/cifar-100-effnet2/cnn.c
+++ b/Examples/MAX78002/CNN/cifar-100-effnet2/cnn.c
@@ -2505,6 +2505,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -2518,6 +2520,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78002/CNN/cifar-100-mobilenet-v2-0.75/cnn.c b/Examples/MAX78002/CNN/cifar-100-mobilenet-v2-0.75/cnn.c
index f585a8f3a8..297ced8e30 100644
--- a/Examples/MAX78002/CNN/cifar-100-mobilenet-v2-0.75/cnn.c
+++ b/Examples/MAX78002/CNN/cifar-100-mobilenet-v2-0.75/cnn.c
@@ -5075,6 +5075,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -5088,6 +5090,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78002/CNN/faceid/cnn.c b/Examples/MAX78002/CNN/faceid/cnn.c
index 9fe222685b..03dd5339a7 100644
--- a/Examples/MAX78002/CNN/faceid/cnn.c
+++ b/Examples/MAX78002/CNN/faceid/cnn.c
@@ -1104,6 +1104,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1117,6 +1119,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78002/CNN/faceid_evkit/src/cnn.c b/Examples/MAX78002/CNN/faceid_evkit/src/cnn.c
index 9fe222685b..03dd5339a7 100644
--- a/Examples/MAX78002/CNN/faceid_evkit/src/cnn.c
+++ b/Examples/MAX78002/CNN/faceid_evkit/src/cnn.c
@@ -1104,6 +1104,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -1117,6 +1119,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78002/CNN/imagenet/cnn.c b/Examples/MAX78002/CNN/imagenet/cnn.c
index 1229d66690..9ea1ce5e85 100644
--- a/Examples/MAX78002/CNN/imagenet/cnn.c
+++ b/Examples/MAX78002/CNN/imagenet/cnn.c
@@ -3708,6 +3708,8 @@ int cnn_boost_enable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutSet(gpio_out.port, gpio_out.mask);
 
@@ -3721,6 +3723,8 @@ int cnn_boost_disable(mxc_gpio_regs_t *port, uint32_t pin)
     gpio_out.mask = pin;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
     MXC_GPIO_OutClr(gpio_out.port, gpio_out.mask);
 
diff --git a/Examples/MAX78002/EEPROM_Emulator/src/eeprom.c b/Examples/MAX78002/EEPROM_Emulator/src/eeprom.c
index aa96c0e58a..38e3748ac2 100644
--- a/Examples/MAX78002/EEPROM_Emulator/src/eeprom.c
+++ b/Examples/MAX78002/EEPROM_Emulator/src/eeprom.c
@@ -98,6 +98,7 @@ int eeprom_init(mxc_i2c_regs_t *eeprom_i2c, mxc_gpio_cfg_t rdy_pin)
     eeprom.rdy_pin.func = MXC_GPIO_FUNC_OUT;
     eeprom.rdy_pin.pad = MXC_GPIO_PAD_NONE;
     eeprom.rdy_pin.vssel = MXC_GPIO_VSSEL_VDDIO;
+    eeprom.rdy_pin.drvstr = MXC_GPIO_DRVSTR_0;
 
     err = MXC_GPIO_Config(&eeprom.rdy_pin);
     if (err != E_NO_ERROR) {
diff --git a/Examples/MAX78002/GPIO/main.c b/Examples/MAX78002/GPIO/main.c
index ea4afe0319..b54885b127 100644
--- a/Examples/MAX78002/GPIO/main.c
+++ b/Examples/MAX78002/GPIO/main.c
@@ -86,6 +86,7 @@ int main(void)
     gpio_interrupt_status.pad = MXC_GPIO_PAD_NONE;
     gpio_interrupt_status.func = MXC_GPIO_FUNC_OUT;
     gpio_interrupt_status.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_interrupt_status.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt_status);
 
     /*
@@ -98,6 +99,7 @@ int main(void)
     gpio_interrupt.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_interrupt.func = MXC_GPIO_FUNC_IN;
     gpio_interrupt.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    gpio_interrupt.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_interrupt);
     MXC_GPIO_RegisterCallback(&gpio_interrupt, gpio_isr, &gpio_interrupt_status);
     MXC_GPIO_IntConfig(&gpio_interrupt, MXC_GPIO_INT_FALLING);
@@ -113,6 +115,8 @@ int main(void)
     gpio_in.mask = MXC_GPIO_PIN_IN;
     gpio_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpio_in.func = MXC_GPIO_FUNC_IN;
+    gpio_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_in.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_in);
 
     /* Setup output pin. */
@@ -120,6 +124,8 @@ int main(void)
     gpio_out.mask = MXC_GPIO_PIN_OUT;
     gpio_out.pad = MXC_GPIO_PAD_NONE;
     gpio_out.func = MXC_GPIO_FUNC_OUT;
+    gpio_out.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_out.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_out);
 
     while (1) {
diff --git a/Examples/MAX78002/I2C/README.md b/Examples/MAX78002/I2C/README.md
index 688f259868..9e4feaab84 100644
--- a/Examples/MAX78002/I2C/README.md
+++ b/Examples/MAX78002/I2C/README.md
@@ -22,7 +22,7 @@ Universal instructions on building, flashing, and debugging this project can be
 
 ## Expected Output
 ```
-******** I2C SLAVE ASYNC TRANSACTION TEST *********
+******** I2C Master-Slave Transaction Demo *********
 
 This example uses one I2C peripheral as a master to
 read and write to another I2C which acts as a slave.
@@ -37,9 +37,9 @@ P0.11 to P0.17 (SDA).
 
 -->Result:
 
--->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->TxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
--->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63
+-->RxData: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 51 52 53 54 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 75 76 77 78 79 7a 7b 7c 7d 7e 7f 80 81 82 83 84 85 86 87 88 89 8a 8b 8c 8d 8e 8f 90 91 92 93 94 95 96 97 98 99 9a 9b 9c 9d 9e 9f a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc dd de df e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 ea eb ec ed ee ef f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd fe
 
 
 -->I2C Transaction Successful
diff --git a/Examples/MAX78002/I2C/main.c b/Examples/MAX78002/I2C/main.c
index 28a2595279..89119c4cf3 100644
--- a/Examples/MAX78002/I2C/main.c
+++ b/Examples/MAX78002/I2C/main.c
@@ -33,7 +33,7 @@
 
 /**
  * @file        main.c
- * @brief       I2C Loopback Example
+ * @brief       I2C Master-Slave Transaction Demo
  * @details     This example uses the I2C Master to read/write from/to the I2C Slave. 
  *              For this example, user must connect I2C Master SCL pin to I2C Slave SCL 
  *              pin and I2C Master SDA pin to I2C Slave SDA pin. User must also connect
@@ -45,6 +45,7 @@
  */
 
 /***** Includes *****/
+
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
@@ -55,7 +56,8 @@
 #include "dma.h"
 
 /***** Definitions *****/
-// #define MASTERDMA
+
+#define MASTERDMA //Comment this line out if standard I2C transaction is required
 
 #define I2C_MASTER MXC_I2C1
 #define I2C_SLAVE MXC_I2C0
@@ -65,30 +67,40 @@
 #define I2C_BYTES 100
 
 /***** Globals *****/
+
 static uint8_t Stxdata[I2C_BYTES];
 static uint8_t Srxdata[I2C_BYTES];
 static uint8_t txdata[I2C_BYTES];
 static uint8_t rxdata[I2C_BYTES];
-volatile uint8_t DMA_FLAG = 0;
+int8_t DMA_TX_CH;
+int8_t DMA_RX_CH;
 volatile int I2C_FLAG;
 volatile int txnum = 0;
 volatile int txcnt = 0;
 volatile int rxnum = 0;
-volatile int num;
+
 /***** Functions *****/
 
 //Slave interrupt handler
 void I2C0_IRQHandler(void)
 {
     MXC_I2C_AsyncHandler(I2C_SLAVE);
-    return;
+}
+
+void DMA_TX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
+}
+
+void DMA_RX_IRQHandler(void)
+{
+    MXC_DMA_Handler();
 }
 
 //I2C callback function
 void I2C_Callback(mxc_i2c_req_t *req, int error)
 {
     I2C_FLAG = error;
-    return;
 }
 
 int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
@@ -101,12 +113,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
         break;
 
     case MXC_I2C_EVT_MASTER_RD:
-
         // Serve as a 16 byte loopback, returning data*2
-        for (int i = 0; i < I2C_BYTES; i++) {
-            Stxdata[i] = Srxdata[i];
-        }
-
         txnum = I2C_BYTES;
         txcnt = 0;
         i2c->intfl0 = MXC_F_I2C_INTFL0_TX_LOCKOUT | MXC_F_I2C_INTFL0_ADDR_MATCH;
@@ -115,7 +122,6 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
     case MXC_I2C_EVT_RX_THRESH:
     case MXC_I2C_EVT_OVERFLOW:
         rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
-
         if (rxnum == I2C_BYTES) {
             i2c->inten0 |= MXC_F_I2C_INTEN0_ADDR_MATCH;
         }
@@ -124,7 +130,6 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 
     case MXC_I2C_EVT_TX_THRESH:
     case MXC_I2C_EVT_UNDERFLOW:
-
         // Write as much data as possible into TX FIFO
         // Unless we're at the end of the transaction (only write what's needed)
         if (txcnt >= txnum) {
@@ -139,10 +144,11 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
     default:
         if (*((int *)data) == E_COMM_ERR) {
             printf("I2C Slave Error!\n");
-            printf("i2c->int_fl0 = 0x%08x\n", i2c->intfl0);
-            printf("i2c->status  = 0x%08x\n", i2c->status);
+            printf("i2c->intfl0 = 0x%08x\n", i2c->intfl0);
+            printf("i2c->status = 0x%08x\n", i2c->status);
             I2C_Callback(NULL, E_COMM_ERR);
             return 1;
+
         } else if (*((int *)data) == E_NO_ERROR) {
             rxnum += MXC_I2C_ReadRXFIFO(i2c, &Srxdata[rxnum], MXC_I2C_GetRXFIFOAvailable(i2c));
             I2C_Callback(NULL, E_NO_ERROR);
@@ -157,6 +163,7 @@ int slaveHandler(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_t event, void *data)
 void printData(void)
 {
     int i;
+
     printf("\n-->TxData: ");
 
     for (i = 0; i < sizeof(txdata); ++i) {
@@ -195,7 +202,7 @@ int verifyData(void)
 // *****************************************************************************
 int main()
 {
-    printf("\n******** I2C SLAVE ASYNC TRANSACTION TEST *********\n");
+    printf("\n******** I2C Master-Slave Transaction Demo *********\n");
     printf("\nThis example uses one I2C peripheral as a master to\n");
     printf("read and write to another I2C which acts as a slave.\n");
 
@@ -206,26 +213,34 @@ int main()
 
     //Setup the I2CM
     error = MXC_I2C_Init(I2C_MASTER, 1, 0);
+    if (error != E_NO_ERROR) {
+        printf("Failed master.\n");
+        return error;
+    }
 
+#ifdef MASTERDMA
+    //Setup the I2CM DMA
+    error = MXC_I2C_DMA_Init(I2C_MASTER, MXC_DMA, true, true);
     if (error != E_NO_ERROR) {
-        printf("-->Failed master\n");
+        printf("Failed DMA master\n");
         return error;
-    } else {
-        printf("\n-->I2C Master Initialization Complete");
     }
+#endif
+
+    printf("\n-->I2C Master Initialization Complete");
 
     //Setup the I2CS
     error = MXC_I2C_Init(I2C_SLAVE, 0, I2C_SLAVE_ADDR);
-
     if (error != E_NO_ERROR) {
         printf("Failed slave\n");
         return error;
-    } else {
-        printf("\n-->I2C Slave Initialization Complete");
     }
 
+    printf("\n-->I2C Slave Initialization Complete");
+
     MXC_NVIC_SetVector(I2C0_IRQn, I2C0_IRQHandler);
     NVIC_EnableIRQ(I2C0_IRQn);
+    __enable_irq();
 
     MXC_I2C_SetFrequency(I2C_MASTER, I2C_FREQ);
 
@@ -259,19 +274,36 @@ int main()
         return error;
     }
 
+#ifdef MASTERDMA
+    DMA_TX_CH = MXC_I2C_DMA_GetTXChannel(I2C_MASTER);
+    DMA_RX_CH = MXC_I2C_DMA_GetRXChannel(I2C_MASTER);
+
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_TX_CH));
+    NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(DMA_RX_CH));
+
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_TX_CH), DMA_TX_IRQHandler);
+    MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(DMA_RX_CH), DMA_RX_IRQHandler);
+
+    if ((error = MXC_I2C_MasterTransactionDMA(&reqMaster)) != 0) {
+        printf("Error writing: %d\n", error);
+        return error;
+    }
+#else
     if ((error = MXC_I2C_MasterTransaction(&reqMaster)) != 0) {
         printf("Error writing: %d\n", error);
         return error;
     }
+#endif
 
     while (I2C_FLAG == 1) {}
 
     printf("\n-->Result: \n");
-
     printData();
-
     printf("\n");
 
+    MXC_I2C_Shutdown(I2C_MASTER);
+    MXC_I2C_Shutdown(I2C_SLAVE);
+
     if (verifyData() == E_NO_ERROR) {
         printf("\n-->I2C Transaction Successful\n");
     } else {
diff --git a/Examples/MAX78002/LP/main.c b/Examples/MAX78002/LP/main.c
index 8276935bed..e3fb542014 100644
--- a/Examples/MAX78002/LP/main.c
+++ b/Examples/MAX78002/LP/main.c
@@ -201,6 +201,8 @@ int main(void)
     gpio_trig1.mask = MXC_GPIO_PIN_6;
     gpio_trig1.pad = MXC_GPIO_PAD_NONE;
     gpio_trig1.func = MXC_GPIO_FUNC_OUT;
+    gpio_trig1.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpio_trig1.drvstr = MXC_GPIO_DRVSTR_0;
     MXC_GPIO_Config(&gpio_trig1);
 
 #if DISABLE_GPIO
@@ -211,6 +213,7 @@ int main(void)
     gpios_in.pad = MXC_GPIO_PAD_PULL_UP;
     gpios_in.func = MXC_GPIO_FUNC_IN;
     gpios_in.vssel = MXC_GPIO_VSSEL_VDDIO;
+    gpios_in.drvstr = MXC_GPIO_DRVSTR_0;
 
     // PORT3 input
     gpios_in.port = MXC_GPIO3;
diff --git a/Examples/MAX78002/Library_Generate/gpiolib.c b/Examples/MAX78002/Library_Generate/gpiolib.c
index b0c4936e5e..8b107a6a87 100644
--- a/Examples/MAX78002/Library_Generate/gpiolib.c
+++ b/Examples/MAX78002/Library_Generate/gpiolib.c
@@ -39,6 +39,7 @@
 
 #include "mxc_errors.h"
 #include "gpio.h"
+#include "gpiolib.h"
 
 void gpio_set(const mxc_gpio_cfg_t *gpio)
 {
diff --git a/Examples/MAX78002/Library_Generate/gpiolib.h b/Examples/MAX78002/Library_Generate/gpiolib.h
index 9fd4bee5ba..393420617d 100644
--- a/Examples/MAX78002/Library_Generate/gpiolib.h
+++ b/Examples/MAX78002/Library_Generate/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX78002_LIBRARY_GENERATE_GPIOLIB_H_
+#define EXAMPLES_MAX78002_LIBRARY_GENERATE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX78002_LIBRARY_GENERATE_GPIOLIB_H_
diff --git a/Examples/MAX78002/Library_Use/lib/include/gpiolib.h b/Examples/MAX78002/Library_Use/lib/include/gpiolib.h
index 9fd4bee5ba..de20b8ae78 100644
--- a/Examples/MAX78002/Library_Use/lib/include/gpiolib.h
+++ b/Examples/MAX78002/Library_Use/lib/include/gpiolib.h
@@ -37,8 +37,8 @@
  *
  ******************************************************************************/
 
-#ifndef GPIOLIB_H_
-#define GPIOLIB_H_
+#ifndef EXAMPLES_MAX78002_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
+#define EXAMPLES_MAX78002_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
 
 #include "gpio.h"
 
@@ -61,4 +61,4 @@ void gpio_clear(const mxc_gpio_cfg_t *gpio);
  */
 int gpio_get(const mxc_gpio_cfg_t *gpio);
 
-#endif /* GPIOLIB_H_ */
+#endif // EXAMPLES_MAX78002_LIBRARY_USE_LIB_INCLUDE_GPIOLIB_H_
diff --git a/Examples/MAX78002/TFT_Demo/Makefile b/Examples/MAX78002/TFT_Demo/Makefile
index 80ac454147..cb581b5170 100644
--- a/Examples/MAX78002/TFT_Demo/Makefile
+++ b/Examples/MAX78002/TFT_Demo/Makefile
@@ -123,7 +123,8 @@ MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
 endif
 
 # Final recalculation of LIBS_DIR/CMSIS_ROOT
-LIBS_DIR := $(abspath $(MAXIM_PATH)/Libraries)
+# LIBS_DIR := $(abspath $(MAXIM_PATH)/Libraries)
+LIBS_DIR := ../../../Libraries
 CMSIS_ROOT := $(LIBS_DIR)/CMSIS
 
 # One final UC/LC check in case user set TARGET in project.mk
diff --git a/Examples/MAX78002/TFT_Demo/project.mk b/Examples/MAX78002/TFT_Demo/project.mk
index 49ed48c09b..352bbf0381 100644
--- a/Examples/MAX78002/TFT_Demo/project.mk
+++ b/Examples/MAX78002/TFT_Demo/project.mk
@@ -14,8 +14,12 @@
 # Uncomment to use legacy Adafruit 3315 TFT drivers (TFT = ADAFRUIT)
 # Otherwise, default drivers (TFT = NEWHAVEN) will be used for NewHaven NHD-2.4
 # TFT = ADAFRUIT
+TFT = NEWHAVEN
 
 # Add TFT resources folder to build
 VPATH += resources/tft
 IPATH += resources/tft
 
+MXC_SPI_BUILD_V1 = 0
+
+LIBS_DIR = ../../../Libraries
diff --git a/Libraries/Boards/MAX32520/BCB/Source/board.c b/Libraries/Boards/MAX32520/BCB/Source/board.c
index ba9a888ff8..280ff835f1 100644
--- a/Libraries/Boards/MAX32520/BCB/Source/board.c
+++ b/Libraries/Boards/MAX32520/BCB/Source/board.c
@@ -49,11 +49,13 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {};
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {};
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 // const uart_cfg_t uart_cfg = {
diff --git a/Libraries/Boards/MAX32520/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32520/EvKit_V1/Source/board.c
index 8a0bce2023..3f1044359d 100644
--- a/Libraries/Boards/MAX32520/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32520/EvKit_V1/Source/board.c
@@ -47,16 +47,18 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO1, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX32520/MAX32520FTHR/Source/board.c b/Libraries/Boards/MAX32520/MAX32520FTHR/Source/board.c
index 29cce00fa3..34f7a54c67 100644
--- a/Libraries/Boards/MAX32520/MAX32520FTHR/Source/board.c
+++ b/Libraries/Boards/MAX32520/MAX32520FTHR/Source/board.c
@@ -48,12 +48,14 @@ extern uint32_t SystemCoreClock;
 
 const unsigned int num_pbs = 0;
 
+// clang-format off
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO1, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO1, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO1, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX32570/BCB/Source/board.c b/Libraries/Boards/MAX32570/BCB/Source/board.c
index 5cd48c7ffe..ac04c91409 100644
--- a/Libraries/Boards/MAX32570/BCB/Source/board.c
+++ b/Libraries/Boards/MAX32570/BCB/Source/board.c
@@ -51,15 +51,17 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO2, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 // const uart_cfg_t uart_cfg = {
diff --git a/Libraries/Boards/MAX32570/Emulator/Source/board.c b/Libraries/Boards/MAX32570/Emulator/Source/board.c
index 56818495ca..9b3eda2082 100644
--- a/Libraries/Boards/MAX32570/Emulator/Source/board.c
+++ b/Libraries/Boards/MAX32570/Emulator/Source/board.c
@@ -48,19 +48,21 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO2, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO2, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32570/Emulator_NFC/Source/board.c b/Libraries/Boards/MAX32570/Emulator_NFC/Source/board.c
index 248d6147a6..328f3f20b2 100644
--- a/Libraries/Boards/MAX32570/Emulator_NFC/Source/board.c
+++ b/Libraries/Boards/MAX32570/Emulator_NFC/Source/board.c
@@ -50,19 +50,21 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO2, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO2, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32570/MN_EvKit_V1/Source/board.c b/Libraries/Boards/MAX32570/MN_EvKit_V1/Source/board.c
index c72aaa1c01..c3c99802a5 100644
--- a/Libraries/Boards/MAX32570/MN_EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32570/MN_EvKit_V1/Source/board.c
@@ -55,20 +55,22 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN,
-                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO } };
+                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = { { MXC_GPIO2, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO } };
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
 
 /* Touch screen controller interrupt signal */
 const mxc_gpio_cfg_t ts_int_pin = { MXC_GPIO0, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                    MXC_GPIO_VSSEL_VDDIOH };
+                                    MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 /* Touch screen controller busy signal */
 const mxc_gpio_cfg_t ts_busy_pin = { MXC_GPIO0, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                     MXC_GPIO_VSSEL_VDDIOH };
+                                     MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+// clang-format on
 
 /******************************************************************************/
 /** 
@@ -204,15 +206,15 @@ int Board_Init(void)
     mxc_tft_spi_config tft_spi_config = {
         .regs = MXC_SPI1,
         .gpio = { MXC_GPIO0, MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 | MXC_GPIO_PIN_31,
-                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
         .freq = 12000000,
         .ss_idx = 0,
     };
 
-    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO1, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
-    mxc_gpio_cfg_t tft_bl_pin = { MXC_GPIO1, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE,
-                                  MXC_GPIO_VSSEL_VDDIOH };
+    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO1,         MXC_GPIO_PIN_17,       MXC_GPIO_FUNC_OUT,
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+    mxc_gpio_cfg_t tft_bl_pin = { MXC_GPIO1,         MXC_GPIO_PIN_16,       MXC_GPIO_FUNC_OUT,
+                                  MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
     MXC_TFT_PreInit(&tft_spi_config, &tft_reset_pin, &tft_bl_pin);
 
diff --git a/Libraries/Boards/MAX32570/M_EvKit_V1/Source/board.c b/Libraries/Boards/MAX32570/M_EvKit_V1/Source/board.c
index c690a9628b..e394c7bda9 100644
--- a/Libraries/Boards/MAX32570/M_EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32570/M_EvKit_V1/Source/board.c
@@ -53,20 +53,22 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN,
-                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO } };
+                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = { { MXC_GPIO2, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO } };
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
 
 /* Touch screen controller interrupt signal */
 const mxc_gpio_cfg_t ts_int_pin = { MXC_GPIO0, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                    MXC_GPIO_VSSEL_VDDIOH };
+                                    MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 /* Touch screen controller busy signal */
 const mxc_gpio_cfg_t ts_busy_pin = { MXC_GPIO0, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                     MXC_GPIO_VSSEL_VDDIOH };
+                                     MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+// clang-format on
 
 /******************************************************************************/
 /** 
@@ -203,15 +205,15 @@ int Board_Init(void)
     mxc_tft_spi_config tft_spi_config = {
         .regs = MXC_SPI1,
         .gpio = { MXC_GPIO0, MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 | MXC_GPIO_PIN_31,
-                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
         .freq = 12000000,
         .ss_idx = 0,
     };
 
-    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO1, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
-    mxc_gpio_cfg_t tft_bl_pin = { MXC_GPIO1, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE,
-                                  MXC_GPIO_VSSEL_VDDIOH };
+    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO1,         MXC_GPIO_PIN_17,       MXC_GPIO_FUNC_OUT,
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+    mxc_gpio_cfg_t tft_bl_pin = { MXC_GPIO1,         MXC_GPIO_PIN_16,       MXC_GPIO_FUNC_OUT,
+                                  MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
     MXC_TFT_PreInit(&tft_spi_config, &tft_reset_pin, &tft_bl_pin);
 
diff --git a/Libraries/Boards/MAX32570/QN_EvKit_V1/Source/board.c b/Libraries/Boards/MAX32570/QN_EvKit_V1/Source/board.c
index 439f965b98..540dd613c8 100644
--- a/Libraries/Boards/MAX32570/QN_EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32570/QN_EvKit_V1/Source/board.c
@@ -55,24 +55,26 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO3, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO3, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO3, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO3, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO3, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO3, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO3, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO3, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
 
 /* Touch screen controller interrupt signal */
 mxc_gpio_cfg_t ts_int_pin = { MXC_GPIO0, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                              MXC_GPIO_VSSEL_VDDIOH };
+                              MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 /* Touch screen controller busy signal */
 const mxc_gpio_cfg_t ts_busy_pin = { MXC_GPIO0, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                     MXC_GPIO_VSSEL_VDDIOH };
+                                     MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+// clang-format on
 
 /******************************************************************************/
 /** 
@@ -208,15 +210,15 @@ int Board_Init(void)
     mxc_tft_spi_config tft_spi_config = {
         .regs = MXC_SPI1,
         .gpio = { MXC_GPIO0, MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 | MXC_GPIO_PIN_31,
-                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
         .freq = 12000000,
         .ss_idx = 0,
     };
 
-    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO1, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
-    mxc_gpio_cfg_t tft_bl_pin = { MXC_GPIO1, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE,
-                                  MXC_GPIO_VSSEL_VDDIOH };
+    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO1,         MXC_GPIO_PIN_17,       MXC_GPIO_FUNC_OUT,
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+    mxc_gpio_cfg_t tft_bl_pin = { MXC_GPIO1,         MXC_GPIO_PIN_16,       MXC_GPIO_FUNC_OUT,
+                                  MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
     MXC_TFT_PreInit(&tft_spi_config, &tft_reset_pin, &tft_bl_pin);
 
diff --git a/Libraries/Boards/MAX32570/Q_EvKit_V1/Source/board.c b/Libraries/Boards/MAX32570/Q_EvKit_V1/Source/board.c
index 421c5995c3..8bfe8170f1 100644
--- a/Libraries/Boards/MAX32570/Q_EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32570/Q_EvKit_V1/Source/board.c
@@ -53,24 +53,26 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO3, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO3, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO3, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO3, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO3, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO3, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO3, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO3, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
 
 /* Touch screen controller interrupt signal */
 const mxc_gpio_cfg_t ts_int_pin = { MXC_GPIO0, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                    MXC_GPIO_VSSEL_VDDIOH };
+                                    MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 /* Touch screen controller busy signal */
 const mxc_gpio_cfg_t ts_busy_pin = { MXC_GPIO0, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                     MXC_GPIO_VSSEL_VDDIOH };
+                                     MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+// clang-format on
 
 /******************************************************************************/
 /** 
@@ -207,15 +209,15 @@ int Board_Init(void)
     mxc_tft_spi_config tft_spi_config = {
         .regs = MXC_SPI1,
         .gpio = { MXC_GPIO0, MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 | MXC_GPIO_PIN_31,
-                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
         .freq = 12000000,
         .ss_idx = 0,
     };
 
-    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO1, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
-    mxc_gpio_cfg_t tft_bl_pin = { MXC_GPIO1, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE,
-                                  MXC_GPIO_VSSEL_VDDIOH };
+    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO1,         MXC_GPIO_PIN_17,       MXC_GPIO_FUNC_OUT,
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+    mxc_gpio_cfg_t tft_bl_pin = { MXC_GPIO1,         MXC_GPIO_PIN_16,       MXC_GPIO_FUNC_OUT,
+                                  MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
     MXC_TFT_PreInit(&tft_spi_config, &tft_reset_pin, &tft_bl_pin);
 
diff --git a/Libraries/Boards/MAX32572/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32572/EvKit_V1/Source/board.c
index d21765af72..8f03dcafb5 100644
--- a/Libraries/Boards/MAX32572/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32572/EvKit_V1/Source/board.c
@@ -51,13 +51,15 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN,
-                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO } };
+                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = { { MXC_GPIO1, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO } };
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX32650/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32650/EvKit_V1/Source/board.c
index 500d142262..541e3f8eff 100644
--- a/Libraries/Boards/MAX32650/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32650/EvKit_V1/Source/board.c
@@ -50,17 +50,19 @@ mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 extern uint8_t ChipRevision;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP },
-    { MXC_GPIO2, MXC_GPIO_PIN_30, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP },
+    { MXC_GPIO2, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_30, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE },
-    { MXC_GPIO2, MXC_GPIO_PIN_26, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE },
+    { MXC_GPIO2, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_26, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 const mxc_spixf_cfg_t mx25_spixc_cfg = {
     0, //mode
diff --git a/Libraries/Boards/MAX32650/FTHR_APPS_A/Source/board.c b/Libraries/Boards/MAX32650/FTHR_APPS_A/Source/board.c
index 0bc7c7820b..138108e07c 100644
--- a/Libraries/Boards/MAX32650/FTHR_APPS_A/Source/board.c
+++ b/Libraries/Boards/MAX32650/FTHR_APPS_A/Source/board.c
@@ -60,17 +60,19 @@ mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 extern uint8_t ChipRevision;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP },
-    { MXC_GPIO1, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP },
+    { MXC_GPIO1, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE },
-    { MXC_GPIO1, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE },
+    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 #ifdef ENABLE_MAX11261_ADC
 /* **** Functions **** */
@@ -193,6 +195,8 @@ int MAX11261_Init(void)
     adc_reset_n.pad = MXC_GPIO_PAD_NONE;
     adc_reset_n.port = MXC_GPIO0;
     adc_reset_n.mask = MXC_GPIO_PIN_16;
+    adc_reset_n.vssel = MXC_GPIO_VSSEL_VDDIO; /* 3V3 */
+    adc_reset_n.drvstr = MXC_GPIO_DRVSTR_0; /* 3V3 */
     MXC_GPIO_Config(&adc_reset_n);
 
     /* Setup ready GPIO */
@@ -201,6 +205,7 @@ int MAX11261_Init(void)
     adc_int_n.port = MXC_GPIO0;
     adc_int_n.mask = MXC_GPIO_PIN_17;
     adc_int_n.vssel = MXC_GPIO_VSSEL_VDDIO; /* 3V3 */
+    adc_int_n.drvstr = MXC_GPIO_DRVSTR_0; /* 3V3 */
     //MXC_GPIO_RegisterCallback(&gpioCfg, gpio_irq_handler, NULL);
     MXC_GPIO_Config(&adc_int_n);
 
diff --git a/Libraries/Boards/MAX32655/Emulator/Source/board.c b/Libraries/Boards/MAX32655/Emulator/Source/board.c
index 95e8ff3c29..bc0bdfc0bb 100644
--- a/Libraries/Boards/MAX32655/Emulator/Source/board.c
+++ b/Libraries/Boards/MAX32655/Emulator/Source/board.c
@@ -46,19 +46,21 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
-    // {MXC_GPIO2, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO},
+    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    // {MXC_GPIO2, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    // {MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO},
+    { MXC_GPIO0, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    // {MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32655/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32655/EvKit_V1/Source/board.c
index 7741ed5c0a..552ebc6d86 100644
--- a/Libraries/Boards/MAX32655/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32655/EvKit_V1/Source/board.c
@@ -51,23 +51,25 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
     /* Logical LEDs for Bluetooth debug signals */
-    { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 /** 
@@ -90,6 +92,7 @@ static void ext_flash_board_init_quad(bool quadEnabled)
     sdio23.mask = (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9);
     sdio23.pad = MXC_GPIO_PAD_NONE;
     sdio23.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    sdio23.drvstr = MXC_GPIO_DRVSTR_0;
 
     if (quadEnabled) {
         /* Enable these pins as SPI SDIO2/3*/
@@ -393,15 +396,15 @@ int Board_Init(void)
     mxc_tft_spi_config tft_spi_config = {
         .regs = MXC_SPI1,
         .gpio = { MXC_GPIO0, MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_20,
-                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
         .freq = 12000000,
         .ss_idx = 0,
     };
 
-    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO3, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
-    mxc_gpio_cfg_t tft_bl_pin = { MXC_GPIO0, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE,
-                                  MXC_GPIO_VSSEL_VDDIOH };
+    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO3,         MXC_GPIO_PIN_0,        MXC_GPIO_FUNC_OUT,
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+    mxc_gpio_cfg_t tft_bl_pin = { MXC_GPIO0,         MXC_GPIO_PIN_27,       MXC_GPIO_FUNC_OUT,
+                                  MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
     /* Initialize TFT display */
     MXC_TFT_PreInit(&tft_spi_config, &tft_reset_pin, &tft_bl_pin);
@@ -410,17 +413,17 @@ int Board_Init(void)
     mxc_ts_spi_config ts_spi_config = {
         .regs = MXC_SPI1,
         .gpio = { MXC_GPIO0, MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_26,
-                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
         .freq = 200000,
         .ss_idx = 1,
     };
 
     /* Touch screen controller interrupt signal */
-    mxc_gpio_cfg_t int_pin = { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                               MXC_GPIO_VSSEL_VDDIOH };
+    mxc_gpio_cfg_t int_pin = { MXC_GPIO0,         MXC_GPIO_PIN_13,       MXC_GPIO_FUNC_IN,
+                               MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
     /* Touch screen controller busy signal */
-    mxc_gpio_cfg_t busy_pin = { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                MXC_GPIO_VSSEL_VDDIOH };
+    mxc_gpio_cfg_t busy_pin = { MXC_GPIO0,         MXC_GPIO_PIN_12,       MXC_GPIO_FUNC_IN,
+                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
     /* Initialize Touch Screen controller */
     MXC_TS_PreInit(&ts_spi_config, &int_pin, &busy_pin);
 #endif
diff --git a/Libraries/Boards/MAX32655/FTHR_Apps_P1/Source/board.c b/Libraries/Boards/MAX32655/FTHR_Apps_P1/Source/board.c
index df432af1cd..74e1d7eddd 100644
--- a/Libraries/Boards/MAX32655/FTHR_Apps_P1/Source/board.c
+++ b/Libraries/Boards/MAX32655/FTHR_Apps_P1/Source/board.c
@@ -51,22 +51,24 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t pb_wakeup_pin[] = {
-    { MXC_GPIO3, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO3, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_26, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_26, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 /** 
@@ -89,6 +91,7 @@ static void ext_flash_board_init_quad(bool quadEnabled)
     sdio23.mask = (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9);
     sdio23.pad = MXC_GPIO_PAD_NONE;
     sdio23.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    sdio23.drvstr = MXC_GPIO_DRVSTR_0;
 
     if (quadEnabled) {
         /* Enable these pins as SPI SDIO2/3*/
diff --git a/Libraries/Boards/MAX32660/Emulator/Source/board.c b/Libraries/Boards/MAX32660/Emulator/Source/board.c
index 12de861db1..6cd53b0729 100644
--- a/Libraries/Boards/MAX32660/Emulator/Source/board.c
+++ b/Libraries/Boards/MAX32660/Emulator/Source/board.c
@@ -46,13 +46,15 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_IN,
-                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH } };
+                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0} };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO } };
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32660/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32660/EvKit_V1/Source/board.c
index aa3f8c3f0c..3a0419af77 100644
--- a/Libraries/Boards/MAX32660/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32660/EvKit_V1/Source/board.c
@@ -47,13 +47,15 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_IN,
-                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH } };
+                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0} };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO } };
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32662/BCB/Source/board.c b/Libraries/Boards/MAX32662/BCB/Source/board.c
index 3a8359fb4b..89264f6662 100644
--- a/Libraries/Boards/MAX32662/BCB/Source/board.c
+++ b/Libraries/Boards/MAX32662/BCB/Source/board.c
@@ -49,13 +49,15 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_IN,
-                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH } };
+                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0} };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO } };
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32662/Emulator/Source/board.c b/Libraries/Boards/MAX32662/Emulator/Source/board.c
index a990f61e4c..dfe7f49217 100644
--- a/Libraries/Boards/MAX32662/Emulator/Source/board.c
+++ b/Libraries/Boards/MAX32662/Emulator/Source/board.c
@@ -46,13 +46,15 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_IN,
-                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH } };
+                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0} };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO } };
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32662/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32662/EvKit_V1/Source/board.c
index 54c2f0ff7b..49bb9a97c1 100644
--- a/Libraries/Boards/MAX32662/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32662/EvKit_V1/Source/board.c
@@ -52,13 +52,15 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN,
-                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH } };
+                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0} };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO } };
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32662/FTHR/Source/board.c b/Libraries/Boards/MAX32662/FTHR/Source/board.c
index f69aaaebee..2405c85551 100644
--- a/Libraries/Boards/MAX32662/FTHR/Source/board.c
+++ b/Libraries/Boards/MAX32662/FTHR/Source/board.c
@@ -47,13 +47,15 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN,
-                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH } };
+                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0} };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO } };
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32665/EvKit_129B/Source/board.c b/Libraries/Boards/MAX32665/EvKit_129B/Source/board.c
index 1f27d72e17..8667d5f9d1 100644
--- a/Libraries/Boards/MAX32665/EvKit_129B/Source/board.c
+++ b/Libraries/Boards/MAX32665/EvKit_129B/Source/board.c
@@ -49,23 +49,25 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
     /* Logical LEDs for Bluetooth debugging */
-    { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO0, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO0, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 /** 
diff --git a/Libraries/Boards/MAX32665/EvKit_129C/Source/board.c b/Libraries/Boards/MAX32665/EvKit_129C/Source/board.c
index 1f27d72e17..afc83fe19b 100644
--- a/Libraries/Boards/MAX32665/EvKit_129C/Source/board.c
+++ b/Libraries/Boards/MAX32665/EvKit_129C/Source/board.c
@@ -49,23 +49,25 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
     /* Logical LEDs for Bluetooth debugging */
-    { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO0, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 /** 
diff --git a/Libraries/Boards/MAX32665/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32665/EvKit_V1/Source/board.c
index 902a99596c..90a8a17cbb 100644
--- a/Libraries/Boards/MAX32665/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32665/EvKit_V1/Source/board.c
@@ -63,23 +63,25 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
     /* Logical LEDs for Bluetooth debugging */
-    { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO0, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO0, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 #ifdef ENABLE_DISPLAY
 
diff --git a/Libraries/Boards/MAX32665/FTHR/Source/board.c b/Libraries/Boards/MAX32665/FTHR/Source/board.c
index 8cd3a75616..9cc075ce69 100644
--- a/Libraries/Boards/MAX32665/FTHR/Source/board.c
+++ b/Libraries/Boards/MAX32665/FTHR/Source/board.c
@@ -48,17 +48,19 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_30, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_30, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX32665/FTHR2/Source/board.c b/Libraries/Boards/MAX32665/FTHR2/Source/board.c
index 080ee7a5d9..ce0abda08b 100644
--- a/Libraries/Boards/MAX32665/FTHR2/Source/board.c
+++ b/Libraries/Boards/MAX32665/FTHR2/Source/board.c
@@ -48,18 +48,20 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_30, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_30, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX32665/MAXREFDES178/Source/board.c b/Libraries/Boards/MAX32665/MAXREFDES178/Source/board.c
index 2ced62d098..93cc2359a8 100644
--- a/Libraries/Boards/MAX32665/MAXREFDES178/Source/board.c
+++ b/Libraries/Boards/MAX32665/MAXREFDES178/Source/board.c
@@ -49,13 +49,15 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {};
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 /** 
diff --git a/Libraries/Boards/MAX32665/WLP_VAR/Source/board.c b/Libraries/Boards/MAX32665/WLP_VAR/Source/board.c
index 507d9edbff..e0e57909b8 100644
--- a/Libraries/Boards/MAX32665/WLP_VAR/Source/board.c
+++ b/Libraries/Boards/MAX32665/WLP_VAR/Source/board.c
@@ -48,11 +48,13 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {};
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {};
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX32670/Emulator/Source/board.c b/Libraries/Boards/MAX32670/Emulator/Source/board.c
index f0db9102f3..a1c31c2747 100644
--- a/Libraries/Boards/MAX32670/Emulator/Source/board.c
+++ b/Libraries/Boards/MAX32670/Emulator/Source/board.c
@@ -46,16 +46,18 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32670/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32670/EvKit_V1/Source/board.c
index 6b100526cb..71da07688e 100644
--- a/Libraries/Boards/MAX32670/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32670/EvKit_V1/Source/board.c
@@ -46,17 +46,19 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO0, MXC_GPIO_PIN_20, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH }
+    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO0, MXC_GPIO_PIN_20, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32672/Emulator/Source/board.c b/Libraries/Boards/MAX32672/Emulator/Source/board.c
index f0db9102f3..a1c31c2747 100644
--- a/Libraries/Boards/MAX32672/Emulator/Source/board.c
+++ b/Libraries/Boards/MAX32672/Emulator/Source/board.c
@@ -46,16 +46,18 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32672/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32672/EvKit_V1/Source/board.c
index 91be6166f7..183ed88b21 100644
--- a/Libraries/Boards/MAX32672/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32672/EvKit_V1/Source/board.c
@@ -49,16 +49,18 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32672/FTHR/Source/board.c b/Libraries/Boards/MAX32672/FTHR/Source/board.c
index 9936227b51..b69d5438d9 100644
--- a/Libraries/Boards/MAX32672/FTHR/Source/board.c
+++ b/Libraries/Boards/MAX32672/FTHR/Source/board.c
@@ -55,17 +55,19 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 #ifdef ENABLE_DISPLAY
 
diff --git a/Libraries/Boards/MAX32675/Emulator/Source/board.c b/Libraries/Boards/MAX32675/Emulator/Source/board.c
index f0db9102f3..a1c31c2747 100644
--- a/Libraries/Boards/MAX32675/Emulator/Source/board.c
+++ b/Libraries/Boards/MAX32675/Emulator/Source/board.c
@@ -46,16 +46,18 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32675/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32675/EvKit_V1/Source/board.c
index 8b69ee7061..749f58e54e 100644
--- a/Libraries/Boards/MAX32675/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32675/EvKit_V1/Source/board.c
@@ -46,17 +46,19 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH }
+    { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO1, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32675/FTHR_Apps_B/Source/board.c b/Libraries/Boards/MAX32675/FTHR_Apps_B/Source/board.c
index a19c2176cb..f8c57880da 100644
--- a/Libraries/Boards/MAX32675/FTHR_Apps_B/Source/board.c
+++ b/Libraries/Boards/MAX32675/FTHR_Apps_B/Source/board.c
@@ -46,18 +46,20 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH }
+    { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0}
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32680/Emulator/Source/board.c b/Libraries/Boards/MAX32680/Emulator/Source/board.c
index 4cc68df324..3df6869dee 100644
--- a/Libraries/Boards/MAX32680/Emulator/Source/board.c
+++ b/Libraries/Boards/MAX32680/Emulator/Source/board.c
@@ -46,19 +46,21 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
-    // {MXC_GPIO2, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO},
+    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    // {MXC_GPIO2, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    // {MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO},
+    { MXC_GPIO0, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    // {MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32680/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32680/EvKit_V1/Source/board.c
index 4027bd421a..b0b244fcbb 100644
--- a/Libraries/Boards/MAX32680/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32680/EvKit_V1/Source/board.c
@@ -46,17 +46,19 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_26, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_26, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX32690/Emulator/Source/board.c b/Libraries/Boards/MAX32690/Emulator/Source/board.c
index ff38736a93..8cd73e5a39 100644
--- a/Libraries/Boards/MAX32690/Emulator/Source/board.c
+++ b/Libraries/Boards/MAX32690/Emulator/Source/board.c
@@ -46,16 +46,18 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO }
+    { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 
diff --git a/Libraries/Boards/MAX32690/EvKit_V1/Source/board.c b/Libraries/Boards/MAX32690/EvKit_V1/Source/board.c
index af3f40c77a..d0f34ca0b4 100644
--- a/Libraries/Boards/MAX32690/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX32690/EvKit_V1/Source/board.c
@@ -50,36 +50,41 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO4, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO4, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
     /* Logical LEDs for Bluetooth debug signals */
-    { MXC_GPIO0, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO0, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO0, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 const mxc_gpio_cfg_t tft_mosi = (mxc_gpio_cfg_t){ .port = MXC_GPIO2,
                                                   .mask = MXC_GPIO_PIN_24,
                                                   .func = MXC_GPIO_FUNC_OUT,
                                                   .pad = MXC_GPIO_PAD_NONE,
-                                                  .vssel = MXC_GPIO_VSSEL_VDDIOH };
+                                                  .vssel = MXC_GPIO_VSSEL_VDDIOH,
+                                                  .drvstr = MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t tft_clk = (mxc_gpio_cfg_t){ .port = MXC_GPIO2,
                                                  .mask = MXC_GPIO_PIN_25,
                                                  .func = MXC_GPIO_FUNC_OUT,
                                                  .pad = MXC_GPIO_PAD_NONE,
-                                                 .vssel = MXC_GPIO_VSSEL_VDDIOH };
+                                                 .vssel = MXC_GPIO_VSSEL_VDDIOH,
+                                                 .drvstr = MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t tft_cs = (mxc_gpio_cfg_t){ .port = MXC_GPIO2,
                                                 .mask = MXC_GPIO_PIN_11,
                                                 .func = MXC_GPIO_FUNC_OUT,
                                                 .pad = MXC_GPIO_PAD_NONE,
-                                                .vssel = MXC_GPIO_VSSEL_VDDIOH };
+                                                .vssel = MXC_GPIO_VSSEL_VDDIOH,
+                                                .drvstr = MXC_GPIO_DRVSTR_0 };
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX32690/FTHR/Source/board.c b/Libraries/Boards/MAX32690/FTHR/Source/board.c
index e24541e1fd..655d1b4441 100644
--- a/Libraries/Boards/MAX32690/FTHR/Source/board.c
+++ b/Libraries/Boards/MAX32690/FTHR/Source/board.c
@@ -47,18 +47,20 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /**************************************************************************** */
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX32690/TQFN_DB/Source/board.c b/Libraries/Boards/MAX32690/TQFN_DB/Source/board.c
index 8b18dea047..b3b3c7720d 100644
--- a/Libraries/Boards/MAX32690/TQFN_DB/Source/board.c
+++ b/Libraries/Boards/MAX32690/TQFN_DB/Source/board.c
@@ -53,13 +53,15 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN,
-                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO } };
+                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = { { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO } };
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX32690/WLP_DB/Source/board.c b/Libraries/Boards/MAX32690/WLP_DB/Source/board.c
index 9e3232da25..7c71ce6b31 100644
--- a/Libraries/Boards/MAX32690/WLP_DB/Source/board.c
+++ b/Libraries/Boards/MAX32690/WLP_DB/Source/board.c
@@ -53,13 +53,15 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = { { MXC_GPIO3, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_IN,
-                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO } };
+                                    MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = { { MXC_GPIO3, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO } };
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 } };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX32690/WLP_V1/Source/board.c b/Libraries/Boards/MAX32690/WLP_V1/Source/board.c
index 8bfc6cf408..d173bf1550 100644
--- a/Libraries/Boards/MAX32690/WLP_V1/Source/board.c
+++ b/Libraries/Boards/MAX32690/WLP_V1/Source/board.c
@@ -50,29 +50,34 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {};
 const unsigned int num_pbs = 0;
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 const mxc_gpio_cfg_t tft_mosi = (mxc_gpio_cfg_t){ .port = MXC_GPIO2,
                                                   .mask = MXC_GPIO_PIN_24,
                                                   .func = MXC_GPIO_FUNC_OUT,
                                                   .pad = MXC_GPIO_PAD_NONE,
-                                                  .vssel = MXC_GPIO_VSSEL_VDDIOH };
+                                                  .vssel = MXC_GPIO_VSSEL_VDDIOH,
+                                                  .drvstr = MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t tft_clk = (mxc_gpio_cfg_t){ .port = MXC_GPIO2,
                                                  .mask = MXC_GPIO_PIN_25,
                                                  .func = MXC_GPIO_FUNC_OUT,
                                                  .pad = MXC_GPIO_PAD_NONE,
-                                                 .vssel = MXC_GPIO_VSSEL_VDDIOH };
+                                                 .vssel = MXC_GPIO_VSSEL_VDDIOH,
+                                                 .drvstr = MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t tft_cs = (mxc_gpio_cfg_t){ .port = MXC_GPIO2,
                                                 .mask = MXC_GPIO_PIN_11,
                                                 .func = MXC_GPIO_FUNC_OUT,
                                                 .pad = MXC_GPIO_PAD_NONE,
-                                                .vssel = MXC_GPIO_VSSEL_VDDIOH };
+                                                .vssel = MXC_GPIO_VSSEL_VDDIOH,
+                                                .drvstr = MXC_GPIO_DRVSTR_0 };
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX78000/Aud01_RevA/Source/board.c b/Libraries/Boards/MAX78000/Aud01_RevA/Source/board.c
index 42fe8e1091..54a5b4dfa7 100644
--- a/Libraries/Boards/MAX78000/Aud01_RevA/Source/board.c
+++ b/Libraries/Boards/MAX78000/Aud01_RevA/Source/board.c
@@ -70,24 +70,25 @@ extern uint32_t SystemCoreClock;
  *		0 : Data is available when I2S WS signal is low (left channel)
  *		1 : Data is available when I2S WS signal is high (right channel)
  */
-
+// clang-format off
 const mxc_gpio_cfg_t mic_power_ctrl_pin = { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t codec_clk_en_pin = { MXC_GPIO1, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t i2s_int_ext_sel_pin = { MXC_GPIO1, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_OUT,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t cnn_boost_en_pin = { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_OUT,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t mic_ws_sel_pin = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_OUT,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX78000/BCB/Source/board.c b/Libraries/Boards/MAX78000/BCB/Source/board.c
index 4d8372fede..c71d03f0cf 100644
--- a/Libraries/Boards/MAX78000/BCB/Source/board.c
+++ b/Libraries/Boards/MAX78000/BCB/Source/board.c
@@ -47,17 +47,19 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 // const uart_cfg_t uart_cfg = {
diff --git a/Libraries/Boards/MAX78000/CAM01_RevA/Source/board.c b/Libraries/Boards/MAX78000/CAM01_RevA/Source/board.c
index a0b5094faa..4117d53fe7 100644
--- a/Libraries/Boards/MAX78000/CAM01_RevA/Source/board.c
+++ b/Libraries/Boards/MAX78000/CAM01_RevA/Source/board.c
@@ -78,46 +78,47 @@ extern uint32_t SystemCoreClock;
  *		0 : External CNN regulator switch is off
  *		1 : External CNN regulator switch is on
  */
-
+// clang-format off
 const mxc_gpio_cfg_t cnn_boost_en_pin = { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_OUT,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t cnn_boost_sw_en_pin = { MXC_GPIO2, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t cam_2v8_en_pin = { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t cam_1v8_en_pin = { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_OUT,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t cam_1v2_en_pin = { MXC_GPIO0, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t cam_strobe_pin = { MXC_GPIO0, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t cam_xsleep_pin = { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_OUT,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t cam_xshutdown_pin = { MXC_GPIO0, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_OUT,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t cam_meter_pin = { MXC_GPIO0, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_OUT,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t cam_clksel_pin = { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_OUT,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t cam_trig_pin = { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_OUT,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
 };
 
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 // const uart_cfg_t uart_cfg = {
diff --git a/Libraries/Boards/MAX78000/Emulator/Source/board.c b/Libraries/Boards/MAX78000/Emulator/Source/board.c
index 6e078de97b..87221c0d8e 100644
--- a/Libraries/Boards/MAX78000/Emulator/Source/board.c
+++ b/Libraries/Boards/MAX78000/Emulator/Source/board.c
@@ -47,19 +47,21 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO2, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO2, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO2, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 // const uart_cfg_t uart_cfg = {
diff --git a/Libraries/Boards/MAX78000/EvKit_V1/Source/board.c b/Libraries/Boards/MAX78000/EvKit_V1/Source/board.c
index 152021d168..71a352b039 100644
--- a/Libraries/Boards/MAX78000/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX78000/EvKit_V1/Source/board.c
@@ -49,17 +49,21 @@
 /***** Global Variables *****/
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
+
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
+
 /***** File Scope Variables *****/
 // const uart_cfg_t uart_cfg = {
 //     UART_PARITY_DISABLE,
@@ -196,14 +200,14 @@ int Board_Init(void)
     mxc_tft_spi_config tft_spi_config = {
         .regs = MXC_SPI0,
         .gpio = { MXC_GPIO0, MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_11,
-                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
         .freq = 25000000,
         .ss_idx = 1,
     };
 
     /* TFT reset signal */
-    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT,
-                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+    mxc_gpio_cfg_t tft_reset_pin = { MXC_GPIO0,         MXC_GPIO_PIN_19,       MXC_GPIO_FUNC_OUT,
+                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
     /* Initialize TFT display */
     MXC_TFT_PreInit(&tft_spi_config, &tft_reset_pin, NULL);
 
@@ -213,17 +217,17 @@ int Board_Init(void)
     mxc_ts_spi_config ts_spi_config = {
         .regs = MXC_SPI0,
         .gpio = { MXC_GPIO0, MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_10,
-                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+                  MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
         .freq = 1000000,
         .ss_idx = 2,
     };
 
     /* Touch screen controller interrupt signal */
-    mxc_gpio_cfg_t int_pin = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                               MXC_GPIO_VSSEL_VDDIOH };
+    mxc_gpio_cfg_t int_pin = { MXC_GPIO0,         MXC_GPIO_PIN_17,       MXC_GPIO_FUNC_IN,
+                               MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
     /* Touch screen controller busy signal */
-    mxc_gpio_cfg_t busy_pin = { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                MXC_GPIO_VSSEL_VDDIOH };
+    mxc_gpio_cfg_t busy_pin = { MXC_GPIO0,         MXC_GPIO_PIN_16,       MXC_GPIO_FUNC_IN,
+                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
     /* Initialize Touch Screen controller */
     MXC_TS_PreInit(&ts_spi_config, &int_pin, &busy_pin);
 
diff --git a/Libraries/Boards/MAX78000/FTHR_RevA/Source/board.c b/Libraries/Boards/MAX78000/FTHR_RevA/Source/board.c
index 7d5b33a748..be37cf1597 100644
--- a/Libraries/Boards/MAX78000/FTHR_RevA/Source/board.c
+++ b/Libraries/Boards/MAX78000/FTHR_RevA/Source/board.c
@@ -52,18 +52,20 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX78000/MAXREFDES178/Source/board.c b/Libraries/Boards/MAX78000/MAXREFDES178/Source/board.c
index e847883bb6..da7f5a34b8 100644
--- a/Libraries/Boards/MAX78000/MAXREFDES178/Source/board.c
+++ b/Libraries/Boards/MAX78000/MAXREFDES178/Source/board.c
@@ -48,17 +48,19 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX78002/BCB/Source/board.c b/Libraries/Boards/MAX78002/BCB/Source/board.c
index 4d8372fede..c71d03f0cf 100644
--- a/Libraries/Boards/MAX78002/BCB/Source/board.c
+++ b/Libraries/Boards/MAX78002/BCB/Source/board.c
@@ -47,17 +47,19 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /***** File Scope Variables *****/
 // const uart_cfg_t uart_cfg = {
diff --git a/Libraries/Boards/MAX78002/Emulator/Source/board.c b/Libraries/Boards/MAX78002/Emulator/Source/board.c
index 20cb57f2cc..86e60482fa 100644
--- a/Libraries/Boards/MAX78002/Emulator/Source/board.c
+++ b/Libraries/Boards/MAX78002/Emulator/Source/board.c
@@ -49,17 +49,19 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
-    { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO },
+    { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO2, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
+    { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0},
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 /******************************************************************************/
 void mxc_assert(const char *expr, const char *file, int line)
diff --git a/Libraries/Boards/MAX78002/EvKit_V1/Source/board.c b/Libraries/Boards/MAX78002/EvKit_V1/Source/board.c
index 9533a5edaa..b077ba931c 100644
--- a/Libraries/Boards/MAX78002/EvKit_V1/Source/board.c
+++ b/Libraries/Boards/MAX78002/EvKit_V1/Source/board.c
@@ -48,17 +48,19 @@
 mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(CONSOLE_UART);
 extern uint32_t SystemCoreClock;
 
+// clang-format off
 const mxc_gpio_cfg_t pb_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_pbs = (sizeof(pb_pin) / sizeof(mxc_gpio_cfg_t));
 
 const mxc_gpio_cfg_t led_pin[] = {
-    { MXC_GPIO2, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO2, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_leds = (sizeof(led_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 // The following pins are pulled up to 3V3 via external resistors on the AI87 EVKIT,
 // and therefore must be initialized to VDDIOH to prevent current injection into VDDIO/VDDA
@@ -69,17 +71,22 @@ const uint32_t _port1_vddioh_mask = (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPI
 const uint32_t _port2_vddioh_mask = MXC_GPIO_PIN_2;
 
 // TFT Data/Command pin
-const mxc_gpio_cfg_t tft_dc_pin = { TFT_DC_PORT, TFT_DC_PIN, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE,
-                                    MXC_GPIO_VSSEL_VDDIOH };
+const mxc_gpio_cfg_t tft_dc_pin = { TFT_DC_PORT,           TFT_DC_PIN,
+                                    MXC_GPIO_FUNC_OUT,     MXC_GPIO_PAD_NONE,
+                                    MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 // TFT Slave Select pin
-const mxc_gpio_cfg_t tft_ss_pin = { TFT_SS_PORT, TFT_SS_PIN, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE,
-                                    MXC_GPIO_VSSEL_VDDIOH };
+const mxc_gpio_cfg_t tft_ss_pin = { TFT_SS_PORT,           TFT_SS_PIN,
+                                    MXC_GPIO_FUNC_OUT,     MXC_GPIO_PAD_NONE,
+                                    MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 // TS IRQ pin
-mxc_gpio_cfg_t ts_irq_pin = { TS_IRQ_PORT, TS_IRQ_PIN, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                              MXC_GPIO_VSSEL_VDDIOH };
+mxc_gpio_cfg_t ts_irq_pin = { TS_IRQ_PORT,           TS_IRQ_PIN,
+                              MXC_GPIO_FUNC_IN,      MXC_GPIO_PAD_NONE,
+                              MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 // TS SS pin
-const mxc_gpio_cfg_t ts_ss_pin = { TS_SS_PORT, TS_SS_PIN, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE,
-                                   MXC_GPIO_VSSEL_VDDIOH };
+const mxc_gpio_cfg_t ts_ss_pin = {
+    TS_SS_PORT,       TS_SS_PIN, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH,
+    MXC_GPIO_DRVSTR_0
+};
 
 /***** File Scope Variables *****/
 // const uart_cfg_t uart_cfg = {
diff --git a/Libraries/CMSIS/Device/Maxim/GCC/gcc.mk b/Libraries/CMSIS/Device/Maxim/GCC/gcc.mk
index 59a265b7bd..2d95a2ad0b 100644
--- a/Libraries/CMSIS/Device/Maxim/GCC/gcc.mk
+++ b/Libraries/CMSIS/Device/Maxim/GCC/gcc.mk
@@ -305,6 +305,30 @@ LDFLAGS=-mthumb                                                                \
         -mfpu=$(MFPU)                                                          \
         -Xlinker --gc-sections                                                 \
 	-Xlinker -Map -Xlinker ${BUILD_DIR}/$(PROJECT).map
+
+# Add --no-warn-rwx-segments on GCC 12+
+# This is not universally supported or enabled by default, so we need to check whether the linker supports it first
+RWX_SEGMENTS_SUPPORTED ?=
+ifeq "$(RWX_SEGMENTS_SUPPORTED)" "" # -------------------------------------
+# Print the linker's help string and parse it for --no-warn-rwx-segments
+# Note we invoke the linker through the compiler "-Xlinker" because ld may not
+# be on the path, and that's how we invoke the linker for our implicit rules
+LINKER_OPTIONS := $(shell $(CC) -Xlinker --help)
+ifneq "$(findstring --no-warn-rwx-segments,$(LINKER_OPTIONS))" ""
+RWX_SEGMENTS_SUPPORTED := 1
+else
+RWX_SEGMENTS_SUPPORTED := 0
+endif
+
+# export the variable for sub-make calls, so we don't need to interact with the shell again (it's slow).
+export RWX_SEGMENTS_SUPPORTED
+endif # ------------------------------------------------------------------
+
+ifeq "$(RWX_SEGMENTS_SUPPORTED)" "1"
+LDFLAGS += -Xlinker --no-warn-rwx-segments
+endif
+
+# Add project-specific linker flags
 LDFLAGS+=$(PROJ_LDFLAGS)
 
 # Include math library
diff --git a/Libraries/CMSIS/Device/Maxim/GCC/gcc_riscv.mk b/Libraries/CMSIS/Device/Maxim/GCC/gcc_riscv.mk
index 530ee66bc8..c66d951960 100644
--- a/Libraries/CMSIS/Device/Maxim/GCC/gcc_riscv.mk
+++ b/Libraries/CMSIS/Device/Maxim/GCC/gcc_riscv.mk
@@ -314,6 +314,30 @@ LDFLAGS+=-Xlinker --gc-sections       \
 	  -march=$(MARCH) 	\
 	  -mabi=$(MABI)		\
       -Xlinker -Map -Xlinker ${BUILD_DIR}/$(PROJECT).map
+
+# Add --no-warn-rwx-segments on GCC 12+
+# This is not universally supported or enabled by default, so we need to check whether the linker supports it first
+RWX_SEGMENTS_SUPPORTED ?=
+ifeq "$(RWX_SEGMENTS_SUPPORTED)" "" # -------------------------------------
+# Print the linker's help string and parse it for --no-warn-rwx-segments
+# Note we invoke the linker through the compiler "-Xlinker" because ld may not
+# be on the path, and that's how we invoke the linker for our implicit rules
+LINKER_OPTIONS := $(shell $(CC) -Xlinker --help)
+ifneq "$(findstring --no-warn-rwx-segments,$(LINKER_OPTIONS))" ""
+RWX_SEGMENTS_SUPPORTED := 1
+else
+RWX_SEGMENTS_SUPPORTED := 0
+endif
+
+# export the variable for sub-make calls, so we don't need to interact with the shell again (it's slow).
+export RWX_SEGMENTS_SUPPORTED
+endif # ------------------------------------------------------------------
+
+ifeq "$(RWX_SEGMENTS_SUPPORTED)" "1"
+LDFLAGS += -Xlinker --no-warn-rwx-segments
+endif
+
+# Add project-specific linker flags
 LDFLAGS+=$(PROJ_LDFLAGS)
 
 # Include math library
diff --git a/Libraries/MiscDrivers/Camera/camera.c b/Libraries/MiscDrivers/Camera/camera.c
index 3f47b3e3a2..b9214f60ef 100644
--- a/Libraries/MiscDrivers/Camera/camera.c
+++ b/Libraries/MiscDrivers/Camera/camera.c
@@ -172,11 +172,13 @@ static volatile uint32_t current_stream_buffer = 0;
 static uint8_t *stream_buffer_ptr = NULL;
 
 #ifdef TFT_DMA_DEBUG
+// clang-format off
 const mxc_gpio_cfg_t debug_pin[] = {
-    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
-    { MXC_GPIO3, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH },
+    { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
+    { MXC_GPIO3, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 },
 };
 const unsigned int num_debugs = (sizeof(debug_pin) / sizeof(mxc_gpio_cfg_t));
+// clang-format on
 
 int debug_Init(void)
 {
diff --git a/Libraries/MiscDrivers/Camera/sccb.c b/Libraries/MiscDrivers/Camera/sccb.c
index ce059e176c..ec0e78364a 100644
--- a/Libraries/MiscDrivers/Camera/sccb.c
+++ b/Libraries/MiscDrivers/Camera/sccb.c
@@ -68,12 +68,12 @@
 
 #define WAIT_US 4
 #define DELAY_US(us) MXC_Delay(us)
-// clang-format on
 
 static const mxc_gpio_cfg_t gpio_cfg_scl = { SCL_PORT, SCL_PIN, MXC_GPIO_FUNC_OUT,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 static const mxc_gpio_cfg_t gpio_cfg_sda = { SDA_PORT, SDA_PIN, MXC_GPIO_FUNC_OUT,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+// clang-format on
 
 /******************************** Static Functions ***************************/
 static void start(void)
diff --git a/Libraries/MiscDrivers/Touchscreen/adafruit_3315_touch.c b/Libraries/MiscDrivers/Touchscreen/adafruit_3315_touch.c
index d8a8b7c5d2..c01aaf8321 100644
--- a/Libraries/MiscDrivers/Touchscreen/adafruit_3315_touch.c
+++ b/Libraries/MiscDrivers/Touchscreen/adafruit_3315_touch.c
@@ -250,10 +250,14 @@ int MXC_TS_Init(mxc_spi_regs_t *ts_spi, int ss_idx, mxc_gpio_cfg_t *int_pin,
     (void)int_pin;
     (void)busy_pin;
 
-    static const mxc_gpio_cfg_t ts_irq_pin = { IRQ_PORT, IRQ_PIN, MXC_GPIO_FUNC_IN,
-                                               MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH };
-    static const mxc_gpio_cfg_t ts_ss_pin = { SS_PORT, SS_PIN, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIOH };
+    static const mxc_gpio_cfg_t ts_irq_pin = {
+        IRQ_PORT,         IRQ_PIN, MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIOH,
+        MXC_GPIO_DRVSTR_0
+    };
+    static const mxc_gpio_cfg_t ts_ss_pin = {
+        SS_PORT,          SS_PIN, MXC_GPIO_FUNC_OUT, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH,
+        MXC_GPIO_DRVSTR_0
+    };
     uint16_t id;
 
     spi = ts_spi;
diff --git a/Libraries/PeriphDrivers/Include/MAX32520/gpio.h b/Libraries/PeriphDrivers/Include/MAX32520/gpio.h
index 1545b8fdfd..7a287bed00 100644
--- a/Libraries/PeriphDrivers/Include/MAX32520/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32520/gpio.h
@@ -138,6 +138,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, ///< Set pin to VIDDIOH voltage
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, ///< Drive Strength 0
+    MXC_GPIO_DRVSTR_1, ///< Drive Strength 1
+    MXC_GPIO_DRVSTR_2, ///< Drive Strength 2
+    MXC_GPIO_DRVSTR_3, ///< Drive Strength 3
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -157,6 +167,7 @@ typedef struct {
     mxc_gpio_func_t func; ///< Function type
     mxc_gpio_pad_t pad; ///< Pad type
     mxc_gpio_vssel_t vssel; ///< Voltage select
+    mxc_gpio_drvstr_t drvstr; ///< Drive Strength select
 } mxc_gpio_cfg_t;
 
 /**
@@ -352,6 +363,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32520/i2c.h b/Libraries/PeriphDrivers/Include/MAX32520/i2c.h
index 08e9d8c39f..ce290f72c1 100644
--- a/Libraries/PeriphDrivers/Include/MAX32520/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32520/i2c.h
@@ -1,5 +1,5 @@
 /**
-* @file     i2c.h 
+* @file     i2c.h
 * @brief    Inter-integrated circuit (I2C) communications interface driver.
 */
 
@@ -41,8 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32520_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -54,6 +56,8 @@ extern "C" {
  * @{
  */
 
+/***** Definitions *****/
+
 typedef struct _i2c_req_t mxc_i2c_req_t;
 
 /**
@@ -191,14 +195,14 @@ typedef int (*mxc_i2c_slave_handler_t)(mxc_i2c_regs_t *i2c, mxc_i2c_slave_event_
 int MXC_I2C_Init(mxc_i2c_regs_t *i2c, int masterMode, unsigned int slaveAddr);
 
 /**
- * @brief   Set slave address for I2C instances acting as slaves on the bus.
- * @note    Set idx to zero, multiple I2C instances acting as slaves on the
- *          bus is not yet supported.
+ * @brief   Initialize and enable I2C peripheral.
+ * @note    Set idx to 0, multiple I2C instances acting as slaves is not yet
+ *          supported.
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   slaveAddr   7-bit or 10-bit address to use when in slave mode.
  *                      This parameter is ignored when masterMode is non-zero.
- * @param   idx         Index of the I2C slave. 
+ * @param   idx         Index of the I2C slave instance.
  *
  * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
@@ -279,6 +283,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -413,13 +465,13 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 
 /**
  * @brief   Unloads bytes from the receive FIFO using DMA for longer reads.
- *
- * @note    The operation is not complete until the callback has been called
+ *          This function does not initialize the DMA or acquire any DMA channels.
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   bytes       The buffer to read the data into.
  * @param   len         The number of bytes to read.
- * @param   callback    The function to call when the read is complete
+ * @param   callback    The function to call when the read is complete. This parameter
+ *                      was never used but it's left in to preserve project builds.
  *
  * @return  See \ref MXC_Error_Codes for a list of return values.
  */
@@ -448,12 +500,14 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 
 /**
  * @brief   Loads bytes into the transmit FIFO using DMA for longer writes.
+ *          This function does not initialize the DMA or acquire any DMA channels.
  *
  * @note    The operation is not complete until the callback has been called
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   bytes       The buffer containing the bytes to write
  * @param   len         The number of bytes to write.
- * @param   callback    The function to call when the read is complete
+ * @param   callback    The function to call when the read is complete. This parameter
+ *                      was never used but it's left in to preserve project builds.
  *
  * @return  See \ref MXC_Error_Codes for a list of return values
  */
@@ -487,8 +541,8 @@ void MXC_I2C_ClearTXFIFO(mxc_i2c_regs_t *i2c);
  * @brief   Get the presently set interrupt flags.
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
- * @param   flags0      Pointer to variable to store flags currently set in intfl0
- * @param   flags1      Pointer to variable to store flags currently set in intfl1
+ * @param   flags0      Pointer to store flags currently set in interrupt register intfl0.
+ * @param   flags1      Pointer to store flags currently set in interrupt register intfl1.
  *
  * @return  See \ref MXC_Error_Codes for a list of return values
  */
@@ -498,8 +552,8 @@ int MXC_I2C_GetFlags(mxc_i2c_regs_t *i2c, unsigned int *flags0, unsigned int *fl
  * @brief   Clears the Interrupt Flags.
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
- * @param   flags0      Interrupts to be cleared in intfl0
- * @param   flags1      Interrupts to be enabled in intfl1
+ * @param   flags0      Flags to be cleared in interrupt register intfl0.
+ * @param   flags1      Flags to be cleared in interrupt register intfl1.
  */
 void MXC_I2C_ClearFlags(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1);
 
@@ -604,7 +658,7 @@ int MXC_I2C_Recover(mxc_i2c_regs_t *i2c, unsigned int retries);
 /* ************************************************************************* */
 
 /**
- * @brief   Performs a blocking I2C master transaction.
+ * @brief   Performs a blocking I2C Master transaction.
  *
  * Performs a blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
@@ -655,7 +709,13 @@ int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
  * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
- *          in the ISR.
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX32570/gpio.h b/Libraries/PeriphDrivers/Include/MAX32570/gpio.h
index 8995cd7c56..2e74fdd67a 100644
--- a/Libraries/PeriphDrivers/Include/MAX32570/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32570/gpio.h
@@ -137,6 +137,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, ///< Set pin to VIDDIOH voltage
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, ///< Drive Strength 0
+    MXC_GPIO_DRVSTR_1, ///< Drive Strength 1
+    MXC_GPIO_DRVSTR_2, ///< Drive Strength 2
+    MXC_GPIO_DRVSTR_3, ///< Drive Strength 3
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -157,6 +167,7 @@ typedef struct {
     mxc_gpio_func_t func; ///< Function type
     mxc_gpio_pad_t pad; ///< Pad type
     mxc_gpio_vssel_t vssel; ///< Voltage select
+    mxc_gpio_drvstr_t drvstr; ///< Drive Strength select
 } mxc_gpio_cfg_t;
 
 /**
@@ -352,6 +363,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32570/i2c.h b/Libraries/PeriphDrivers/Include/MAX32570/i2c.h
index 07afb3bf85..949dc5cbd8 100644
--- a/Libraries/PeriphDrivers/Include/MAX32570/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32570/i2c.h
@@ -41,8 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32570_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -278,6 +280,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -563,8 +613,6 @@ void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c);
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   timeout     Timeout in uS
- *
- * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout);
 
@@ -659,7 +707,13 @@ int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
  * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
- *          in the ISR.
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX32572/gpio.h b/Libraries/PeriphDrivers/Include/MAX32572/gpio.h
index 61455883e2..0cac978a92 100644
--- a/Libraries/PeriphDrivers/Include/MAX32572/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32572/gpio.h
@@ -138,6 +138,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, ///< Set pin to VIDDIOH voltage
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, ///< Drive Strength 0
+    MXC_GPIO_DRVSTR_1, ///< Drive Strength 1
+    MXC_GPIO_DRVSTR_2, ///< Drive Strength 2
+    MXC_GPIO_DRVSTR_3, ///< Drive Strength 3
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -158,6 +168,7 @@ typedef struct {
     mxc_gpio_func_t func; ///< Function type
     mxc_gpio_pad_t pad; ///< Pad type
     mxc_gpio_vssel_t vssel; ///< Voltage select
+    mxc_gpio_drvstr_t drvstr; ///< Drive Strength select
 } mxc_gpio_cfg_t;
 
 /**
@@ -353,6 +364,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32572/i2c.h b/Libraries/PeriphDrivers/Include/MAX32572/i2c.h
index 616e1a81b8..9fa7676de7 100644
--- a/Libraries/PeriphDrivers/Include/MAX32572/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32572/i2c.h
@@ -41,8 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32572_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -284,6 +286,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -569,8 +619,6 @@ void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c);
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   timeout     Timeout in uS
- *
- * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout);
 
@@ -665,7 +713,13 @@ int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
  * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
- *          in the ISR.
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX32650/gpio.h b/Libraries/PeriphDrivers/Include/MAX32650/gpio.h
index aea5858b80..58fd6a3ca8 100644
--- a/Libraries/PeriphDrivers/Include/MAX32650/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32650/gpio.h
@@ -138,6 +138,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, /**< Set pin to VIDDIOH voltage  */
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength configuration.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, /**< Drive Strength 0 */
+    MXC_GPIO_DRVSTR_1, /**< Drive Strength 1 */
+    MXC_GPIO_DRVSTR_2, /**< Drive Strength 2 */
+    MXC_GPIO_DRVSTR_3, /**< Drive Strength 3 */
+} mxc_gpio_drvstr_t;
+
 /**
  * Structure type for configuring a GPIO port.
  */
@@ -147,6 +157,7 @@ typedef struct {
     mxc_gpio_func_t func; /**< Function type */
     mxc_gpio_pad_t pad; /**< Pad type */
     mxc_gpio_vssel_t vssel; /**< Voltage select */
+    mxc_gpio_drvstr_t drvstr; /**< Drive Strength select */
 } mxc_gpio_cfg_t;
 
 /**
@@ -346,6 +357,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32650/i2c.h b/Libraries/PeriphDrivers/Include/MAX32650/i2c.h
index b932ced85d..b4d6a57fd3 100644
--- a/Libraries/PeriphDrivers/Include/MAX32650/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32650/i2c.h
@@ -40,8 +40,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "i2c_regs.h"
 #include "mxc_sys.h"
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -271,6 +273,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -647,7 +697,13 @@ int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
  * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
- *          in the ISR.
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX32655/gpio.h b/Libraries/PeriphDrivers/Include/MAX32655/gpio.h
index 3424db5f19..c2eafbc2e9 100644
--- a/Libraries/PeriphDrivers/Include/MAX32655/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32655/gpio.h
@@ -137,6 +137,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, /**< Set pin to VIDDIOH voltage */
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, /**< Drive Strength 0 */
+    MXC_GPIO_DRVSTR_1, /**< Drive Strength 1 */
+    MXC_GPIO_DRVSTR_2, /**< Drive Strength 2 */
+    MXC_GPIO_DRVSTR_3, /**< Drive Strength 3 */
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -157,6 +167,7 @@ typedef struct {
     mxc_gpio_func_t func; /**< Function type */
     mxc_gpio_pad_t pad; /**< Pad type */
     mxc_gpio_vssel_t vssel; /**< Voltage select */
+    mxc_gpio_drvstr_t drvstr; /**< Drive Strength select */
 } mxc_gpio_cfg_t;
 
 /**
@@ -348,6 +359,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32655/i2c.h b/Libraries/PeriphDrivers/Include/MAX32655/i2c.h
index 11df9554b4..83c3b6e814 100644
--- a/Libraries/PeriphDrivers/Include/MAX32655/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32655/i2c.h
@@ -1,6 +1,6 @@
 /**
-* @file
-* @brief   Inter-integrated circuit (I2C) communications interface driver.
+* @file     i2c.h
+* @brief    Inter-integrated circuit (I2C) communications interface driver.
 */
 
 /******************************************************************************
@@ -41,9 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32655_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
-/***** Definitions *****/
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -285,6 +286,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -565,8 +614,6 @@ void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c);
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   timeout     Timeout in uS
- *
- * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout);
 
@@ -660,8 +707,14 @@ int MXC_I2C_MasterTransaction(mxc_i2c_req_t *req);
 int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
- * @brief   Performs a non-blocking I2C transaction using DMA for reduced time
- *          in the ISR.
+ * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX32660/gpio.h b/Libraries/PeriphDrivers/Include/MAX32660/gpio.h
index c24a72dbb3..754292021a 100644
--- a/Libraries/PeriphDrivers/Include/MAX32660/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32660/gpio.h
@@ -116,6 +116,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, ///< Set pin to VIDDIOH voltage
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, ///< Drive Strength 0
+    MXC_GPIO_DRVSTR_1, ///< Drive Strength 1
+    MXC_GPIO_DRVSTR_2, ///< Drive Strength 2
+    MXC_GPIO_DRVSTR_3, ///< Drive Strength 3
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -134,6 +144,7 @@ typedef struct {
     mxc_gpio_func_t func; ///< Function type
     mxc_gpio_pad_t pad; ///< Pad type
     mxc_gpio_vssel_t vssel; ///< Voltage select
+    mxc_gpio_drvstr_t drvstr; ///< Drive Strength select
 } mxc_gpio_cfg_t;
 
 /**
@@ -327,6 +338,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32660/i2c.h b/Libraries/PeriphDrivers/Include/MAX32660/i2c.h
index 2cfb1f156f..5011e51e2e 100644
--- a/Libraries/PeriphDrivers/Include/MAX32660/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32660/i2c.h
@@ -41,8 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -275,6 +277,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -557,8 +607,6 @@ void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c);
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   timeout     Timeout in uS
- *
- * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout);
 
@@ -653,7 +701,13 @@ int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
  * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
- *          in the ISR.
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX32662/gpio.h b/Libraries/PeriphDrivers/Include/MAX32662/gpio.h
index 83905e84cb..53911b7248 100644
--- a/Libraries/PeriphDrivers/Include/MAX32662/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32662/gpio.h
@@ -136,6 +136,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, /**< Set pin to VIDDIOH voltage */
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, /**< Drive Strength 0 */
+    MXC_GPIO_DRVSTR_1, /**< Drive Strength 1 */
+    MXC_GPIO_DRVSTR_2, /**< Drive Strength 2 */
+    MXC_GPIO_DRVSTR_3, /**< Drive Strength 3 */
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -156,6 +166,7 @@ typedef struct {
     mxc_gpio_func_t func; /**< Function type */
     mxc_gpio_pad_t pad; /**< Pad type */
     mxc_gpio_vssel_t vssel; /**< Voltage select */
+    mxc_gpio_drvstr_t drvstr; /**< Drive Strength select */
 } mxc_gpio_cfg_t;
 
 /**
@@ -347,6 +358,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32662/i2c.h b/Libraries/PeriphDrivers/Include/MAX32662/i2c.h
index 62339ede1e..7ce46b8d43 100644
--- a/Libraries/PeriphDrivers/Include/MAX32662/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32662/i2c.h
@@ -1,6 +1,6 @@
 /**
-* @file
-* @brief   Inter-integrated circuit (I2C) communications interface driver.
+* @file     i2c.h
+* @brief    Inter-integrated circuit (I2C) communications interface driver.
 */
 
 /******************************************************************************
@@ -41,9 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32662_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
-/***** Definitions *****/
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -279,6 +280,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -559,8 +608,6 @@ void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c);
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   timeout     Timeout in uS
- *
- * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout);
 
@@ -654,8 +701,14 @@ int MXC_I2C_MasterTransaction(mxc_i2c_req_t *req);
 int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
- * @brief   Performs a non-blocking I2C transaction using DMA for reduced time
- *          in the ISR.
+ * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX32665/dma.h b/Libraries/PeriphDrivers/Include/MAX32665/dma.h
index 4ee96f424b..82e39f5875 100644
--- a/Libraries/PeriphDrivers/Include/MAX32665/dma.h
+++ b/Libraries/PeriphDrivers/Include/MAX32665/dma.h
@@ -122,6 +122,8 @@ typedef enum {
         MXC_S_DMA_CFG_REQSEL_I2C0TX, /**< I2C0 Transmit DMA Request Selection */
     MXC_DMA_REQUEST_I2C1TX =
         MXC_S_DMA_CFG_REQSEL_I2C1TX, /**< I2C1 Transmit DMA Request Selection */
+    MXC_DMA_REQUEST_I2C2TX =
+        MXC_S_DMA_CFG_REQSEL_I2C2TX, /**< I2C2 Transmit DMA Request Selection */
     MXC_DMA_REQUEST_UART2TX =
         MXC_S_DMA_CFG_REQSEL_UART2TX, /**< UART 2 Transmit DMA Request Selection */
     //MXC_DMA_REQUEST_SPI3TX = MXC_S_DMA_CFG_REQSEL_SPI3TX,            /**< SPI3 Transmit DMA Request Selection */
diff --git a/Libraries/PeriphDrivers/Include/MAX32665/gpio.h b/Libraries/PeriphDrivers/Include/MAX32665/gpio.h
index 1cf8d2c728..e4419c2c42 100644
--- a/Libraries/PeriphDrivers/Include/MAX32665/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32665/gpio.h
@@ -136,6 +136,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, /**< Set pin to VIDDIOH voltage  */
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength configuration.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, /**< Drive Strength 0 */
+    MXC_GPIO_DRVSTR_1, /**< Drive Strength 1 */
+    MXC_GPIO_DRVSTR_2, /**< Drive Strength 2 */
+    MXC_GPIO_DRVSTR_3, /**< Drive Strength 3 */
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -156,6 +166,7 @@ typedef struct {
     mxc_gpio_func_t func; /**< Function type */
     mxc_gpio_pad_t pad; /**< Pad type */
     mxc_gpio_vssel_t vssel; /**< Voltage select */
+    mxc_gpio_drvstr_t drvstr; /**< Drive Strength select */
 } mxc_gpio_cfg_t;
 
 /**
@@ -351,6 +362,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32665/i2c.h b/Libraries/PeriphDrivers/Include/MAX32665/i2c.h
index 9b0f6b6348..137efd7b82 100644
--- a/Libraries/PeriphDrivers/Include/MAX32665/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32665/i2c.h
@@ -41,9 +41,11 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
 #include "dma.h"
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -276,6 +278,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
diff --git a/Libraries/PeriphDrivers/Include/MAX32670/gpio.h b/Libraries/PeriphDrivers/Include/MAX32670/gpio.h
index a004463194..bda41419ff 100644
--- a/Libraries/PeriphDrivers/Include/MAX32670/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32670/gpio.h
@@ -137,6 +137,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, ///< Set pin to VIDDIOH voltage
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, ///< Drive Strength 0
+    MXC_GPIO_DRVSTR_1, ///< Drive Strength 1
+    MXC_GPIO_DRVSTR_2, ///< Drive Strength 2
+    MXC_GPIO_DRVSTR_3, ///< Drive Strength 3
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -155,6 +165,7 @@ typedef struct {
     mxc_gpio_func_t func; ///< Function type
     mxc_gpio_pad_t pad; ///< Pad type
     mxc_gpio_vssel_t vssel; ///< Voltage select
+    mxc_gpio_drvstr_t drvstr; ///< Drive Strength select
 } mxc_gpio_cfg_t;
 
 /**
@@ -348,6 +359,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32670/i2c.h b/Libraries/PeriphDrivers/Include/MAX32670/i2c.h
index 9f03fb3609..fd0bfa32f0 100644
--- a/Libraries/PeriphDrivers/Include/MAX32670/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32670/i2c.h
@@ -41,8 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32670_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -285,6 +287,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -419,13 +469,13 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 
 /**
  * @brief   Unloads bytes from the receive FIFO using DMA for longer reads.
- *
- * @note    The operation is not complete until the callback has been called
+ *          This function does not initialize the DMA or acquire any DMA channels.
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   bytes       The buffer to read the data into.
  * @param   len         The number of bytes to read.
- * @param   callback    The function to call when the read is complete
+ * @param   callback    The function to call when the read is complete. This parameter
+ *                      was never used but it's left in to preserve project builds.
  *
  * @return  See \ref MXC_Error_Codes for a list of return values.
  */
@@ -454,12 +504,14 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 
 /**
  * @brief   Loads bytes into the transmit FIFO using DMA for longer writes.
+ *          This function does not initialize the DMA or acquire any DMA channels.
  *
  * @note    The operation is not complete until the callback has been called
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   bytes       The buffer containing the bytes to write
  * @param   len         The number of bytes to write.
- * @param   callback    The function to call when the read is complete
+ * @param   callback    The function to call when the read is complete. This parameter
+ *                      was never used but it's left in to preserve project builds.
  *
  * @return  See \ref MXC_Error_Codes for a list of return values
  */
@@ -567,8 +619,6 @@ void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c);
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   timeout     Timeout in uS
- *
- * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout);
 
@@ -663,7 +713,13 @@ int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
  * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
- *          in the ISR.
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX32672/gpio.h b/Libraries/PeriphDrivers/Include/MAX32672/gpio.h
index 105f778b94..032c32786a 100644
--- a/Libraries/PeriphDrivers/Include/MAX32672/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32672/gpio.h
@@ -137,6 +137,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, ///< Set pin to VIDDIOH voltage
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, ///< Drive Strength 0
+    MXC_GPIO_DRVSTR_1, ///< Drive Strength 1
+    MXC_GPIO_DRVSTR_2, ///< Drive Strength 2
+    MXC_GPIO_DRVSTR_3, ///< Drive Strength 3
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -157,6 +167,7 @@ typedef struct {
     mxc_gpio_func_t func; ///< Function type
     mxc_gpio_pad_t pad; ///< Pad type
     mxc_gpio_vssel_t vssel; ///< Voltage select
+    mxc_gpio_drvstr_t drvstr; ///< Drive Strength select
 } mxc_gpio_cfg_t;
 
 /**
@@ -339,6 +350,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32672/i2c.h b/Libraries/PeriphDrivers/Include/MAX32672/i2c.h
index 2b98ce936f..b2b54e6c4c 100644
--- a/Libraries/PeriphDrivers/Include/MAX32672/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32672/i2c.h
@@ -41,8 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32672_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -286,6 +288,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -571,8 +621,6 @@ void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c);
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   timeout     Timeout in uS
- *
- * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout);
 
@@ -667,7 +715,13 @@ int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
  * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
- *          in the ISR.
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX32675/gpio.h b/Libraries/PeriphDrivers/Include/MAX32675/gpio.h
index 32a4e6e76f..ef0812071a 100644
--- a/Libraries/PeriphDrivers/Include/MAX32675/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32675/gpio.h
@@ -137,6 +137,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, ///< Set pin to VIDDIOH voltage
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for the voltage level on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, ///< Drive Strength 0
+    MXC_GPIO_DRVSTR_1, ///< Drive Strength 1
+    MXC_GPIO_DRVSTR_2, ///< Drive Strength 2
+    MXC_GPIO_DRVSTR_3, ///< Drive Strength 3
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -155,6 +165,7 @@ typedef struct {
     mxc_gpio_func_t func; ///< Function type
     mxc_gpio_pad_t pad; ///< Pad type
     mxc_gpio_vssel_t vssel; ///< Voltage select
+    mxc_gpio_drvstr_t drvstr; ///< Drive Strength select
 } mxc_gpio_cfg_t;
 
 /**
@@ -348,6 +359,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32675/i2c.h b/Libraries/PeriphDrivers/Include/MAX32675/i2c.h
index be6115996a..183c886d6a 100644
--- a/Libraries/PeriphDrivers/Include/MAX32675/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32675/i2c.h
@@ -41,8 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -285,6 +287,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -567,8 +617,6 @@ void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c);
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   timeout     Timeout in uS
- *
- * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout);
 
@@ -663,7 +711,13 @@ int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
  * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
- *          in the ISR.
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX32680/gpio.h b/Libraries/PeriphDrivers/Include/MAX32680/gpio.h
index 5c434eb2b5..ef31db72e9 100644
--- a/Libraries/PeriphDrivers/Include/MAX32680/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32680/gpio.h
@@ -137,6 +137,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, /**< Set pin to VIDDIOH voltage */
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, /**< Drive Strength 0 */
+    MXC_GPIO_DRVSTR_1, /**< Drive Strength 1 */
+    MXC_GPIO_DRVSTR_2, /**< Drive Strength 2 */
+    MXC_GPIO_DRVSTR_3, /**< Drive Strength 3 */
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -157,6 +167,7 @@ typedef struct {
     mxc_gpio_func_t func; /**< Function type */
     mxc_gpio_pad_t pad; /**< Pad type */
     mxc_gpio_vssel_t vssel; /**< Voltage select */
+    mxc_gpio_drvstr_t drvstr; /**< Drive Strength select */
 } mxc_gpio_cfg_t;
 
 /**
@@ -348,6 +359,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32680/i2c.h b/Libraries/PeriphDrivers/Include/MAX32680/i2c.h
index 7b05305870..7e308ce204 100644
--- a/Libraries/PeriphDrivers/Include/MAX32680/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32680/i2c.h
@@ -1,6 +1,6 @@
 /**
-* @file
-* @brief   Inter-integrated circuit (I2C) communications interface driver.
+* @file     i2c.h
+* @brief    Inter-integrated circuit (I2C) communications interface driver.
 */
 
 /******************************************************************************
@@ -41,9 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32680_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
-/***** Definitions *****/
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -285,6 +286,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -565,8 +614,6 @@ void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c);
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   timeout     Timeout in uS
- *
- * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout);
 
@@ -660,8 +707,14 @@ int MXC_I2C_MasterTransaction(mxc_i2c_req_t *req);
 int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
- * @brief   Performs a non-blocking I2C transaction using DMA for reduced time
- *          in the ISR.
+ * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX32690/gpio.h b/Libraries/PeriphDrivers/Include/MAX32690/gpio.h
index a0992e247a..0e0be6664a 100644
--- a/Libraries/PeriphDrivers/Include/MAX32690/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX32690/gpio.h
@@ -138,6 +138,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, /**< Set pin to VIDDIOH voltage */
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, /**< Drive Strength 0 */
+    MXC_GPIO_DRVSTR_1, /**< Drive Strength 1 */
+    MXC_GPIO_DRVSTR_2, /**< Drive Strength 2 */
+    MXC_GPIO_DRVSTR_3, /**< Drive Strength 3 */
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -158,6 +168,7 @@ typedef struct {
     mxc_gpio_func_t func; /**< Function type */
     mxc_gpio_pad_t pad; /**< Pad type */
     mxc_gpio_vssel_t vssel; /**< Voltage select */
+    mxc_gpio_drvstr_t drvstr; /**< Drive Strength select */
 } mxc_gpio_cfg_t;
 
 /**
@@ -349,6 +360,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX32690/i2c.h b/Libraries/PeriphDrivers/Include/MAX32690/i2c.h
index dec0f795f7..a20fc8f2b8 100644
--- a/Libraries/PeriphDrivers/Include/MAX32690/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX32690/i2c.h
@@ -1,6 +1,6 @@
 /**
-* @file
-* @brief   Inter-integrated circuit (I2C) communications interface driver.
+* @file     i2c.h
+* @brief    Inter-integrated circuit (I2C) communications interface driver.
 */
 
 /******************************************************************************
@@ -41,9 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32690_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
-/***** Definitions *****/
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -285,6 +286,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -565,8 +614,6 @@ void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c);
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   timeout     Timeout in uS
- *
- * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout);
 
@@ -660,8 +707,14 @@ int MXC_I2C_MasterTransaction(mxc_i2c_req_t *req);
 int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
- * @brief   Performs a non-blocking I2C transaction using DMA for reduced time
- *          in the ISR.
+ * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX78000/gpio.h b/Libraries/PeriphDrivers/Include/MAX78000/gpio.h
index 2dc3afa932..97e89a49bb 100644
--- a/Libraries/PeriphDrivers/Include/MAX78000/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX78000/gpio.h
@@ -137,6 +137,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, /**< Set pin to VIDDIOH voltage */
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength on a given pin.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, /**< Drive Strength 0 */
+    MXC_GPIO_DRVSTR_1, /**< Drive Strength 1 */
+    MXC_GPIO_DRVSTR_2, /**< Drive Strength 2 */
+    MXC_GPIO_DRVSTR_3, /**< Drive Strength 3 */
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -157,6 +167,7 @@ typedef struct {
     mxc_gpio_func_t func; /**< Function type */
     mxc_gpio_pad_t pad; /**< Pad type */
     mxc_gpio_vssel_t vssel; /**< Voltage select */
+    mxc_gpio_drvstr_t drvstr; /**< Drive Strength select */
 } mxc_gpio_cfg_t;
 
 /**
@@ -350,6 +361,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX78000/i2c.h b/Libraries/PeriphDrivers/Include/MAX78000/i2c.h
index ef7ce11145..fa82226050 100644
--- a/Libraries/PeriphDrivers/Include/MAX78000/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX78000/i2c.h
@@ -41,9 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX78000_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
-/***** Definitions *****/
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -279,6 +280,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -652,8 +701,14 @@ int MXC_I2C_MasterTransaction(mxc_i2c_req_t *req);
 int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
- * @brief   Performs a non-blocking I2C transaction using DMA for reduced time
- *          in the ISR.
+ * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Include/MAX78002/gpio.h b/Libraries/PeriphDrivers/Include/MAX78002/gpio.h
index c3f82e3462..647d94f657 100644
--- a/Libraries/PeriphDrivers/Include/MAX78002/gpio.h
+++ b/Libraries/PeriphDrivers/Include/MAX78002/gpio.h
@@ -137,6 +137,16 @@ typedef enum {
     MXC_GPIO_VSSEL_VDDIOH, /**< Set pin to VIDDIOH voltage */
 } mxc_gpio_vssel_t;
 
+/**
+ * @brief   Enumeration type for drive strength configuration.
+ */
+typedef enum {
+    MXC_GPIO_DRVSTR_0, /**< Drive Strength 0 */
+    MXC_GPIO_DRVSTR_1, /**< Drive Strength 1 */
+    MXC_GPIO_DRVSTR_2, /**< Drive Strength 2 */
+    MXC_GPIO_DRVSTR_3, /**< Drive Strength 3 */
+} mxc_gpio_drvstr_t;
+
 /**
  * @brief   Enumeration type for the type of GPIO pad on a given pin.
  */
@@ -157,6 +167,7 @@ typedef struct {
     mxc_gpio_func_t func; /**< Function type */
     mxc_gpio_pad_t pad; /**< Pad type */
     mxc_gpio_vssel_t vssel; /**< Voltage select */
+    mxc_gpio_drvstr_t drvstr; /**< Drive Strength select */
 } mxc_gpio_cfg_t;
 
 /**
@@ -348,6 +359,15 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask);
  */
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port);
 
+/**
+ * @brief      Set Drive Strength for pins.
+ *
+ * @param      port   The GPIO port.
+ * @param[in]  ds     Drive strength level. Ref /mxc_gpio_ds_t enum type.
+ * @param[in]  mask   Pins in the GPIO port that will be set to the voltage.
+ */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask);
+
 /**@} end of group gpio */
 
 #ifdef __cplusplus
diff --git a/Libraries/PeriphDrivers/Include/MAX78002/i2c.h b/Libraries/PeriphDrivers/Include/MAX78002/i2c.h
index aacae5002f..360eafa608 100644
--- a/Libraries/PeriphDrivers/Include/MAX78002/i2c.h
+++ b/Libraries/PeriphDrivers/Include/MAX78002/i2c.h
@@ -41,9 +41,10 @@
 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX78002_I2C_H_
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_sys.h"
 #include "i2c_regs.h"
-/***** Definitions *****/
+#include "dma_regs.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -285,6 +286,54 @@ int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable);
  */
 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c);
 
+/**
+ * @brief   Initializes the DMA for I2C DMA transactions.
+ * 
+ * This function will release any acquired DMA channels before reacquiring and
+ * reconfiguring selected I2C DMA TX or RX channels.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   dma         Pointer to DMA registers (selects the DMA block used).
+ * @param   use_dma_tx  If true, acquire and configure DMA TX channel, else release any 
+ *                      acquired DMA TX channel.
+ * @param   use_dma_rx  If true, acquire and configure DMA RX channel, else release any 
+ *                      acquired DMA RX channel.
+ *
+ * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx);
+
+/**
+ * @brief   Retreive the DMA TX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA TX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Retreive the DMA RX Channel associated with I2C instance.
+ *
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ *
+ * @return  If successful, the DMA RX Channel number is returned. Otherwise, see
+ *          \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c);
+
+/**
+ * @brief   Sets the I2C instance's DMA TX/RX request select.
+ * 
+ * @param   i2c         Pointer to I2C registers (selects the I2C block used).
+ * @param   txData      Pointer to transmit buffer.
+ * @param   rxData      Pointer to receive buffer.
+ *  
+ * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
+ */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData);
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -569,8 +618,6 @@ void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c);
  *
  * @param   i2c         Pointer to I2C registers (selects the I2C block used.)
  * @param   timeout     Timeout in uS
- *
- * @return  Success/Fail, see \ref MXC_Error_Codes for a list of return codes.
  */
 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout);
 
@@ -664,8 +711,14 @@ int MXC_I2C_MasterTransaction(mxc_i2c_req_t *req);
 int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req);
 
 /**
- * @brief   Performs a non-blocking I2C transaction using DMA for reduced time
- *          in the ISR.
+ * @brief   Performs a non-blocking I2C Master transaction using DMA for reduced time
+ *          in the ISR. This function initializes the DMA and acquires DMA channels
+ *          if MXC_I2C_DMA_Init(...) was not called earlier.
+ * 
+ * It is recommended to initialize the DMA by calling MXC_I2C_DMA_Init(...) function
+ * before calling MXC_I2C_MasterTransactionDMA(...). This provides flexibility in
+ * setting up generic DMA channel vectors during run-time without knowing what DMA 
+ * channels will be acquired beforehand.
  *
  * Performs a non-blocking I2C transaction.  These actions will be performed:
  *   1. If necessary, generate a start condition on the bus.
diff --git a/Libraries/PeriphDrivers/Source/ADC/adc_ai87.c b/Libraries/PeriphDrivers/Source/ADC/adc_ai87.c
index deab35bd84..c84c3cd2e1 100644
--- a/Libraries/PeriphDrivers/Source/ADC/adc_ai87.c
+++ b/Libraries/PeriphDrivers/Source/ADC/adc_ai87.c
@@ -110,6 +110,7 @@ static void initGPIOforHWTrig(mxc_adc_trig_sel_t hwTrig)
         gpioCfg.func = MXC_GPIO_FUNC_ALT2;
         gpioCfg.pad = MXC_GPIO_PAD_NONE;
         gpioCfg.vssel = MXC_GPIO_VSSEL_VDDIOH;
+        gpioCfg.drvstr = MXC_GPIO_DRVSTR_0;
         MXC_GPIO_Config(&gpioCfg);
         break;
     case MXC_ADC_TRIG_SEL_P1_13:
@@ -118,6 +119,7 @@ static void initGPIOforHWTrig(mxc_adc_trig_sel_t hwTrig)
         gpioCfg.func = MXC_GPIO_FUNC_ALT2;
         gpioCfg.pad = MXC_GPIO_PAD_NONE;
         gpioCfg.vssel = MXC_GPIO_VSSEL_VDDIOH;
+        gpioCfg.drvstr = MXC_GPIO_DRVSTR_0;
         MXC_GPIO_Config(&gpioCfg);
         break;
     case MXC_ADC_TRIG_SEL_P1_14:
@@ -126,6 +128,7 @@ static void initGPIOforHWTrig(mxc_adc_trig_sel_t hwTrig)
         gpioCfg.func = MXC_GPIO_FUNC_ALT2;
         gpioCfg.pad = MXC_GPIO_PAD_NONE;
         gpioCfg.vssel = MXC_GPIO_VSSEL_VDDIOH;
+        gpioCfg.drvstr = MXC_GPIO_DRVSTR_0;
         MXC_GPIO_Config(&gpioCfg);
         break;
     }
diff --git a/Libraries/PeriphDrivers/Source/ADC/adc_me21.c b/Libraries/PeriphDrivers/Source/ADC/adc_me21.c
index d85aa9f3fc..43556e7b99 100644
--- a/Libraries/PeriphDrivers/Source/ADC/adc_me21.c
+++ b/Libraries/PeriphDrivers/Source/ADC/adc_me21.c
@@ -122,6 +122,7 @@ static void initGPIOforHWTrig(mxc_adc_trig_sel_t hwTrig)
         gpioCfg.func = MXC_GPIO_FUNC_ALT4;
         gpioCfg.pad = MXC_GPIO_PAD_NONE;
         gpioCfg.vssel = MXC_GPIO_VSSEL_VDDIO;
+        gpioCfg.drvstr = MXC_GPIO_DRVSTR_0;
         MXC_GPIO_Config(&gpioCfg);
         break;
     case MXC_ADC_TRIG_SEL_P0_22:
@@ -130,6 +131,7 @@ static void initGPIOforHWTrig(mxc_adc_trig_sel_t hwTrig)
         gpioCfg.func = MXC_GPIO_FUNC_ALT2;
         gpioCfg.pad = MXC_GPIO_PAD_NONE;
         gpioCfg.vssel = MXC_GPIO_VSSEL_VDDIO;
+        gpioCfg.drvstr = MXC_GPIO_DRVSTR_0;
         MXC_GPIO_Config(&gpioCfg);
         break;
     case MXC_ADC_TRIG_SEL_P1_4:
@@ -138,6 +140,7 @@ static void initGPIOforHWTrig(mxc_adc_trig_sel_t hwTrig)
         gpioCfg.func = MXC_GPIO_FUNC_ALT4;
         gpioCfg.pad = MXC_GPIO_PAD_NONE;
         gpioCfg.vssel = MXC_GPIO_VSSEL_VDDIO;
+        gpioCfg.drvstr = MXC_GPIO_DRVSTR_0;
         MXC_GPIO_Config(&gpioCfg);
         break;
     }
diff --git a/Libraries/PeriphDrivers/Source/AFE/hart_uart.c b/Libraries/PeriphDrivers/Source/AFE/hart_uart.c
index d6b899b10c..e5d0d6c607 100644
--- a/Libraries/PeriphDrivers/Source/AFE/hart_uart.c
+++ b/Libraries/PeriphDrivers/Source/AFE/hart_uart.c
@@ -284,6 +284,7 @@ static int setup_rts_pin(void)
     hart_rts.pad = MXC_GPIO_PAD_NONE;
     hart_rts.func = MXC_GPIO_FUNC_OUT;
     hart_rts.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    hart_rts.drvstr = MXC_GPIO_DRVSTR_0;
 
     retval = MXC_AFE_GPIO_Config(&hart_rts);
     if (retval != E_NO_ERROR) {
@@ -305,6 +306,7 @@ static int idle_rts_pin(void)
     hart_rts.pad = MXC_GPIO_PAD_PULL_DOWN;
     hart_rts.func = MXC_GPIO_FUNC_OUT;
     hart_rts.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    hart_rts.drvstr = MXC_GPIO_DRVSTR_0;
 
     retval = MXC_AFE_GPIO_Config(&hart_rts);
     if (retval != E_NO_ERROR) {
@@ -324,6 +326,7 @@ static int setup_cd_pin(void)
     hart_cd.pad = MXC_GPIO_PAD_NONE;
     hart_cd.func = MXC_GPIO_FUNC_IN;
     hart_cd.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    hart_cd.drvstr = MXC_GPIO_DRVSTR_0;
 
     retval = MXC_AFE_GPIO_Config(&hart_cd);
     if (retval != E_NO_ERROR) {
@@ -353,6 +356,7 @@ static int idle_cd_pin(void)
     hart_cd.pad = MXC_GPIO_PAD_PULL_DOWN;
     hart_cd.func = MXC_GPIO_FUNC_IN;
     hart_cd.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    hart_cd.drvstr = MXC_GPIO_DRVSTR_0;
 
     retval = MXC_AFE_GPIO_Config(&hart_cd);
     if (retval != E_NO_ERROR) {
@@ -377,6 +381,7 @@ static int setup_hart_in_pin(void)
     hart_in.pad = MXC_GPIO_PAD_NONE;
     hart_in.func = MXC_GPIO_FUNC_OUT;
     hart_in.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    hart_in.drvstr = MXC_GPIO_DRVSTR_0;
 
     retval = MXC_AFE_GPIO_Config(&hart_in);
     if (retval != E_NO_ERROR) {
@@ -399,6 +404,7 @@ static int idle_hart_in_pin(void)
     hart_in.pad = MXC_GPIO_PAD_PULL_DOWN;
     hart_in.func = MXC_GPIO_FUNC_OUT;
     hart_in.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    hart_in.drvstr = MXC_GPIO_DRVSTR_0;
 
     retval = MXC_AFE_GPIO_Config(&hart_in);
     if (retval != E_NO_ERROR) {
@@ -418,6 +424,7 @@ static int setup_hart_out_pin(void)
     hart_out.pad = MXC_GPIO_PAD_NONE;
     hart_out.func = MXC_GPIO_FUNC_IN;
     hart_out.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    hart_out.drvstr = MXC_GPIO_DRVSTR_0;
 
     retval = MXC_AFE_GPIO_Config(&hart_out);
     if (retval != E_NO_ERROR) {
@@ -437,6 +444,7 @@ static int idle_hart_out_pin(void)
     hart_out.pad = MXC_GPIO_PAD_PULL_DOWN;
     hart_out.func = MXC_GPIO_FUNC_OUT;
     hart_out.vssel = MXC_GPIO_VSSEL_VDDIOH;
+    hart_out.drvstr = MXC_GPIO_DRVSTR_0;
 
     retval = MXC_AFE_GPIO_Config(&hart_out);
     if (retval != E_NO_ERROR) {
diff --git a/Libraries/PeriphDrivers/Source/CSI2/csi2_reva.c b/Libraries/PeriphDrivers/Source/CSI2/csi2_reva.c
index d5064501e0..01f664da9b 100644
--- a/Libraries/PeriphDrivers/Source/CSI2/csi2_reva.c
+++ b/Libraries/PeriphDrivers/Source/CSI2/csi2_reva.c
@@ -1047,6 +1047,7 @@ mxc_gpio_cfg_t indicator = { .func = MXC_GPIO_FUNC_OUT,
                              .port = GPIO_INDICATOR_PORT,
                              .mask = GPIO_INDICATOR_PIN,
                              .vssel = MXC_GPIO_VSSEL_VDDIOH,
+                             .drvstr = MXC_GPIO_DRVSTR_0,
                              .pad = MXC_GPIO_PAD_NONE };
 #endif
 
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_ai85.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_ai85.c
index 213c60cdae..df5aa7304e 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_ai85.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_ai85.c
@@ -207,7 +207,17 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
     }
 
     // Configure the vssel
-    return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    error = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    if (error != E_NO_ERROR) {
+        return error;
+    }
+
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 /* ************************************************************************** */
@@ -410,3 +420,9 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+/* ************************************************************************** */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_ai87.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_ai87.c
index 213c60cdae..df5aa7304e 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_ai87.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_ai87.c
@@ -207,7 +207,17 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
     }
 
     // Configure the vssel
-    return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    error = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    if (error != E_NO_ERROR) {
+        return error;
+    }
+
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 /* ************************************************************************** */
@@ -410,3 +420,9 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+/* ************************************************************************** */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_es17.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_es17.c
index 87295ebbca..179546518b 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_es17.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_es17.c
@@ -130,7 +130,17 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
     }
 
     // Configure the vssel
-    return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    error = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    if (error != E_NO_ERROR) {
+        return error;
+    }
+
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 uint32_t MXC_GPIO_InGet(mxc_gpio_regs_t *port, uint32_t mask)
@@ -217,3 +227,8 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 {
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me10.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me10.c
index 9231b10664..97db19aec7 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me10.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me10.c
@@ -151,7 +151,18 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
         return E_BAD_PARAM;
     }
 
-    return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    // Configure the vssel
+    err = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    if (err != E_NO_ERROR) {
+        return err;
+    }
+
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 /* ************************************************************************** */
@@ -254,4 +265,10 @@ void MXC_GPIO_ClearWakeEn(mxc_gpio_regs_t *port, uint32_t mask)
 uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 {
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
-}
\ No newline at end of file
+}
+
+/* ************************************************************************** */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me11.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me11.c
index 78c1e0fbf9..52ac14b7de 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me11.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me11.c
@@ -72,6 +72,7 @@ int MXC_GPIO_Reset(uint32_t portmask)
 
 int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
 {
+    int error;
     mxc_gpio_regs_t *gpio = cfg->port;
 
     // Set the GPIO type
@@ -133,7 +134,17 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
     }
 
     // Configure the vssel
-    return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    error = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    if (error != E_NO_ERROR) {
+        return error;
+    }
+
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 uint32_t MXC_GPIO_InGet(mxc_gpio_regs_t *port, uint32_t mask)
@@ -220,3 +231,8 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 {
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me12.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me12.c
index eaa30f3479..a1ee12ab61 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me12.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me12.c
@@ -125,7 +125,17 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
     }
 
     // Configure the vssel
-    return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    error = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    if (error != E_NO_ERROR) {
+        return error;
+    }
+
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 /* ************************************************************************** */
@@ -229,3 +239,9 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 {
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+/* ************************************************************************** */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me13.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me13.c
index c2f39b0369..d98fcd75dc 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me13.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me13.c
@@ -154,7 +154,17 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
     }
 
     // Configure the vssel
-    return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    error = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    if (error != E_NO_ERROR) {
+        return error;
+    }
+
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 uint32_t MXC_GPIO_InGet(mxc_gpio_regs_t *port, uint32_t mask)
@@ -241,3 +251,8 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 {
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me14.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me14.c
index a4d8e36709..7f55668fd2 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me14.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me14.c
@@ -238,3 +238,9 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 {
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+/* ************************************************************************** */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me15.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me15.c
index 127ed213a8..6741a29f63 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me15.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me15.c
@@ -113,7 +113,12 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
         return E_BAD_PARAM;
     }
 
-    return E_NO_ERROR;
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 uint32_t MXC_GPIO_InGet(mxc_gpio_regs_t *port, uint32_t mask)
@@ -200,3 +205,8 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 {
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me16.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me16.c
index 44c01de35a..1596db8d3e 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me16.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me16.c
@@ -114,7 +114,12 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
         return E_BAD_PARAM;
     }
 
-    return E_NO_ERROR;
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 uint32_t MXC_GPIO_InGet(mxc_gpio_regs_t *port, uint32_t mask)
@@ -201,3 +206,8 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 {
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me17.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me17.c
index 213c60cdae..df5aa7304e 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me17.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me17.c
@@ -207,7 +207,17 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
     }
 
     // Configure the vssel
-    return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    error = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    if (error != E_NO_ERROR) {
+        return error;
+    }
+
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 /* ************************************************************************** */
@@ -410,3 +420,9 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+/* ************************************************************************** */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me18.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me18.c
index 72864e4d15..2b91bbcada 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me18.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me18.c
@@ -251,7 +251,17 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
 
     // Configure the vssel
     if (port < 4) {
-        return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+        error = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+        if (error != E_NO_ERROR) {
+            return error;
+        }
+    }
+
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
     }
 
     return E_NO_ERROR;
@@ -432,3 +442,9 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+/* ************************************************************************** */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me20.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me20.c
index caf75b1389..05c47d410c 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me20.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me20.c
@@ -198,7 +198,17 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
     }
 
     // Configure the vssel
-    return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    error = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    if (error != E_NO_ERROR) {
+        return error;
+    }
+
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 /* ************************************************************************** */
@@ -365,3 +375,9 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 {
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+/* ************************************************************************** */
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me21.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me21.c
index 9bae699c60..c31ff4ef0a 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me21.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me21.c
@@ -115,7 +115,12 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
         return E_BAD_PARAM;
     }
 
-    return E_NO_ERROR;
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 uint32_t MXC_GPIO_InGet(mxc_gpio_regs_t *port, uint32_t mask)
@@ -202,3 +207,8 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 {
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_me55.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_me55.c
index e2bc4f2e99..8fb5440c45 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_me55.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_me55.c
@@ -132,7 +132,17 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
     }
 
     // Configure the vssel
-    return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    error = MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
+    if (error != E_NO_ERROR) {
+        return error;
+    }
+
+    // Configure the drive strength
+    if (cfg->func == MXC_GPIO_FUNC_IN) {
+        return E_NO_ERROR;
+    } else {
+        return MXC_GPIO_SetDriveStrength(gpio, cfg->drvstr, cfg->mask);
+    }
 }
 
 uint32_t MXC_GPIO_InGet(mxc_gpio_regs_t *port, uint32_t mask)
@@ -219,3 +229,8 @@ uint32_t MXC_GPIO_GetWakeEn(mxc_gpio_regs_t *port)
 {
     return MXC_GPIO_RevA_GetWakeEn((mxc_gpio_reva_regs_t *)port);
 }
+
+int MXC_GPIO_SetDriveStrength(mxc_gpio_regs_t *port, mxc_gpio_drvstr_t drvstr, uint32_t mask)
+{
+    return MXC_GPIO_RevA_SetDriveStrength((mxc_gpio_reva_regs_t *)port, drvstr, mask);
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_reva.c b/Libraries/PeriphDrivers/Source/GPIO/gpio_reva.c
index 4c70cf1639..b943978766 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_reva.c
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_reva.c
@@ -235,3 +235,37 @@ uint32_t MXC_GPIO_RevA_GetWakeEn(mxc_gpio_reva_regs_t *port)
 {
     return port->wken;
 }
+
+int MXC_GPIO_RevA_SetDriveStrength(mxc_gpio_reva_regs_t *port, mxc_gpio_drvstr_t drvstr,
+                                   uint32_t mask)
+{
+    // Configure the drive strength.
+    switch (drvstr) {
+    case MXC_GPIO_DRVSTR_0:
+        port->ds0 &= ~mask;
+        port->ds1 &= ~mask;
+        break;
+
+    case MXC_GPIO_DRVSTR_1:
+        port->ds0 |= mask;
+        port->ds1 &= ~mask;
+        break;
+
+    case MXC_GPIO_DRVSTR_2:
+        port->ds0 &= ~mask;
+        port->ds1 |= mask;
+        break;
+
+    case MXC_GPIO_DRVSTR_3:
+        port->ds0 |= mask;
+        port->ds1 |= mask;
+        break;
+
+    default:
+        // Set default drive strength to type 0.
+        port->ds0 &= ~mask;
+        port->ds1 &= ~mask;
+    }
+
+    return E_NO_ERROR;
+}
diff --git a/Libraries/PeriphDrivers/Source/GPIO/gpio_reva.h b/Libraries/PeriphDrivers/Source/GPIO/gpio_reva.h
index 22f643710d..d926b1ff8a 100644
--- a/Libraries/PeriphDrivers/Source/GPIO/gpio_reva.h
+++ b/Libraries/PeriphDrivers/Source/GPIO/gpio_reva.h
@@ -67,6 +67,8 @@ int MXC_GPIO_RevA_SetAF(mxc_gpio_reva_regs_t *port, mxc_gpio_func_t func, uint32
 void MXC_GPIO_RevA_SetWakeEn(mxc_gpio_reva_regs_t *port, uint32_t mask);
 void MXC_GPIO_RevA_ClearWakeEn(mxc_gpio_reva_regs_t *port, uint32_t mask);
 uint32_t MXC_GPIO_RevA_GetWakeEn(mxc_gpio_reva_regs_t *port);
+int MXC_GPIO_RevA_SetDriveStrength(mxc_gpio_reva_regs_t *port, mxc_gpio_drvstr_t drvstr,
+                                   uint32_t mask);
 
 /**@} end of group gpio */
 
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_ai87.c b/Libraries/PeriphDrivers/Source/I2C/i2c_ai87.c
index 50f309e612..2caa81e868 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_ai87.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_ai87.c
@@ -102,7 +102,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_NO_DEVICE;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
@@ -146,6 +146,76 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        case 1:
+            txReqSel = MXC_DMA_REQUEST_I2C1TX;
+            break;
+
+        case 2:
+            txReqSel = MXC_DMA_REQUEST_I2C2TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        case 1:
+            rxReqSel = MXC_DMA_REQUEST_I2C1RX;
+            break;
+
+        case 2:
+            rxReqSel = MXC_DMA_REQUEST_I2C2RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -193,23 +263,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-    }
-
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                      MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
@@ -225,23 +280,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-    }
-
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                       MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_es17.c b/Libraries/PeriphDrivers/Source/I2C/i2c_es17.c
index 4798bc4f39..d9ac5fdcfe 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_es17.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_es17.c
@@ -112,7 +112,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_NO_DEVICE;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
@@ -157,6 +157,60 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -204,18 +258,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-    }
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                      MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
@@ -231,18 +275,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-    }
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len,
-                                       (mxc_i2c_reva_dma_complete_cb_t)callback, config, MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_me10.c b/Libraries/PeriphDrivers/Source/I2C/i2c_me10.c
index dc8e277a1e..7998542f29 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_me10.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_me10.c
@@ -120,7 +120,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_BAD_PARAM;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 /* ************************************************************************** */
@@ -160,6 +160,72 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+/* ************************************************************************* */
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+/* ************************************************************************* */
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+/* ************************************************************************* */
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+/* ************************************************************************* */
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        case 1:
+            txReqSel = MXC_DMA_REQUEST_I2C1TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        case 1:
+            rxReqSel = MXC_DMA_REQUEST_I2C1RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************** */
 int MXC_I2C_Start(mxc_i2c_regs_t *i2c)
 {
@@ -213,21 +279,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback)
 {
-    mxc_dma_config_t config;
-
-    switch (MXC_I2C_GET_IDX(i2c)) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-    default:
-        return E_BAD_PARAM;
-    }
-
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                      MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 /* ************************************************************************** */
@@ -246,21 +299,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback)
 {
-    mxc_dma_config_t config;
-
-    switch (MXC_I2C_GET_IDX(i2c)) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-    default:
-        return E_BAD_PARAM;
-    }
-
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                       MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 /* ************************************************************************** */
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_me11.c b/Libraries/PeriphDrivers/Source/I2C/i2c_me11.c
index 33c5fd2aac..b882e03e8b 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_me11.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_me11.c
@@ -139,7 +139,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_BAD_PARAM;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 int MXC_I2C_SetFrequency(mxc_i2c_regs_t *i2c, unsigned int hz)
@@ -167,6 +167,68 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        case 1:
+            txReqSel = MXC_DMA_REQUEST_I2C1TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        case 1:
+            rxReqSel = MXC_DMA_REQUEST_I2C1RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -214,22 +276,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-    }
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len,
-                                      (mxc_i2c_reva_dma_complete_cb_t)callback, config, MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
@@ -245,22 +293,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-    }
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len,
-                                       (mxc_i2c_reva_dma_complete_cb_t)callback, config, MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_me12.c b/Libraries/PeriphDrivers/Source/I2C/i2c_me12.c
index e189c332da..10c96e961e 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_me12.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_me12.c
@@ -98,7 +98,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_NO_DEVICE;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
@@ -140,6 +140,68 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        case 1:
+            txReqSel = MXC_DMA_REQUEST_I2C1TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        case 1:
+            rxReqSel = MXC_DMA_REQUEST_I2C1RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -187,23 +249,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-    }
-
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len,
-                                      (mxc_i2c_reva_dma_complete_cb_t)callback, config, MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
@@ -219,23 +266,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-    }
-
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len,
-                                       (mxc_i2c_reva_dma_complete_cb_t)callback, config, MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_me13.c b/Libraries/PeriphDrivers/Source/I2C/i2c_me13.c
index 7a8c8b6d4d..42337d941e 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_me13.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_me13.c
@@ -103,7 +103,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_NO_DEVICE;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
@@ -152,6 +152,76 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        case 1:
+            txReqSel = MXC_DMA_REQUEST_I2C1TX;
+            break;
+
+        case 2:
+            txReqSel = MXC_DMA_REQUEST_I2C2TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        case 1:
+            rxReqSel = MXC_DMA_REQUEST_I2C1RX;
+            break;
+
+        case 2:
+            rxReqSel = MXC_DMA_REQUEST_I2C2RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -199,22 +269,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-    }
-
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                      MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
@@ -230,21 +286,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-    }
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                       MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_me14.c b/Libraries/PeriphDrivers/Source/I2C/i2c_me14.c
index 740aa3f16e..3b47c6311d 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_me14.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_me14.c
@@ -121,7 +121,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_BAD_PARAM;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 int MXC_I2C_SetFrequency(mxc_i2c_regs_t *i2c, unsigned int hz)
@@ -149,6 +149,76 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        case 1:
+            txReqSel = MXC_DMA_REQUEST_I2C1TX;
+            break;
+
+        case 2:
+            txReqSel = MXC_DMA_REQUEST_I2C2TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        case 1:
+            rxReqSel = MXC_DMA_REQUEST_I2C1RX;
+            break;
+
+        case 2:
+            rxReqSel = MXC_DMA_REQUEST_I2C2RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -196,29 +266,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback, mxc_dma_regs_t *dma)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    if (MXC_DMA_GET_IDX(dma) == -1) {
-        return E_BAD_PARAM;
-    }
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-
-    case 2:
-        config.reqsel = MXC_DMA_REQUEST_I2C2RX;
-        break;
-    }
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len,
-                                      (mxc_i2c_reva_dma_complete_cb_t)callback, config, dma);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, dma);
 }
 
 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
@@ -234,25 +283,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback, mxc_dma_regs_t *dma)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    if (MXC_DMA_GET_IDX(dma) == -1) {
-        return E_BAD_PARAM;
-    }
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-    }
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len,
-                                       (mxc_i2c_reva_dma_complete_cb_t)callback, config, dma);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, dma);
 }
 
 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_me15.c b/Libraries/PeriphDrivers/Source/I2C/i2c_me15.c
index 681c4a26a9..85f9df5107 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_me15.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_me15.c
@@ -44,6 +44,9 @@
 #include "dma_regs.h"
 #include "i2c.h"
 #include "i2c_reva.h"
+#include "dma.h"
+#include "dma_reva.h"
+#include "dma_reva_regs.h"
 
 /* **** Definitions **** */
 #define MXC_I2C_MAX_ADDR_WIDTH 0x7F
@@ -133,7 +136,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_NO_DEVICE;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
@@ -177,6 +180,76 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        case 1:
+            txReqSel = MXC_DMA_REQUEST_I2C1TX;
+            break;
+
+        case 2:
+            txReqSel = MXC_DMA_REQUEST_I2C2TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        case 1:
+            rxReqSel = MXC_DMA_REQUEST_I2C1RX;
+            break;
+
+        case 2:
+            rxReqSel = MXC_DMA_REQUEST_I2C2RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -199,8 +272,6 @@ int MXC_I2C_ReadByte(mxc_i2c_regs_t *i2c, unsigned char *byte, int ack)
 {
     return MXC_I2C_RevA_ReadByte((mxc_i2c_reva_regs_t *)i2c, byte, ack);
 }
-// return MXC_I2C_RevA_ReadByteInteractive ((mxc_i2c_reva_regs_t*) i2c, byte, (mxc_i2c_reva_getAck_t) getAck);
-// }
 
 int MXC_I2C_Write(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int *len)
 {
@@ -220,26 +291,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-
-    default:
-        return E_BAD_PARAM;
-    }
-
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                      MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
@@ -255,26 +308,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-
-    default:
-        return E_BAD_PARAM;
-    }
-
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                       MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_me16.c b/Libraries/PeriphDrivers/Source/I2C/i2c_me16.c
deleted file mode 100644
index 99f4ad51ed..0000000000
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_me16.c
+++ /dev/null
@@ -1,406 +0,0 @@
-/******************************************************************************
- * Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
- * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Except as contained in this notice, the name of Maxim Integrated
- * Products, Inc. shall not be used except as stated in the Maxim Integrated
- * Products, Inc. Branding Policy.
- *
- * The mere transfer of this software does not imply any licenses
- * of trade secrets, proprietary technology, copyrights, patents,
- * trademarks, maskwork rights, or any other form of intellectual
- * property whatsoever. Maxim Integrated Products, Inc. retains all
- * ownership rights.
- *
- ******************************************************************************/
-
-#include <stdio.h>
-#include <stddef.h>
-#include <stdint.h>
-#include "mxc_device.h"
-#include "mxc_assert.h"
-#include "mxc_lock.h"
-#include "mxc_sys.h"
-#include "mxc_delay.h"
-#include "i2c_regs.h"
-#include "dma_regs.h"
-#include "i2c.h"
-#include "i2c_reva.h"
-
-/* **** Variable Declaration **** */
-uint32_t interruptCheck = MXC_F_I2C_INTFL0_ADDR_MATCH | MXC_F_I2C_INTFL0_DNR_ERR;
-
-/* **** Function Prototypes **** */
-
-/* ************************************************************************* */
-/* Control/Configuration functions                                           */
-/* ************************************************************************* */
-int MXC_I2C_Init(mxc_i2c_regs_t *i2c, int masterMode, unsigned int slaveAddr)
-{
-    if (i2c == NULL) {
-        return E_NULL_PTR;
-    }
-
-    MXC_I2C_Shutdown(i2c); // Clear everything out
-
-    if (i2c == MXC_I2C0) {
-        MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C0);
-        MXC_GPIO_Config(&gpio_cfg_i2c0);
-    } else if (i2c == MXC_I2C1) {
-        MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C1);
-        MXC_GPIO_Config(&gpio_cfg_i2c1);
-    } else if (i2c == MXC_I2C2) {
-        MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C2);
-        MXC_GPIO_Config(&gpio_cfg_i2c2);
-    } else {
-        return E_NO_DEVICE;
-    }
-
-    return MXC_I2C_RevA_Init(i2c, masterMode, slaveAddr);
-}
-
-int MXC_I2C_SetSlaveAddr(mxc_i2c_regs_t *i2c, unsigned int slaveAddr, int idx)
-{
-    if (i2c == NULL) {
-        return E_NULL_PTR;
-    }
-
-    if (idx >= MXC_I2C_NUM_TARGET_ADDR) {
-        return E_NOT_SUPPORTED;
-    }
-
-    if (slaveAddr > MXC_F_I2C_SLAVE_ADDR) {
-        // Only support addresses up to 10 bits
-        return E_BAD_PARAM;
-    }
-
-    // Set the slave address to operate on
-    MXC_SETFIELD(i2c->slave, MXC_F_I2C_SLAVE_IDX, (idx << MXC_F_I2C_SLAVE_IDX_POS));
-
-    if (slaveAddr > MXC_I2C_MAX_ADDR_WIDTH) {
-        // Set for 10bit addressing mode
-        i2c->slave |= MXC_F_I2C_SLAVE_EXT_ADDR_EN;
-    } else {
-        // Clear for 7bit addressing mode
-        i2c->slave &= ~MXC_F_I2C_SLAVE_EXT_ADDR_EN;
-    }
-
-    // Set the slave address
-    MXC_SETFIELD(i2c->slave, MXC_F_I2C_SLAVE_ADDR, (slaveAddr << MXC_F_I2C_SLAVE_ADDR_POS));
-
-    // Enable the slave address
-    i2c->slave &= ~MXC_F_I2C_SLAVE_DIS;
-
-    return E_NO_ERROR;
-}
-
-int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
-{
-    // Configure GPIO for I2C
-    if (i2c == MXC_I2C0) {
-        MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C0);
-        MXC_SYS_Reset_Periph(MXC_SYS_RESET0_I2C0);
-    } else if (i2c == MXC_I2C1) {
-        MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C1);
-        MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C1);
-    } else if (i2c == MXC_I2C2) {
-        MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C2);
-        MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C2);
-    } else {
-        return E_NO_DEVICE;
-    }
-
-    return E_NO_ERROR;
-}
-
-int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
-{
-    // Configure GPIO for I2C
-    if (i2c == MXC_I2C0) {
-        MXC_SYS_Reset_Periph(MXC_SYS_RESET0_I2C0);
-    } else if (i2c == MXC_I2C1) {
-        MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C1);
-    } else if (i2c == MXC_I2C2) {
-        MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C2);
-    } else {
-        return E_NO_DEVICE;
-    }
-
-    return E_NO_ERROR;
-}
-
-int MXC_I2C_SetFrequency(mxc_i2c_regs_t *i2c, unsigned int hz)
-{
-    return MXC_I2C_RevA_SetFrequency(i2c, hz);
-}
-
-unsigned int MXC_I2C_GetFrequency(mxc_i2c_regs_t *i2c)
-{
-    return MXC_I2C_RevA_GetFrequency(i2c);
-}
-
-int MXC_I2C_ReadyForSleep(mxc_i2c_regs_t *i2c)
-{
-    return MXC_I2C_RevA_ReadyForSleep(i2c);
-}
-
-int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable)
-{
-    return MXC_I2C_RevA_SetClockStretching(i2c, enable);
-}
-
-int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
-{
-    return MXC_I2C_RevA_GetClockStretching(i2c);
-}
-
-/* ************************************************************************* */
-/* Low-level functions                                                       */
-/* ************************************************************************* */
-int MXC_I2C_Start(mxc_i2c_regs_t *i2c)
-{
-    return MXC_I2C_RevA_Start(i2c);
-}
-
-int MXC_I2C_Stop(mxc_i2c_regs_t *i2c)
-{
-    return MXC_I2C_RevA_Stop(i2c);
-}
-
-int MXC_I2C_WriteByte(mxc_i2c_regs_t *i2c, unsigned char byte)
-{
-    return MXC_I2C_RevA_WriteByte(i2c, byte);
-}
-
-int MXC_I2C_ReadByte(mxc_i2c_regs_t *i2c, unsigned char *byte, int ack)
-{
-    return MXC_I2C_RevA_ReadByte(i2c, byte, ack);
-}
-
-int MXC_I2C_ReadByteInteractive(mxc_i2c_regs_t *i2c, unsigned char *byte, mxc_i2c_getAck_t getAck)
-{
-    return MXC_I2C_RevA_ReadByteInteractive(i2c, byte, getAck);
-}
-
-int MXC_I2C_Write(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int *len)
-{
-    return MXC_I2C_RevA_Write(i2c, bytes, len);
-}
-
-int MXC_I2C_Read(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int *len, int ack)
-{
-    return MXC_I2C_RevA_Read(i2c, bytes, len, ack);
-}
-
-int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsigned int len)
-{
-    return MXC_I2C_RevA_ReadRXFIFO(i2c, bytes, len);
-}
-
-int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
-                          mxc_i2c_dma_complete_cb_t callback)
-{
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-    }
-
-    return MXC_I2C_RevA_ReadRXFIFODMA(i2c, bytes, len, callback, config);
-}
-
-int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
-{
-    return MXC_I2C_RevA_GetRXFIFOAvailable(i2c);
-}
-
-int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsigned int len)
-{
-    return MXC_I2C_RevA_WriteTXFIFO(i2c, bytes, len);
-}
-
-int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
-                           mxc_i2c_dma_complete_cb_t callback)
-{
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-    }
-
-    return MXC_I2C_RevA_WriteTXFIFODMA(i2c, bytes, len, callback, config);
-}
-
-int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
-{
-    return MXC_I2C_RevA_GetTXFIFOAvailable(i2c);
-}
-
-void MXC_I2C_ClearRXFIFO(mxc_i2c_regs_t *i2c)
-{
-    MXC_I2C_RevA_ClearRXFIFO(i2c);
-}
-
-void MXC_I2C_ClearTXFIFO(mxc_i2c_regs_t *i2c)
-{
-    MXC_I2C_RevA_ClearTXFIFO(i2c);
-}
-
-int MXC_I2C_GetFlags(mxc_i2c_regs_t *i2c, unsigned int *flags0, unsigned int *flags1)
-{
-    return MXC_I2C_RevA_GetFlags(i2c, flags0, flags1);
-}
-
-void MXC_I2C_ClearFlags(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
-{
-    MXC_I2C_RevA_ClearFlags(i2c, flags0, flags1);
-}
-
-void MXC_I2C_EnableInt(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
-{
-    MXC_I2C_EnableInt(i2c, flags0, flags1);
-}
-
-void MXC_I2C_DisableInt(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
-{
-    MXC_I2C_DisableInt(i2c, flags0, flags1);
-}
-
-void MXC_I2C_EnablePreload(mxc_i2c_regs_t *i2c)
-{
-    MXC_I2C_RevA_EnablePreload((mxc_i2c_reva_regs_t *)i2c);
-}
-
-void MXC_I2C_DisablePreload(mxc_i2c_regs_t *i2c)
-{
-    MXC_I2C_RevA_DisablePreload((mxc_i2c_reva_regs_t *)i2c);
-}
-
-void MXC_I2C_EnableGeneralCall(mxc_i2c_regs_t *i2c)
-{
-    MXC_I2C_RevA_EnableGeneralCall((mxc_i2c_reva_regs_t *)i2c);
-}
-
-void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c)
-{
-    MXC_I2C_RevA_DisableGeneralCall((mxc_i2c_reva_regs_t *)i2c);
-}
-
-void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout)
-{
-    MXC_I2C_RevA_SetTimeout((mxc_i2c_reva_regs_t *)i2c, timeout);
-}
-
-unsigned int MXC_I2C_GetTimeout(mxc_i2c_regs_t *i2c)
-{
-    return MXC_I2C_RevA_GetTimeout((mxc_i2c_reva_regs_t *)i2c);
-}
-
-int MXC_I2C_Recover(mxc_i2c_regs_t *i2c, unsigned int retries)
-{
-    return MXC_I2C_RevA_Recover(i2c, retries);
-}
-
-/* ************************************************************************* */
-/* Transaction level functions                                               */
-/* ************************************************************************* */
-
-int MXC_I2C_MasterTransaction(mxc_i2c_req_t *req)
-{
-    return MXC_I2C_RevA_MasterTransaction(req);
-}
-
-int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req)
-{
-    return MXC_I2C_RevA_MasterTransactionAsync(req);
-}
-
-int MXC_I2C_MasterTransactionDMA(mxc_i2c_req_t *req)
-{
-    return MXC_I2C_RevA_MasterTransactionDMA(req);
-}
-
-int MXC_I2C_SlaveTransaction(mxc_i2c_regs_t *i2c, mxc_i2c_slave_handler_t callback)
-{
-    return MXC_I2C_RevA_SlaveTransaction(i2c, callback, interruptCheck);
-}
-
-int MXC_I2C_SlaveTransactionAsync(mxc_i2c_regs_t *i2c, mxc_i2c_slave_handler_t callback)
-{
-    return MXC_I2C_RevA_SlaveTransactionAsync(i2c, callback, interruptCheck);
-}
-
-int MXC_I2C_SetRXThreshold(mxc_i2c_regs_t *i2c, unsigned int numBytes)
-{
-    return MXC_I2C_RevA_SetRXThreshold(i2c, numBytes);
-}
-
-unsigned int MXC_I2C_GetRXThreshold(mxc_i2c_regs_t *i2c)
-{
-    return MXC_I2C_RevA_GetRXThreshold(i2c);
-}
-
-int MXC_I2C_SetTXThreshold(mxc_i2c_regs_t *i2c, unsigned int numBytes)
-{
-    return MXC_I2C_RevA_SetTXThreshold(i2c, numBytes);
-}
-
-unsigned int MXC_I2C_GetTXThreshold(mxc_i2c_regs_t *i2c)
-{
-    return MXC_I2C_RevA_GetTXThreshold(i2c);
-}
-
-void MXC_I2C_AsyncStop(mxc_i2c_regs_t *i2c)
-{
-    MXC_I2C_RevA_AsyncStop((mxc_i2c_reva_regs_t *)i2c);
-}
-
-void MXC_I2C_AbortAsync(mxc_i2c_regs_t *i2c)
-{
-    MXC_I2C_RevA_AbortAsync((mxc_i2c_reva_regs_t *)i2c);
-}
-
-void MXC_I2C_AsyncHandler(mxc_i2c_regs_t *i2c)
-{
-    MXC_I2C_RevA_AsyncHandler(i2c, interruptCheck);
-}
-
-void MXC_I2C_DMACallback(int ch, int error)
-{
-    MXC_I2C_RevA_DMACallback(ch, error);
-}
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_me17.c b/Libraries/PeriphDrivers/Source/I2C/i2c_me17.c
index fce606665f..e82437b0a2 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_me17.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_me17.c
@@ -102,7 +102,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_NO_DEVICE;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
@@ -146,6 +146,76 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        case 1:
+            txReqSel = MXC_DMA_REQUEST_I2C1TX;
+            break;
+
+        case 2:
+            txReqSel = MXC_DMA_REQUEST_I2C2TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        case 1:
+            rxReqSel = MXC_DMA_REQUEST_I2C1RX;
+            break;
+
+        case 2:
+            rxReqSel = MXC_DMA_REQUEST_I2C2RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -193,30 +263,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-
-    case 2:
-        config.reqsel = MXC_DMA_REQUEST_I2C2RX;
-        break;
-
-    default:
-        return E_BAD_PARAM;
-    }
-
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len,
-                                      (mxc_i2c_reva_dma_complete_cb_t)callback, config, MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
@@ -232,30 +280,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-
-    case 2:
-        config.reqsel = MXC_DMA_REQUEST_I2C2TX;
-        break;
-
-    default:
-        return E_BAD_PARAM;
-    }
-
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len,
-                                       (mxc_i2c_reva_dma_complete_cb_t)callback, config, MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_me18.c b/Libraries/PeriphDrivers/Source/I2C/i2c_me18.c
index 1c9e862a26..5c7bebd0b2 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_me18.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_me18.c
@@ -102,7 +102,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_NO_DEVICE;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
@@ -146,6 +146,76 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        case 1:
+            txReqSel = MXC_DMA_REQUEST_I2C1TX;
+            break;
+
+        case 2:
+            txReqSel = MXC_DMA_REQUEST_I2C2TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        case 1:
+            rxReqSel = MXC_DMA_REQUEST_I2C1RX;
+            break;
+
+        case 2:
+            rxReqSel = MXC_DMA_REQUEST_I2C2RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -193,23 +263,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-    }
-
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len,
-                                      (mxc_i2c_reva_dma_complete_cb_t)callback, config, MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
@@ -225,23 +280,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-    }
-
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len,
-                                       (mxc_i2c_reva_dma_complete_cb_t)callback, config, MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_me21.c b/Libraries/PeriphDrivers/Source/I2C/i2c_me21.c
index a0471e7d65..fdef823a00 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_me21.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_me21.c
@@ -158,7 +158,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_NO_DEVICE;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
@@ -202,6 +202,76 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        case 1:
+            txReqSel = MXC_DMA_REQUEST_I2C1TX;
+            break;
+
+        case 2:
+            txReqSel = MXC_DMA_REQUEST_I2C2TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        case 1:
+            rxReqSel = MXC_DMA_REQUEST_I2C1RX;
+            break;
+
+        case 2:
+            rxReqSel = MXC_DMA_REQUEST_I2C2RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -249,23 +319,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-    }
-
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                      MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
@@ -281,23 +336,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-    }
-
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                       MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_me55.c b/Libraries/PeriphDrivers/Source/I2C/i2c_me55.c
index e358184523..5d065bb85b 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_me55.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_me55.c
@@ -90,7 +90,7 @@ int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
         return E_NO_DEVICE;
     }
 
-    return E_NO_ERROR;
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
 }
 
 int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
@@ -132,6 +132,68 @@ int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
     return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
 }
 
+int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
+{
+    return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
+                                 use_dma_rx);
+}
+
+int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
+{
+    return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
+{
+    int i2cNum;
+    int txReqSel = -1;
+    int rxReqSel = -1;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (txData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            txReqSel = MXC_DMA_REQUEST_I2C0TX;
+            break;
+
+        case 1:
+            txReqSel = MXC_DMA_REQUEST_I2C1TX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    if (rxData != NULL) {
+        switch (i2cNum) {
+        case 0:
+            rxReqSel = MXC_DMA_REQUEST_I2C0RX;
+            break;
+
+        case 1:
+            rxReqSel = MXC_DMA_REQUEST_I2C1RX;
+            break;
+
+        default:
+            return E_BAD_PARAM;
+        }
+    }
+
+    return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
+                                             (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -179,22 +241,8 @@ int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsig
 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                           mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0RX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1RX;
-        break;
-    }
-
-    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                      MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
@@ -210,21 +258,8 @@ int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsi
 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
                            mxc_i2c_dma_complete_cb_t callback)
 {
-    uint8_t i2cNum;
-    mxc_dma_config_t config;
-    i2cNum = MXC_I2C_GET_IDX(i2c);
-
-    switch (i2cNum) {
-    case 0:
-        config.reqsel = MXC_DMA_REQUEST_I2C0TX;
-        break;
-
-    case 1:
-        config.reqsel = MXC_DMA_REQUEST_I2C1TX;
-        break;
-    }
-    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, callback, config,
-                                       MXC_DMA);
+    // The callback parameter was previously unused but keeping it for backwards-compatibility.
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
 }
 
 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_reva.c b/Libraries/PeriphDrivers/Source/I2C/i2c_reva.c
index 0e94286cdf..55554a788b 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_reva.c
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_reva.c
@@ -34,6 +34,7 @@
 #include <stdio.h>
 #include <stddef.h>
 #include <stdint.h>
+#include <stdbool.h>
 #include "mxc_device.h"
 #include "mxc_assert.h"
 #include "mxc_lock.h"
@@ -43,6 +44,7 @@
 #include "i2c.h"
 #include "i2c_reva.h"
 #include "dma.h"
+#include "dma_reva.h"
 
 /* **** Variable Declaration **** */
 typedef struct {
@@ -52,6 +54,8 @@ typedef struct {
     int channelRx; // DMA channel for RX transaction
     volatile int writeDone; // Write done flag
     volatile int readDone; // Flag done flag
+    bool dma_initialized; // Check to see whether DMA was initialized
+    mxc_dma_reva_regs_t *dma; // Save DMA Instance
 } mxc_i2c_reva_req_state_t;
 
 static mxc_i2c_reva_req_state_t states[MXC_I2C_INSTANCES];
@@ -75,11 +79,14 @@ void MXC_I2C_RevA_SlaveAsyncHandler(mxc_i2c_reva_regs_t *i2c, mxc_i2c_reva_slave
 int MXC_I2C_RevA_Init(mxc_i2c_reva_regs_t *i2c, int masterMode, unsigned int slaveAddr)
 {
     int err;
+    int8_t i2cNum;
 
     if (i2c == NULL) {
         return E_NULL_PTR;
     }
 
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
     if ((err = MXC_I2C_Recover((mxc_i2c_regs_t *)i2c, 16)) != E_NO_ERROR) {
         return err;
     }
@@ -100,6 +107,13 @@ int MXC_I2C_RevA_Init(mxc_i2c_reva_regs_t *i2c, int masterMode, unsigned int sla
         states[MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c)].master = 1;
     }
 
+    // Prepare I2C instance state.
+    states[i2cNum].channelTx = E_NO_DEVICE;
+    states[i2cNum].channelRx = E_NO_DEVICE;
+    states[i2cNum].writeDone = 0;
+    states[i2cNum].readDone = 0;
+    states[i2cNum].dma_initialized = false;
+
     return E_NO_ERROR;
 }
 
@@ -132,7 +146,47 @@ int MXC_I2C_RevA_SetSlaveAddr(mxc_i2c_reva_regs_t *i2c, unsigned int slaveAddr,
 
 int MXC_I2C_RevA_Shutdown(mxc_i2c_reva_regs_t *i2c)
 {
-    return E_NOT_SUPPORTED;
+    int8_t i2cNum;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    i2c->ctrl = 0;
+    i2c->inten0 = 0;
+    i2c->inten1 = 0;
+    i2c->intfl0 = i2c->intfl0;
+    i2c->intfl1 = i2c->intfl1;
+    i2c->rxctrl0 = 0;
+    i2c->rxctrl1 = 0;
+    i2c->txctrl0 = 0;
+    i2c->txctrl1 = 0;
+
+    states[i2cNum] = (const mxc_i2c_reva_req_state_t){ 0 };
+
+    MXC_I2C_ClearRXFIFO((mxc_i2c_regs_t *)i2c);
+    MXC_I2C_ClearTXFIFO((mxc_i2c_regs_t *)i2c);
+
+    if (states[i2cNum].dma_initialized == true) {
+#if TARGET_NUM == 32665
+        MXC_DMA_DeInit((mxc_dma_regs_t *)(states[i2cNum].dma));
+#else
+        MXC_DMA_DeInit();
+#endif
+        // Release any acquired DMA channels.
+        if (states[i2cNum].channelTx >= 0) {
+            MXC_DMA_ReleaseChannel(states[i2cNum].channelTx);
+            states[i2cNum].channelTx = E_NO_DEVICE;
+        }
+        if (states[i2cNum].channelRx >= 0) {
+            MXC_DMA_ReleaseChannel(states[i2cNum].channelRx);
+            states[i2cNum].channelRx = E_NO_DEVICE;
+        }
+    }
+
+    return E_NO_ERROR;
 }
 
 int MXC_I2C_RevA_SetFrequency(mxc_i2c_reva_regs_t *i2c, unsigned int hz)
@@ -252,6 +306,161 @@ int MXC_I2C_RevA_GetClockStretching(mxc_i2c_reva_regs_t *i2c)
     return !((i2c->ctrl & MXC_F_I2C_REVA_CTRL_CLKSTR_DIS) >> MXC_F_I2C_REVA_CTRL_CLKSTR_DIS_POS);
 }
 
+int MXC_I2C_RevA_DMA_Init(mxc_i2c_reva_regs_t *i2c, mxc_dma_reva_regs_t *dma, bool use_dma_tx,
+                          bool use_dma_rx)
+{
+    int8_t i2cNum;
+    int8_t rxChannel;
+    int8_t txChannel;
+
+    if (i2c == NULL || dma == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    if (states[i2cNum].dma_initialized == false) {
+#if TARGET_NUM == 32665
+        MXC_DMA_Init((mxc_dma_regs_t *)dma);
+#else
+        MXC_DMA_Init();
+#endif
+    }
+
+    // Release any acquire DMA TX channels before configuring.
+    if (states[i2cNum].channelTx != E_NO_DEVICE) {
+        MXC_DMA_ReleaseChannel(states[i2cNum].channelTx);
+    }
+
+    // Release any acquire DMA RX channels before configuring.
+    if (states[i2cNum].channelRx != E_NO_DEVICE) {
+        MXC_DMA_ReleaseChannel(states[i2cNum].channelRx);
+    }
+
+    // Set up I2C DMA TX.
+    if (use_dma_tx == true) {
+#if TARGET_NUM == 32665
+        txChannel = MXC_DMA_AcquireChannel((mxc_dma_regs_t *)dma);
+#else
+        txChannel = MXC_DMA_AcquireChannel();
+#endif
+
+        // Set Source and Destination Widths.
+        MXC_SETFIELD(dma->ch[txChannel].ctrl, MXC_F_DMA_REVA_CTRL_SRCWD,
+                     (MXC_DMA_WIDTH_BYTE << MXC_F_DMA_REVA_CTRL_SRCWD_POS));
+        MXC_SETFIELD(dma->ch[txChannel].ctrl, MXC_F_DMA_REVA_CTRL_DSTWD,
+                     (MXC_DMA_WIDTH_BYTE << MXC_F_DMA_REVA_CTRL_DSTWD_POS));
+
+        // Set Source and Destination Increment.
+        MXC_SETFIELD(dma->ch[txChannel].ctrl, MXC_F_DMA_REVA_CTRL_SRCINC,
+                     (1 << MXC_F_DMA_REVA_CTRL_SRCINC_POS));
+        MXC_SETFIELD(dma->ch[txChannel].ctrl, MXC_F_DMA_REVA_CTRL_DSTINC,
+                     (0 << MXC_F_DMA_REVA_CTRL_DSTINC_POS));
+
+        if (states[i2cNum].master) {
+            MXC_DMA_SetCallback(txChannel, MXC_I2C_RevA_DMACallback);
+        } else {
+            MXC_DMA_SetCallback(txChannel, NULL);
+        }
+
+        MXC_DMA_EnableInt(txChannel);
+        MXC_DMA_SetChannelInterruptEn(txChannel, 0, 1);
+
+        states[i2cNum].channelTx = txChannel;
+    }
+
+    // Set up I2C DMA RX.
+    if (use_dma_rx == true) {
+#if TARGET_NUM == 32665
+        rxChannel = MXC_DMA_AcquireChannel((mxc_dma_regs_t *)dma);
+#else
+        rxChannel = MXC_DMA_AcquireChannel();
+#endif
+
+        // Set Source and Destination Widths.
+        MXC_SETFIELD(dma->ch[rxChannel].ctrl, MXC_F_DMA_REVA_CTRL_SRCWD,
+                     (MXC_DMA_WIDTH_BYTE << MXC_F_DMA_REVA_CTRL_SRCWD_POS));
+        MXC_SETFIELD(dma->ch[rxChannel].ctrl, MXC_F_DMA_REVA_CTRL_DSTWD,
+                     (MXC_DMA_WIDTH_BYTE << MXC_F_DMA_REVA_CTRL_DSTWD_POS));
+
+        // Set Source and Destination Increment.
+        MXC_SETFIELD(dma->ch[rxChannel].ctrl, MXC_F_DMA_REVA_CTRL_SRCINC,
+                     (0 << MXC_F_DMA_REVA_CTRL_SRCINC_POS));
+        MXC_SETFIELD(dma->ch[rxChannel].ctrl, MXC_F_DMA_REVA_CTRL_DSTINC,
+                     (1 << MXC_F_DMA_REVA_CTRL_DSTINC_POS));
+
+        if (states[i2cNum].master) {
+            MXC_DMA_SetCallback(rxChannel, MXC_I2C_RevA_DMACallback);
+        } else {
+            MXC_DMA_SetCallback(rxChannel, NULL);
+        }
+
+        MXC_DMA_EnableInt(rxChannel);
+        MXC_DMA_SetChannelInterruptEn(rxChannel, 0, 1);
+
+        states[i2cNum].channelRx = rxChannel;
+    }
+
+    states[i2cNum].dma_initialized = true;
+    states[i2cNum].dma = dma;
+
+    return E_NO_ERROR;
+}
+
+int MXC_I2C_RevA_DMA_GetTXChannel(mxc_i2c_reva_regs_t *i2c)
+{
+    int i2cNum;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    return states[i2cNum].channelTx;
+}
+
+int MXC_I2C_RevA_DMA_GetRXChannel(mxc_i2c_reva_regs_t *i2c)
+{
+    int i2cNum;
+
+    if (i2c == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    return states[i2cNum].channelRx;
+}
+
+int MXC_I2C_RevA_DMA_SetRequestSelect(mxc_i2c_reva_regs_t *i2c, mxc_dma_reva_regs_t *dma,
+                                      uint32_t txReqSel, uint32_t rxReqSel)
+{
+    int i2cNum;
+    uint32_t txChannel;
+    uint32_t rxChannel;
+
+    if (i2c == NULL || dma == NULL) {
+        return E_NULL_PTR;
+    }
+
+    i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+
+    txChannel = states[i2cNum].channelTx;
+    rxChannel = states[i2cNum].channelRx;
+
+    // This function will overwrite the current DMA TX/RX Request Selects.
+    if (txReqSel != -1) {
+        MXC_SETFIELD(dma->ch[txChannel].ctrl, MXC_F_DMA_REVA_CTRL_REQUEST, txReqSel);
+    }
+
+    if (rxReqSel != -1) {
+        MXC_SETFIELD(dma->ch[rxChannel].ctrl, MXC_F_DMA_REVA_CTRL_REQUEST, rxReqSel);
+    }
+
+    return E_NO_ERROR;
+}
+
 /* ************************************************************************* */
 /* Low-level functions                                                       */
 /* ************************************************************************* */
@@ -420,11 +629,9 @@ int MXC_I2C_RevA_ReadRXFIFO(mxc_i2c_reva_regs_t *i2c, volatile unsigned char *by
 }
 
 int MXC_I2C_RevA_ReadRXFIFODMA(mxc_i2c_reva_regs_t *i2c, unsigned char *bytes, unsigned int len,
-                               mxc_i2c_reva_dma_complete_cb_t callback, mxc_dma_config_t config,
                                mxc_dma_regs_t *dma)
 {
     uint8_t i2cNum;
-    uint8_t channel;
     mxc_dma_srcdst_t srcdst;
 
     if ((i2c == NULL) || (bytes == NULL)) {
@@ -433,37 +640,17 @@ int MXC_I2C_RevA_ReadRXFIFODMA(mxc_i2c_reva_regs_t *i2c, unsigned char *bytes, u
 
     i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
 
-#if TARGET_NUM == 32665
-    channel = MXC_DMA_AcquireChannel(dma);
-#else
-    channel = MXC_DMA_AcquireChannel();
-#endif
-
-    config.ch = channel;
-
-    config.srcwd = MXC_DMA_WIDTH_BYTE;
-    config.dstwd = MXC_DMA_WIDTH_BYTE;
-
-    config.srcinc_en = 0;
-    config.dstinc_en = 1;
+    if (states[i2cNum].channelRx == E_NO_DEVICE) {
+        return E_BAD_STATE;
+    }
 
-    srcdst.ch = channel;
+    srcdst.ch = states[i2cNum].channelRx;
     srcdst.dest = bytes;
     srcdst.len = len;
 
-    states[i2cNum].channelRx = channel;
-    MXC_DMA_ConfigChannel(config, srcdst);
+    MXC_DMA_SetSrcDst(srcdst);
 
-    if (states[i2cNum].master) {
-        MXC_DMA_SetCallback(channel, MXC_I2C_RevA_DMACallback);
-    } else {
-        MXC_DMA_SetCallback(channel, NULL);
-    }
-
-    MXC_DMA_EnableInt(channel);
-    MXC_DMA_Start(channel);
-    //MXC_DMA->ch[channel].cfg |= MXC_F_DMA_CFG_CTZIEN;
-    MXC_DMA_SetChannelInterruptEn(channel, 0, 1);
+    MXC_DMA_Start(states[i2cNum].channelRx);
     i2c->dma |= MXC_F_I2C_REVA_DMA_RX_EN;
 
     return E_NO_ERROR;
@@ -495,11 +682,9 @@ int MXC_I2C_RevA_WriteTXFIFO(mxc_i2c_reva_regs_t *i2c, volatile unsigned char *b
 }
 
 int MXC_I2C_RevA_WriteTXFIFODMA(mxc_i2c_reva_regs_t *i2c, unsigned char *bytes, unsigned int len,
-                                mxc_i2c_reva_dma_complete_cb_t callback, mxc_dma_config_t config,
                                 mxc_dma_regs_t *dma)
 {
-    uint8_t i2cNum;
-    uint8_t channel;
+    int8_t i2cNum;
     mxc_dma_srcdst_t srcdst;
 
     if ((i2c == NULL) || (bytes == NULL)) {
@@ -510,37 +695,17 @@ int MXC_I2C_RevA_WriteTXFIFODMA(mxc_i2c_reva_regs_t *i2c, unsigned char *bytes,
 
     i2c->mstctrl |= MXC_F_I2C_REVA_MSTCTRL_START;
 
-#if TARGET_NUM == 32665
-    channel = MXC_DMA_AcquireChannel(dma);
-#else
-    channel = MXC_DMA_AcquireChannel();
-#endif
-
-    config.ch = channel;
-
-    config.srcwd = MXC_DMA_WIDTH_BYTE;
-    config.dstwd = MXC_DMA_WIDTH_BYTE;
-
-    config.srcinc_en = 1;
-    config.dstinc_en = 0;
+    if (states[i2cNum].channelTx == E_NO_DEVICE) {
+        return E_BAD_STATE;
+    }
 
-    srcdst.ch = channel;
+    srcdst.ch = states[i2cNum].channelTx;
     srcdst.source = bytes;
     srcdst.len = len;
 
-    states[i2cNum].channelTx = channel;
-    MXC_DMA_ConfigChannel(config, srcdst);
+    MXC_DMA_SetSrcDst(srcdst);
 
-    if (states[i2cNum].master) {
-        MXC_DMA_SetCallback(channel, MXC_I2C_RevA_DMACallback);
-    } else {
-        MXC_DMA_SetCallback(channel, NULL);
-    }
-
-    MXC_DMA_EnableInt(channel);
-    MXC_DMA_Start(channel);
-    // MXC_DMA->ch[channel].cfg |= MXC_F_DMA_CFG_CTZIEN;
-    MXC_DMA_SetChannelInterruptEn(channel, 0, 1);
+    MXC_DMA_Start(states[i2cNum].channelTx);
     i2c->dma |= MXC_F_I2C_REVA_DMA_TX_EN;
 
     return E_NO_ERROR;
@@ -898,7 +1063,8 @@ int MXC_I2C_RevA_MasterTransactionAsync(mxc_i2c_reva_req_t *req)
 
 int MXC_I2C_RevA_MasterTransactionDMA(mxc_i2c_reva_req_t *req, mxc_dma_regs_t *dma)
 {
-    int i2cNum;
+    int error;
+    int8_t i2cNum;
 
     mxc_i2c_reva_regs_t *i2c = req->i2c; // Save off pointer for faster access
     i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
@@ -928,15 +1094,21 @@ int MXC_I2C_RevA_MasterTransactionDMA(mxc_i2c_reva_req_t *req, mxc_dma_regs_t *d
     MXC_I2C_SetRXThreshold((mxc_i2c_regs_t *)i2c, 1);
 
     states[i2cNum].req = req;
+    states[i2cNum].writeDone = 0;
+    states[i2cNum].readDone = 0;
+
+    // If MXC_I2C_DMA_Init(...) was not already called, then configure both DMA TX/RXchannels by default.
+    if (states[i2cNum].dma_initialized == false) {
+        error = MXC_I2C_DMA_Init((mxc_i2c_regs_t *)i2c, (mxc_dma_regs_t *)dma, true, true);
+        if (error != E_NO_ERROR) {
+            return error;
+        }
+    }
 
-    states[i2cNum].channelTx = 0xFF;
-    states[i2cNum].channelRx = 0xFF;
-
-#if TARGET_NUM == 32665
-    MXC_DMA_Init(dma);
-#else
-    MXC_DMA_Init();
-#endif
+    error = MXC_I2C_DMA_SetRequestSelect((mxc_i2c_regs_t *)i2c, req->tx_buf, req->rx_buf);
+    if (error != E_NO_ERROR) {
+        return error;
+    }
 
     //tx
     if ((req->tx_buf != NULL) && !(states[i2cNum].writeDone)) {
@@ -953,7 +1125,7 @@ int MXC_I2C_RevA_MasterTransactionDMA(mxc_i2c_reva_req_t *req, mxc_dma_regs_t *d
 
     if (req->rx_buf != NULL) {
         while (states[i2cNum].writeDone != 1) {}
-        //Ensure DMA transmit has finished before attempting to receive
+        //Ensure DMA transmission has finished before attempting to receive
 
         if ((states[i2cNum].writeDone) && (!states[i2cNum].readDone)) {
             if (req->rx_len > MXC_I2C_REVA_MAX_FIFO_TRANSACTION) {
@@ -998,9 +1170,6 @@ void MXC_I2C_RevA_DMACallback(int ch, int error)
                     (temp_req->i2c)->mstctrl |= MXC_F_I2C_REVA_MSTCTRL_STOP;
                 }
 
-                MXC_DMA_ReleaseChannel(states[i].channelRx);
-                MXC_DMA_ReleaseChannel(states[i].channelTx);
-
                 // Callback if not NULL
                 if (temp_req->callback != NULL) {
                     temp_req->callback(temp_req, E_NO_ERROR);
@@ -1018,9 +1187,6 @@ void MXC_I2C_RevA_DMACallback(int ch, int error)
                     (temp_req->i2c)->mstctrl |= MXC_F_I2C_REVA_MSTCTRL_STOP;
                 }
 
-                MXC_DMA_ReleaseChannel(states[i].channelRx);
-                MXC_DMA_ReleaseChannel(states[i].channelTx);
-
                 // Callback if not NULL
                 if (temp_req->callback != NULL) {
                     temp_req->callback(temp_req, E_NO_ERROR);
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_reva.h b/Libraries/PeriphDrivers/Source/I2C/i2c_reva.h
index 74080f4bc3..1952bbbbcf 100644
--- a/Libraries/PeriphDrivers/Source/I2C/i2c_reva.h
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_reva.h
@@ -45,6 +45,7 @@
 #include "i2c_regs.h"
 #include "i2c_reva_regs.h"
 #include "dma.h"
+#include "dma_reva_regs.h"
 
 /* **** Definitions **** */
 #define MXC_I2C_REVA_MAX_ADDR_WIDTH 0x7F
@@ -106,6 +107,12 @@ unsigned int MXC_I2C_RevA_GetFrequency(mxc_i2c_reva_regs_t *i2c);
 int MXC_I2C_RevA_ReadyForSleep(mxc_i2c_reva_regs_t *i2c);
 int MXC_I2C_RevA_SetClockStretching(mxc_i2c_reva_regs_t *i2c, int enable);
 int MXC_I2C_RevA_GetClockStretching(mxc_i2c_reva_regs_t *i2c);
+int MXC_I2C_RevA_DMA_Init(mxc_i2c_reva_regs_t *i2c, mxc_dma_reva_regs_t *dma, bool use_dma_tx,
+                          bool use_dma_rx);
+int MXC_I2C_RevA_DMA_GetTXChannel(mxc_i2c_reva_regs_t *i2c);
+int MXC_I2C_RevA_DMA_GetRXChannel(mxc_i2c_reva_regs_t *i2c);
+int MXC_I2C_RevA_DMA_SetRequestSelect(mxc_i2c_reva_regs_t *i2c, mxc_dma_reva_regs_t *dma,
+                                      uint32_t txReqSel, uint32_t rxReqSel);
 
 /* ************************************************************************* */
 /* Low-level functions                                                       */
@@ -121,13 +128,11 @@ int MXC_I2C_RevA_Read(mxc_i2c_reva_regs_t *i2c, unsigned char *bytes, unsigned i
 int MXC_I2C_RevA_ReadRXFIFO(mxc_i2c_reva_regs_t *i2c, volatile unsigned char *bytes,
                             unsigned int len);
 int MXC_I2C_RevA_ReadRXFIFODMA(mxc_i2c_reva_regs_t *i2c, unsigned char *bytes, unsigned int len,
-                               mxc_i2c_reva_dma_complete_cb_t callback, mxc_dma_config_t config,
                                mxc_dma_regs_t *dma);
 int MXC_I2C_RevA_GetRXFIFOAvailable(mxc_i2c_reva_regs_t *i2c);
 int MXC_I2C_RevA_WriteTXFIFO(mxc_i2c_reva_regs_t *i2c, volatile unsigned char *bytes,
                              unsigned int len);
 int MXC_I2C_RevA_WriteTXFIFODMA(mxc_i2c_reva_regs_t *i2c, unsigned char *bytes, unsigned int len,
-                                mxc_i2c_reva_dma_complete_cb_t callback, mxc_dma_config_t config,
                                 mxc_dma_regs_t *dma);
 int MXC_I2C_RevA_GetTXFIFOAvailable(mxc_i2c_reva_regs_t *i2c);
 void MXC_I2C_RevA_ClearRXFIFO(mxc_i2c_reva_regs_t *i2c);
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_revb.c b/Libraries/PeriphDrivers/Source/I2C/i2c_revb.c
new file mode 100644
index 0000000000..ca8acc6165
--- /dev/null
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_revb.c
@@ -0,0 +1,456 @@
+/******************************************************************************
+ * Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *
+ ******************************************************************************/
+
+#include <stdio.h>
+#include <stddef.h>
+#include <stdint.h>
+#include "mxc_errors.h"
+#include "mxc_delay.h"
+#include "mxc_assert.h"
+#include "mxc_lock.h"
+#include "mxc_sys.h"
+#include "i2c_revb.h"
+#include "i2c_reva.h"
+
+/* **** Definitions **** */
+
+/* **** Variable Declaration **** */
+
+// Saves the state of the non-blocking requests
+typedef struct {
+    mxc_i2c_revb_req_t *req;
+    int master; // 1 for Master, 0 for slave
+    int channelTx; // DMA channel for TX transaction
+    int channelRx; // DMA channel for RX transaction
+    int writeDone; // Write done flag
+    int readDone; // Flag done flag
+} mxc_i2c_revb_req_state_t;
+
+/* ************************************************************************* */
+/* Control/Configuration functions                                           */
+/* ************************************************************************* */
+
+int MXC_I2C_RevB_Init(mxc_i2c_revb_regs_t *i2c, int masterMode, unsigned int slaveAddr)
+{
+    return MXC_I2C_RevA_Init((mxc_i2c_reva_regs_t *)i2c, masterMode, slaveAddr);
+}
+
+int MXC_I2C_RevB_SetSlaveAddr(mxc_i2c_revb_regs_t *i2c, unsigned int slaveAddr, int idx)
+{
+    if (i2c == NULL || slaveAddr > MXC_F_I2C_REVB_SLV_ADDR_SLA || idx != 0) {
+        return E_BAD_PARAM;
+    }
+
+    i2c->slv_addr = 0;
+
+    if (slaveAddr > MXC_I2C_REVB_MAX_ADDR_WIDTH) {
+        i2c->slv_addr |= MXC_S_I2C_REVB_SLV_ADDR_EA_10BIT_ADDR;
+    }
+
+    i2c->slv_addr |= slaveAddr & MXC_F_I2C_REVB_SLV_ADDR_SLA;
+
+    return E_NO_ERROR;
+}
+
+int MXC_I2C_RevB_Shutdown(mxc_i2c_revb_regs_t *i2c)
+{
+    return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_RevB_SetFrequency(mxc_i2c_revb_regs_t *i2c, unsigned int hz)
+{
+    return MXC_I2C_RevA_SetFrequency((mxc_i2c_reva_regs_t *)i2c, hz);
+}
+
+unsigned int MXC_I2C_RevB_GetFrequency(mxc_i2c_revb_regs_t *i2c)
+{
+    return MXC_I2C_RevA_GetFrequency((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_RevB_ReadyForSleep(mxc_i2c_revb_regs_t *i2c)
+{
+    return MXC_I2C_RevA_ReadyForSleep((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_RevB_SetClockStretching(mxc_i2c_revb_regs_t *i2c, int enable)
+{
+    return MXC_I2C_RevA_SetClockStretching((mxc_i2c_reva_regs_t *)i2c, enable);
+}
+
+int MXC_I2C_RevB_GetClockStretching(mxc_i2c_revb_regs_t *i2c)
+{
+    return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
+}
+
+/* ************************************************************************* */
+/* Low-level functions                                                       */
+/* ************************************************************************* */
+
+int MXC_I2C_RevB_Start(mxc_i2c_revb_regs_t *i2c)
+{
+    return MXC_I2C_RevA_Start((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_RevB_Stop(mxc_i2c_revb_regs_t *i2c)
+{
+    return MXC_I2C_RevA_Stop((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_RevB_WriteByte(mxc_i2c_revb_regs_t *i2c, unsigned char byte)
+{
+    return MXC_I2C_RevA_WriteByte((mxc_i2c_reva_regs_t *)i2c, byte);
+}
+
+int MXC_I2C_RevB_ReadByte(mxc_i2c_revb_regs_t *i2c, unsigned char *byte, int ack)
+{
+    return MXC_I2C_RevA_ReadByte((mxc_i2c_reva_regs_t *)i2c, byte, ack);
+}
+
+int MXC_I2C_RevB_ReadByteInteractive(mxc_i2c_revb_regs_t *i2c, unsigned char *byte,
+                                     mxc_i2c_revb_getAck_t getAck)
+{
+    return MXC_I2C_RevA_ReadByteInteractive((mxc_i2c_reva_regs_t *)i2c, byte,
+                                            (mxc_i2c_reva_getAck_t)getAck);
+}
+
+int MXC_I2C_RevB_Write(mxc_i2c_revb_regs_t *i2c, unsigned char *bytes, unsigned int *len)
+{
+    return MXC_I2C_RevA_Write((mxc_i2c_reva_regs_t *)i2c, bytes, len);
+}
+
+int MXC_I2C_RevB_Read(mxc_i2c_revb_regs_t *i2c, unsigned char *bytes, unsigned int *len, int ack)
+{
+    return MXC_I2C_RevA_Read((mxc_i2c_reva_regs_t *)i2c, bytes, len, ack);
+}
+
+int MXC_I2C_RevB_ReadRXFIFO(mxc_i2c_revb_regs_t *i2c, volatile unsigned char *bytes,
+                            unsigned int len)
+{
+    return MXC_I2C_RevA_ReadRXFIFO((mxc_i2c_reva_regs_t *)i2c, bytes, len);
+}
+
+int MXC_I2C_RevB_ReadRXFIFODMA(mxc_i2c_revb_regs_t *i2c, unsigned char *bytes, unsigned int len,
+                               mxc_dma_regs_t *dma)
+{
+    return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, dma);
+}
+
+int MXC_I2C_RevB_GetRXFIFOAvailable(mxc_i2c_revb_regs_t *i2c)
+{
+    return MXC_I2C_RevA_GetRXFIFOAvailable((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_RevB_WriteTXFIFO(mxc_i2c_revb_regs_t *i2c, volatile unsigned char *bytes,
+                             unsigned int len)
+{
+    return MXC_I2C_RevA_WriteTXFIFO((mxc_i2c_reva_regs_t *)i2c, bytes, len);
+}
+
+int MXC_I2C_RevB_WriteTXFIFODMA(mxc_i2c_revb_regs_t *i2c, unsigned char *bytes, unsigned int len,
+                                mxc_dma_regs_t *dma)
+{
+    return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, dma);
+}
+
+int MXC_I2C_RevB_GetTXFIFOAvailable(mxc_i2c_revb_regs_t *i2c)
+{
+    return MXC_I2C_RevA_GetTXFIFOAvailable((mxc_i2c_reva_regs_t *)i2c);
+}
+
+void MXC_I2C_RevB_ClearRXFIFO(mxc_i2c_revb_regs_t *i2c)
+{
+    MXC_I2C_RevA_ClearRXFIFO((mxc_i2c_reva_regs_t *)i2c);
+}
+
+void MXC_I2C_RevB_ClearTXFIFO(mxc_i2c_revb_regs_t *i2c)
+{
+    MXC_I2C_RevA_ClearTXFIFO((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_RevB_GetFlags(mxc_i2c_revb_regs_t *i2c, unsigned int *flags0, unsigned int *flags1)
+{
+    return MXC_I2C_RevA_GetFlags((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
+}
+
+void MXC_I2C_RevB_ClearFlags(mxc_i2c_revb_regs_t *i2c, unsigned int flags0, unsigned int flags1)
+{
+    MXC_I2C_RevA_ClearFlags((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
+}
+
+void MXC_I2C_RevB_EnableInt(mxc_i2c_revb_regs_t *i2c, unsigned int flags0, unsigned int flags1)
+{
+    MXC_I2C_RevA_EnableInt((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
+}
+
+void MXC_I2C_RevB_DisableInt(mxc_i2c_revb_regs_t *i2c, unsigned int flags0, unsigned int flags1)
+{
+    MXC_I2C_RevA_DisableInt((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
+}
+
+void MXC_I2C_RevB_EnablePreload(mxc_i2c_revb_regs_t *i2c)
+{
+    MXC_I2C_RevA_EnablePreload((mxc_i2c_reva_regs_t *)i2c);
+}
+
+void MXC_I2C_RevB_DisablePreload(mxc_i2c_revb_regs_t *i2c)
+{
+    MXC_I2C_RevA_DisablePreload((mxc_i2c_reva_regs_t *)i2c);
+}
+
+void MXC_I2C_RevB_EnableGeneralCall(mxc_i2c_revb_regs_t *i2c)
+{
+    i2c->ctrl0 |= MXC_F_I2C_REVB_CTRL0_GCEN;
+}
+
+void MXC_I2C_RevB_DisableGeneralCall(mxc_i2c_revb_regs_t *i2c)
+{
+    i2c->ctrl0 &= ~MXC_F_I2C_REVB_CTRL0_GCEN;
+}
+
+void MXC_I2C_RevB_SetTimeout(mxc_i2c_revb_regs_t *i2c, unsigned int timeout)
+{
+    MXC_I2C_RevA_SetTimeout((mxc_i2c_reva_regs_t *)i2c, timeout);
+}
+
+unsigned int MXC_I2C_RevB_GetTimeout(mxc_i2c_revb_regs_t *i2c)
+{
+    return MXC_I2C_RevA_GetTimeout((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_RevB_Recover(mxc_i2c_revb_regs_t *i2c, unsigned int retries)
+{
+    return MXC_I2C_RevA_Recover((mxc_i2c_reva_regs_t *)i2c, retries);
+}
+
+/* ************************************************************************* */
+/* Transaction level functions                                               */
+/* ************************************************************************* */
+
+int MXC_I2C_RevB_MasterTransaction(mxc_i2c_revb_req_t *req)
+{
+    return MXC_I2C_RevA_MasterTransaction((mxc_i2c_reva_req_t *)req);
+}
+
+int MXC_I2C_RevB_MasterTransactionAsync(mxc_i2c_revb_req_t *req)
+{
+    return MXC_I2C_RevA_MasterTransactionAsync((mxc_i2c_reva_req_t *)req);
+}
+
+int MXC_I2C_RevB_MasterTransactionDMA(mxc_i2c_revb_req_t *req, mxc_dma_regs_t *dma)
+{
+    return MXC_I2C_RevA_MasterTransactionDMA((mxc_i2c_reva_req_t *)req, dma);
+}
+
+int MXC_I2C_RevB_SlaveTransaction(mxc_i2c_revb_regs_t *i2c, mxc_i2c_revb_slave_handler_t callback,
+                                  uint32_t interruptCheck)
+{
+    return MXC_I2C_RevA_SlaveTransaction((mxc_i2c_reva_regs_t *)i2c,
+                                         (mxc_i2c_reva_slave_handler_t)callback, interruptCheck);
+}
+
+int MXC_I2C_RevB_SlaveTransactionAsync(mxc_i2c_revb_regs_t *i2c,
+                                       mxc_i2c_revb_slave_handler_t callback,
+                                       uint32_t interruptCheck)
+{
+    return MXC_I2C_RevA_SlaveTransactionAsync(
+        (mxc_i2c_reva_regs_t *)i2c, (mxc_i2c_reva_slave_handler_t)callback, interruptCheck);
+}
+
+int MXC_I2C_RevB_SetRXThreshold(mxc_i2c_revb_regs_t *i2c, unsigned int numBytes)
+{
+    return MXC_I2C_RevA_SetRXThreshold((mxc_i2c_reva_regs_t *)i2c, numBytes);
+}
+
+unsigned int MXC_I2C_RevB_GetRXThreshold(mxc_i2c_revb_regs_t *i2c)
+{
+    return MXC_I2C_RevA_GetRXThreshold((mxc_i2c_reva_regs_t *)i2c);
+}
+
+int MXC_I2C_RevB_SetTXThreshold(mxc_i2c_revb_regs_t *i2c, unsigned int numBytes)
+{
+    return MXC_I2C_RevA_SetTXThreshold((mxc_i2c_reva_regs_t *)i2c, numBytes);
+}
+
+unsigned int MXC_I2C_RevB_GetTXThreshold(mxc_i2c_revb_regs_t *i2c)
+{
+    return MXC_I2C_RevA_GetTXThreshold((mxc_i2c_reva_regs_t *)i2c);
+}
+
+void MXC_I2C_RevB_AsyncCallback(mxc_i2c_revb_regs_t *i2c, int retVal)
+{
+    MXC_I2C_RevA_AsyncCallback((mxc_i2c_reva_regs_t *)i2c, retVal);
+}
+
+void MXC_I2C_RevB_AsyncStop(mxc_i2c_revb_regs_t *i2c)
+{
+    MXC_I2C_RevA_AsyncStop((mxc_i2c_reva_regs_t *)i2c);
+}
+
+void MXC_I2C_RevB_AbortAsync(mxc_i2c_revb_regs_t *i2c)
+{
+    MXC_I2C_RevA_AbortAsync((mxc_i2c_reva_regs_t *)i2c);
+}
+
+void MXC_I2C_RevB_MasterAsyncHandler(int i2cNum)
+{
+    MXC_I2C_RevA_MasterAsyncHandler(i2cNum);
+}
+
+unsigned int MXC_I2C_RevB_SlaveAsyncHandler(mxc_i2c_revb_regs_t *i2c,
+                                            mxc_i2c_revb_slave_handler_t callback,
+                                            unsigned int interruptEnables, int *retVal)
+{
+    *retVal = E_NO_ERROR;
+
+    // Callback called on
+    // Slave Address Match (distinguish read/write)
+    // RX Threshold
+    // TX Threshold
+    // Done
+    // TX Underflow
+    // RX Overflow
+    //
+    // Event Codes
+    // I2C_EVT_MASTER_WR
+    // I2C_EVT_MASTER_RD
+    // I2C_EVT_RX_THRESH
+    // I2C_EVT_TX_THRESH
+    // I2C_EVT_TRANS_COMP
+    // I2C_EVT_UNDERFLOW
+    // I2C_EVT_OVERFLOW
+    if (!(interruptEnables & (MXC_F_I2C_REVB_INT_FL0_AMI))) {
+        // The STOPERR/STARTERR interrupt that's enabled here could fire before we are addressed
+        // (fires anytime a stop/start is detected out of sequence).
+        if (i2c->int_fl0 & MXC_I2C_REVB_ERROR) {
+            *retVal = E_COMM_ERR;
+            callback(i2c, MXC_I2C_REVB_EVT_TRANS_COMP, retVal);
+            MXC_I2C_ClearFlags((mxc_i2c_regs_t *)i2c, MXC_I2C_REVB_INTFL0_MASK,
+                               MXC_I2C_REVB_INTFL1_MASK); // Clear all I2C Interrupts
+            MXC_I2C_ClearTXFIFO((mxc_i2c_regs_t *)i2c);
+            MXC_I2C_ClearRXFIFO((mxc_i2c_regs_t *)i2c);
+            interruptEnables = 0;
+            AsyncRequests[MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c)] = NULL;
+        }
+
+        if (interruptEnables & (MXC_F_I2C_REVB_INT_FL0_RXTHI | MXC_F_I2C_REVB_INT_FL1_RXOFI)) {
+            if (i2c->int_fl0 & MXC_F_I2C_REVB_INT_FL0_RXTHI) {
+                callback(i2c, MXC_I2C_REVB_EVT_RX_THRESH, NULL);
+                i2c->int_fl0 = MXC_F_I2C_REVB_INT_FL0_RXTHI;
+            }
+
+            if (i2c->int_fl1 & MXC_F_I2C_REVB_INT_FL1_RXOFI) {
+                callback(i2c, MXC_I2C_REVB_EVT_OVERFLOW, NULL);
+                i2c->int_fl1 = MXC_F_I2C_REVB_INT_FL1_RXOFI;
+            }
+        }
+
+        if (interruptEnables & (MXC_F_I2C_REVB_INT_FL0_TXTHI | MXC_F_I2C_REVB_INT_FL1_TXUFI |
+                                MXC_F_I2C_REVB_INT_FL0_TXLOI)) {
+            if (i2c->int_fl0 & MXC_F_I2C_REVB_INT_FL0_TXTHI) {
+                callback(i2c, MXC_I2C_REVB_EVT_TX_THRESH, NULL);
+                i2c->int_fl0 = MXC_F_I2C_REVB_INT_FL0_TXTHI;
+            }
+
+            if (i2c->int_fl1 & MXC_F_I2C_REVB_INT_FL1_TXUFI) {
+                callback(i2c, MXC_I2C_REVB_EVT_UNDERFLOW, NULL);
+                i2c->int_fl1 = MXC_F_I2C_REVB_INT_FL1_TXUFI;
+            }
+
+            if (i2c->int_fl0 & MXC_F_I2C_REVB_INT_FL0_TXLOI) {
+                *retVal = E_NO_ERROR;
+                callback(i2c, MXC_I2C_REVB_EVT_TRANS_COMP, retVal);
+                i2c->int_fl0 = MXC_F_I2C_REVB_INT_FL0_TXLOI;
+                interruptEnables = 0;
+                AsyncRequests[MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c)] = NULL;
+            }
+        }
+
+        if (i2c->int_fl0 & MXC_F_I2C_REVB_INT_FL0_STOPI) {
+            *retVal = E_NO_ERROR;
+            callback(i2c, MXC_I2C_REVB_EVT_TRANS_COMP, retVal);
+            i2c->int_fl0 = MXC_F_I2C_REVB_INT_FL0_STOPI;
+            interruptEnables = 0;
+            AsyncRequests[MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c)] = NULL;
+        }
+    }
+
+    if (i2c->int_fl0 & MXC_F_I2C_REVB_INT_FL0_AMI) {
+        if (i2c->ctrl0 & MXC_F_I2C_REVB_CTRL0_READ) {
+            callback(i2c, MXC_I2C_REVB_EVT_MASTER_RD, NULL);
+            i2c->int_fl0 = MXC_F_I2C_REVB_INT_FL0_AMI;
+            i2c->int_fl0 = MXC_F_I2C_REVB_INT_FL0_AMI;
+            i2c->int_fl0 = MXC_F_I2C_REVB_INT_FL0_TXLOI;
+            interruptEnables = MXC_F_I2C_REVB_INT_FL0_TXTHI | MXC_F_I2C_REVB_INT_FL1_TXUFI |
+                               MXC_F_I2C_REVB_INT_FL0_TXLOI | MXC_I2C_REVB_ERROR;
+        } else {
+            callback(i2c, MXC_I2C_REVB_EVT_MASTER_WR, NULL);
+            i2c->int_fl0 = MXC_F_I2C_REVB_INT_FL0_AMI;
+            i2c->int_fl0 = MXC_F_I2C_REVB_INT_FL0_AMI;
+            interruptEnables = MXC_F_I2C_REVB_INT_FL0_RXTHI | MXC_F_I2C_REVB_INT_FL1_RXOFI |
+                               MXC_I2C_REVB_ERROR;
+        }
+    } else if (i2c->int_fl0 & MXC_I2C_REVB_ERROR) {
+        *retVal = E_COMM_ERR;
+        callback(i2c, MXC_I2C_REVB_EVT_TRANS_COMP, retVal);
+        MXC_I2C_RevB_ClearFlags(i2c, MXC_I2C_REVB_INTFL0_MASK,
+                                MXC_I2C_REVB_INTFL1_MASK); // clear all i2c interrupts
+        MXC_I2C_RevB_ClearTXFIFO(i2c);
+        MXC_I2C_RevB_ClearRXFIFO(i2c);
+        interruptEnables = 0;
+        AsyncRequests[MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c)] = NULL;
+    }
+
+    return interruptEnables;
+}
+
+void MXC_I2C_RevB_AsyncHandler(mxc_i2c_revb_regs_t *i2c, uint32_t interruptCheck)
+{
+    int i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
+    int slaveRetVal;
+
+    if (i2cNum < 0) {
+        return;
+    }
+
+    if (i2c->ctrl0 & MXC_F_I2C_REVB_CTRL0_MST) {
+        MXC_I2C_RevB_MasterAsyncHandler(i2cNum);
+    } else {
+        mxc_i2c_revb_slave_handler_t callback = (mxc_i2c_revb_slave_handler_t)AsyncRequests[i2cNum];
+        i2c->int_en0 = MXC_I2C_RevB_SlaveAsyncHandler(i2c, callback, i2c->int_en0, &slaveRetVal);
+    }
+}
+
+void MXC_I2C_RevB_DMACallback(int ch, int error)
+{
+    MXC_I2C_RevA_DMACallback(ch, error);
+}
diff --git a/Libraries/PeriphDrivers/Source/I2C/i2c_revb.h b/Libraries/PeriphDrivers/Source/I2C/i2c_revb.h
new file mode 100644
index 0000000000..2394d8f094
--- /dev/null
+++ b/Libraries/PeriphDrivers/Source/I2C/i2c_revb.h
@@ -0,0 +1,168 @@
+/**
+ * @file    i2c_revb.h
+ * @brief   Inter-integrated circuit (I2C_REVB) communications interface driver.
+ */
+
+/******************************************************************************
+ * Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *
+ ******************************************************************************/
+
+#ifndef LIBRARIES_PERIPHDRIVERS_SOURCE_I2C_I2C_REVB_H_
+#define LIBRARIES_PERIPHDRIVERS_SOURCE_I2C_I2C_REVB_H_
+
+#include <stdint.h>
+#include "i2c.h"
+#include "i2c_reva.h"
+#include "i2c_revb_regs.h"
+#include "mxc_sys.h"
+
+/* **** Definitions **** */
+#define MXC_I2C_REVB_MAX_ADDR_WIDTH 0x7F
+#define MXC_I2C_REVB_STD_MODE 100000
+#define MXC_I2C_REVB_FAST_SPEED 400000
+#define MXC_I2C_REVB_FASTPLUS_SPEED 1000000
+#define MXC_I2C_REVB_HS_MODE 3400000
+
+#define MXC_I2C_REVB_INTFL0_MASK 0x00FFFFFF
+#define MXC_I2C_REVB_INTFL1_MASK 0x00000007
+
+#define MXC_I2C_REVB_MAX_FIFO_TRANSACTION 256
+
+#define MXC_I2C_REVB_ERROR                                            \
+    (MXC_F_I2C_REVB_INT_FL0_ARBERI | MXC_F_I2C_REVB_INT_FL0_TOERI |   \
+     MXC_F_I2C_REVB_INT_FL0_ADRERI | MXC_F_I2C_REVB_INT_FL0_DATAERI | \
+     MXC_F_I2C_REVB_INT_FL0_DNRERI | MXC_F_I2C_REVB_INT_FL0_STRTERI | \
+     MXC_F_I2C_REVB_INT_FL0_STOPERI)
+
+typedef struct _i2c_revb_req_t mxc_i2c_revb_req_t;
+typedef int (*mxc_i2c_revb_getAck_t)(mxc_i2c_revb_regs_t *i2c, unsigned char byte);
+typedef void (*mxc_i2c_revb_complete_cb_t)(mxc_i2c_revb_req_t *req, int result);
+typedef void (*mxc_i2c_revb_dma_complete_cb_t)(int len, int result);
+struct _i2c_revb_req_t {
+    mxc_i2c_revb_regs_t *i2c;
+    unsigned int addr;
+    unsigned char *tx_buf;
+    unsigned int tx_len;
+    unsigned char *rx_buf;
+    unsigned int rx_len;
+    int restart;
+    mxc_i2c_revb_complete_cb_t callback;
+};
+typedef enum {
+    MXC_I2C_REVB_EVT_MASTER_WR,
+    MXC_I2C_REVB_EVT_MASTER_RD,
+    MXC_I2C_REVB_EVT_RX_THRESH,
+    MXC_I2C_REVB_EVT_TX_THRESH,
+    MXC_I2C_REVB_EVT_TRANS_COMP,
+    MXC_I2C_REVB_EVT_UNDERFLOW,
+    MXC_I2C_REVB_EVT_OVERFLOW,
+} mxc_i2c_revb_slave_event_t;
+typedef int (*mxc_i2c_revb_slave_handler_t)(mxc_i2c_revb_regs_t *i2c,
+                                            mxc_i2c_revb_slave_event_t event, void *data);
+/* **** Variable Declaration **** */
+
+/* **** Function Prototypes **** */
+
+/* ************************************************************************* */
+/* Control/Configuration functions                                           */
+/* ************************************************************************* */
+int MXC_I2C_RevB_Init(mxc_i2c_revb_regs_t *i2c, int masterMode, unsigned int slaveAddr);
+
+int MXC_I2C_RevB_SetSlaveAddr(mxc_i2c_revb_regs_t *i2c, unsigned int slaveAddr, int idx);
+int MXC_I2C_RevB_Shutdown(mxc_i2c_revb_regs_t *i2c);
+int MXC_I2C_RevB_SetFrequency(mxc_i2c_revb_regs_t *i2c, unsigned int hz);
+unsigned int MXC_I2C_RevB_GetFrequency(mxc_i2c_revb_regs_t *i2c);
+int MXC_I2C_RevB_ReadyForSleep(mxc_i2c_revb_regs_t *i2c);
+int MXC_I2C_RevB_SetClockStretching(mxc_i2c_revb_regs_t *i2c, int enable);
+int MXC_I2C_RevB_GetClockStretching(mxc_i2c_revb_regs_t *i2c);
+
+/* ************************************************************************* */
+/* Low-level functions                                                       */
+/* ************************************************************************* */
+int MXC_I2C_RevB_Start(mxc_i2c_revb_regs_t *i2c);
+int MXC_I2C_RevB_Stop(mxc_i2c_revb_regs_t *i2c);
+int MXC_I2C_RevB_WriteByte(mxc_i2c_revb_regs_t *i2c, unsigned char byte);
+int MXC_I2C_RevB_ReadByte(mxc_i2c_revb_regs_t *i2c, unsigned char *byte, int ack);
+int MXC_I2C_RevB_ReadByteInteractive(mxc_i2c_revb_regs_t *i2c, unsigned char *byte,
+                                     mxc_i2c_revb_getAck_t getAck);
+int MXC_I2C_RevB_Write(mxc_i2c_revb_regs_t *i2c, unsigned char *bytes, unsigned int *len);
+int MXC_I2C_RevB_Read(mxc_i2c_revb_regs_t *i2c, unsigned char *bytes, unsigned int *len, int ack);
+int MXC_I2C_RevB_ReadRXFIFO(mxc_i2c_revb_regs_t *i2c, volatile unsigned char *bytes,
+                            unsigned int len);
+int MXC_I2C_RevB_ReadRXFIFODMA(mxc_i2c_revb_regs_t *i2c, unsigned char *bytes, unsigned int len,
+                               mxc_dma_regs_t *dma);
+int MXC_I2C_RevB_GetRXFIFOAvailable(mxc_i2c_revb_regs_t *i2c);
+int MXC_I2C_RevB_WriteTXFIFO(mxc_i2c_revb_regs_t *i2c, volatile unsigned char *bytes,
+                             unsigned int len);
+int MXC_I2C_RevB_WriteTXFIFODMA(mxc_i2c_revb_regs_t *i2c, unsigned char *bytes, unsigned int len,
+                                mxc_dma_regs_t *dma);
+int MXC_I2C_RevB_GetTXFIFOAvailable(mxc_i2c_revb_regs_t *i2c);
+void MXC_I2C_RevB_ClearRXFIFO(mxc_i2c_revb_regs_t *i2c);
+void MXC_I2C_RevB_ClearTXFIFO(mxc_i2c_revb_regs_t *i2c);
+int MXC_I2C_RevB_GetFlags(mxc_i2c_revb_regs_t *i2c, unsigned int *flags0, unsigned int *flags1);
+void MXC_I2C_RevB_ClearFlags(mxc_i2c_revb_regs_t *i2c, unsigned int flags0, unsigned int flags1);
+void MXC_I2C_RevB_EnableInt(mxc_i2c_revb_regs_t *i2c, unsigned int flags0, unsigned int flags1);
+void MXC_I2C_RevB_DisableInt(mxc_i2c_revb_regs_t *i2c, unsigned int flags0, unsigned int flags1);
+void MXC_I2C_RevB_EnablePreload(mxc_i2c_revb_regs_t *i2c);
+void MXC_I2C_RevB_DisablePreload(mxc_i2c_revb_regs_t *i2c);
+void MXC_I2C_RevB_EnableGeneralCall(mxc_i2c_revb_regs_t *i2c);
+void MXC_I2C_RevB_DisableGeneralCall(mxc_i2c_revb_regs_t *i2c);
+void MXC_I2C_RevB_SetTimeout(mxc_i2c_revb_regs_t *i2c, unsigned int timeout);
+unsigned int MXC_I2C_RevB_GetTimeout(mxc_i2c_revb_regs_t *i2c);
+int MXC_I2C_RevB_Recover(mxc_i2c_revb_regs_t *i2c, unsigned int retries);
+
+/* ************************************************************************* */
+/* Transaction level functions                                               */
+/* ************************************************************************* */
+int MXC_I2C_RevB_MasterTransaction(mxc_i2c_revb_req_t *req);
+int MXC_I2C_RevB_MasterTransactionAsync(mxc_i2c_revb_req_t *req);
+int MXC_I2C_RevB_MasterTransactionDMA(mxc_i2c_revb_req_t *req, mxc_dma_regs_t *dma);
+int MXC_I2C_RevB_SlaveTransaction(mxc_i2c_revb_regs_t *i2c, mxc_i2c_revb_slave_handler_t callback,
+                                  uint32_t interruptCheck);
+int MXC_I2C_RevB_SlaveTransactionAsync(mxc_i2c_revb_regs_t *i2c,
+                                       mxc_i2c_revb_slave_handler_t callback,
+                                       uint32_t interruptCheck);
+int MXC_I2C_RevB_SetRXThreshold(mxc_i2c_revb_regs_t *i2c, unsigned int numBytes);
+unsigned int MXC_I2C_RevB_GetRXThreshold(mxc_i2c_revb_regs_t *i2c);
+int MXC_I2C_RevB_SetTXThreshold(mxc_i2c_revb_regs_t *i2c, unsigned int numBytes);
+unsigned int MXC_I2C_RevB_GetTXThreshold(mxc_i2c_revb_regs_t *i2c);
+void MXC_I2C_RevB_AsyncCallback(mxc_i2c_revb_regs_t *i2c, int retVal);
+void MXC_I2C_RevB_AsyncStop(mxc_i2c_revb_regs_t *i2c);
+void MXC_I2C_RevB_AbortAsync(mxc_i2c_revb_regs_t *i2c);
+void MXC_I2C_RevB_MasterAsyncHandler(int i2cNum);
+unsigned int MXC_I2C_RevB_SlaveAsyncHandler(mxc_i2c_revb_regs_t *i2c,
+                                            mxc_i2c_revb_slave_handler_t callback,
+                                            unsigned int interruptEnables, int *retVal);
+void MXC_I2C_RevB_AsyncHandler(mxc_i2c_revb_regs_t *i2c, uint32_t interruptCheck);
+void MXC_I2C_RevB_DMACallback(int ch, int error);
+
+#endif // LIBRARIES_PERIPHDRIVERS_SOURCE_I2C_I2C_REVB_H_
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_ai85.c b/Libraries/PeriphDrivers/Source/SYS/pins_ai85.c
index d04ab7b9b8..30bc07fb0b 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_ai85.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_ai85.c
@@ -1,6 +1,6 @@
 /**
- * @file mxc_pins.c
- * @brief      This file contains constant pin configurations for the peripherals.
+ * @file    mxc_pins.c
+ * @brief   This file contains constant pin configurations for the peripherals.
  */
 
 /******************************************************************************
@@ -42,170 +42,143 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
-const mxc_gpio_cfg_t gpio_cfg_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
-
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
+
+// clang-format off
+const mxc_gpio_cfg_t gpio_cfg_extclk = { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
+                                         MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0  };
+
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
 const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_2), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO0, (MXC_GPIO_PIN_26), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO1, (MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr0b = { MXC_GPIO0, (MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1b = { MXC_GPIO0, (MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2b = { MXC_GPIO0, (MXC_GPIO_PIN_27), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3b = { MXC_GPIO1, (MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr4 = { MXC_GPIO2, (MXC_GPIO_PIN_4), MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr5 = { MXC_GPIO2, (MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_i2s0 = {
-    MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_i2s0 = { MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_i2s0_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT2,
-                                              MXC_GPIO_PAD_NONE };
-
-const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                      MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_owmb = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO3, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
-
-const mxc_gpio_cfg_t gpio_cfg_pt0 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_pt1 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_pt2 = { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_pt3 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE };
-
-const mxc_gpio_cfg_t gpio_cfg_pcif_P0_BITS_0_7 = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 |
-     MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH
-};
-const mxc_gpio_cfg_t gpio_cfg_pcif_P0_BITS_8_9 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                                   MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                                   MXC_GPIO_VSSEL_VDDIOH };
-const mxc_gpio_cfg_t gpio_cfg_pcif_P1_BITS_10_11 = { MXC_GPIO1, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                                     MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                                     MXC_GPIO_VSSEL_VDDIOH };
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_owmb = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO3, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
+                                         MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_pt0 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
+                                      MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_pt1 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
+                                      MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_pt2 = { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
+                                      MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_pt3 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
+                                      MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_pcif_P0_BITS_0_7 = { MXC_GPIO0, (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 |
+                                                   MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
+                                                   MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_pcif_P0_BITS_8_9 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT2,
+                                                   MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_pcif_P1_BITS_10_11 = { MXC_GPIO1, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pcif_hsync = { MXC_GPIO1, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT1,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_pcif_vsync = { MXC_GPIO0, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_ALT2,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_pcif_xclk = { MXC_GPIO1, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT1,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 
 const mxc_gpio_cfg_t gpio_cfg_adc_ain0 = { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain1 = { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain2 = { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain3 = { MXC_GPIO2, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain4 = { MXC_GPIO2, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain5 = { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain6 = { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain7 = { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
-
-const mxc_gpio_cfg_t gpio_cfg_rv_jtag = {
-    MXC_GPIO1, MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3,
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-
-const mxc_gpio_cfg_t gpio_cfg_cmp0 = { MXC_GPIO2, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp1 = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp2 = { MXC_GPIO2, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
+
+const mxc_gpio_cfg_t gpio_cfg_rv_jtag = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                          MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_cmp0 = { MXC_GPIO2, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp1 = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE,  MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp2 = { MXC_GPIO2, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0,
-                                                (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_7),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_quad = {
-    MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-
-const mxc_gpio_cfg_t gpio_cfg_spi1_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_23),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_quad = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_quad = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi1_standard = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_quad = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts2 = { MXC_GPIO0, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_20, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_ai87.c b/Libraries/PeriphDrivers/Source/SYS/pins_ai87.c
index 8ae33b708b..fe7386e37b 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_ai87.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_ai87.c
@@ -42,186 +42,153 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
+
+// clang-format off
 const mxc_gpio_cfg_t gpio_cfg_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
-
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
 const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_2), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO0, (MXC_GPIO_PIN_26), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO1, (MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr0b = { MXC_GPIO0, (MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1b = { MXC_GPIO0, (MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2b = { MXC_GPIO0, (MXC_GPIO_PIN_27), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3b = { MXC_GPIO1, (MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr4 = { MXC_GPIO2, (MXC_GPIO_PIN_4), MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr5 = { MXC_GPIO2, (MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_i2s0 = {
-    MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_i2s0 = { MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_i2s0_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT2,
-                                              MXC_GPIO_PAD_NONE };
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                      MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_owmb = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_owmb = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO3, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_pt0 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt1 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt2 = { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt3 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE };
-
-const mxc_gpio_cfg_t gpio_cfg_pcif_P0_BITS_0_7 = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 |
-     MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH
-};
-
-const mxc_gpio_cfg_t gpio_cfg_pcif_P0_BITS_8_9 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                                   MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                                   MXC_GPIO_VSSEL_VDDIOH };
-const mxc_gpio_cfg_t gpio_cfg_pcif_P1_BITS_10_11 = { MXC_GPIO1, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                                     MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                                     MXC_GPIO_VSSEL_VDDIOH };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_pcif_P0_BITS_0_7 = { MXC_GPIO0, (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 |
+                                                   MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
+                                                   MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_pcif_P0_BITS_8_9 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT2,
+                                                   MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_pcif_P1_BITS_10_11 = { MXC_GPIO1, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_pcif_hsync = { MXC_GPIO1, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT1,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pcif_vsync = { MXC_GPIO0, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_ALT2,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pcif_xclk = { MXC_GPIO1, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT1,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_adc_ain0 = { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain1 = { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain2 = { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain3 = { MXC_GPIO2, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain4 = { MXC_GPIO2, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain5 = { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain6 = { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain7 = { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
-
-const mxc_gpio_cfg_t gpio_cfg_rv_jtag = {
-    MXC_GPIO1, MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3,
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-
-const mxc_gpio_cfg_t gpio_cfg_cmp0 = { MXC_GPIO2, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp1 = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp2 = { MXC_GPIO2, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_sdhc = { MXC_GPIO1,
-                                       (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 |
-                                        MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 |
-                                        MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_rv_jtag = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                          MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_cmp0 = { MXC_GPIO2, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp1 = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp2 = { MXC_GPIO2, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_sdhc = { MXC_GPIO1, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13 |
+                                       MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0,
-                                                (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_7),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_quad = {
-    MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-
-const mxc_gpio_cfg_t gpio_cfg_spi1_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_23),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_quad = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_quad = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi1_standard = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
+                                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_quad = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts2 = { MXC_GPIO0, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_20, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_es17.c b/Libraries/PeriphDrivers/Source/SYS/pins_es17.c
index beb9d62572..5f79e9712e 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_es17.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_es17.c
@@ -42,97 +42,78 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
 
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO1, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+// clang-format off
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi0 = {
-    MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO1, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi0 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss0 = { MXC_GPIO0, (MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss1 = { MXC_GPIO0, (MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi1 = {
-    MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi1 = { MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss0 = { MXC_GPIO0, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss1 = { MXC_GPIO0, (MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss2 = { MXC_GPIO1, (MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss3 = { MXC_GPIO1, (MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO1, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO1, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_sfe = {
-    MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_sfe = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
+                                      MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_sfe_ss0 = { MXC_GPIO0, (MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT2,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_sfe_ss1 = { MXC_GPIO0, (MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT2,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0,
-                                                (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_4),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_quad = {
-    MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_4), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_quad = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi1_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi1_standard = { MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // Quad SPI not supported on MXC_SPI1.
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts2 = { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts3 = { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me10.c b/Libraries/PeriphDrivers/Source/SYS/pins_me10.c
index a31c489ffb..efbe33f148 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me10.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me10.c
@@ -34,280 +34,236 @@
 /* **** Includes **** */
 #include "gpio.h"
 
-/**
- * @ingroup MXC_pins
- * @{
- */
-
 /* **** Global Variables **** */
 
+// clang-format off
 const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO3, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO3, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO3, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO3, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr4 = { MXC_GPIO3, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr5 = { MXC_GPIO3, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO2, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO2, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO2, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_16),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO2, (MXC_GPIO_PIN_13 | MXC_GPIO_PIN_15),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO1, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO2, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO2, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO2, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO2, (MXC_GPIO_PIN_13 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO1, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO2, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO2, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO2, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO2, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_spi0_0 = { MXC_GPIO0, (MXC_GPIO_PIN_22), MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_spi0_1 = { MXC_GPIO3,
-                                         (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_1 = { MXC_GPIO3, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi1 = { MXC_GPIO1,
-                                       (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_spi1 = { MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss0 = { MXC_GPIO1, (MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss1 = { MXC_GPIO1, (MXC_GPIO_PIN_25), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss2 = { MXC_GPIO1, (MXC_GPIO_PIN_24), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss3 = { MXC_GPIO1, (MXC_GPIO_PIN_27), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi2 = { MXC_GPIO2,
-                                       (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_spi2 = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ss0 = { MXC_GPIO2, (MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ss1 = { MXC_GPIO2, (MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ss2 = { MXC_GPIO2, (MXC_GPIO_PIN_0), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ss3 = { MXC_GPIO2, (MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi3 = { MXC_GPIO0,
-                                       (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17 |
-                                        MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_spi3 = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17 | MXC_GPIO_PIN_20 |
+                                       MXC_GPIO_PIN_21), MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ss0 = { MXC_GPIO0, (MXC_GPIO_PIN_19), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ss1 = { MXC_GPIO0, (MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ss2 = { MXC_GPIO0, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ss3 = { MXC_GPIO0, (MXC_GPIO_PIN_18), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_pt0_0 = { MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt1_0 = { MXC_GPIO2, MXC_GPIO_PIN_30, MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt2_0 = { MXC_GPIO2, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt3_0 = { MXC_GPIO0, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt4_0 = { MXC_GPIO2, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt5_0 = { MXC_GPIO2, MXC_GPIO_PIN_20, MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt6_0 = { MXC_GPIO2, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt7_0 = { MXC_GPIO2, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt8_0 = { MXC_GPIO2, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt9_0 = { MXC_GPIO1, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt10_0 = { MXC_GPIO2, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt11_0 = { MXC_GPIO2, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt12_0 = { MXC_GPIO2, MXC_GPIO_PIN_26, MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt13_0 = { MXC_GPIO2, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt14_0 = { MXC_GPIO2, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt15_0 = { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_pt0_1 = { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT2,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt1_1 = { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT2,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt2_1 = { MXC_GPIO1, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT2,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt3_1 = { MXC_GPIO1, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT2,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt4_1 = { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT2,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt5_1 = { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_ALT2,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt6_1 = { MXC_GPIO1, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT2,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt7_1 = { MXC_GPIO1, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT2,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt8_1 = { MXC_GPIO1, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_ALT2,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt9_1 = { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT2,
-                                        MXC_GPIO_PAD_NONE };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt10_1 = { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT2,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt11_1 = { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT2,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt12_1 = { MXC_GPIO2, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT2,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt13_1 = { MXC_GPIO2, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT2,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt14_1 = { MXC_GPIO2, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT2,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt15_1 = { MXC_GPIO2, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT2,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_hyp = { MXC_GPIO1,
-                                      (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14 |
-                                       MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_18 |
-                                       MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_hyp = { MXC_GPIO1, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 |
+                                      MXC_GPIO_PIN_16 | MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
+                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_hyp_cs0 = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT1,
-                                          MXC_GPIO_PAD_NONE };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_hyp_cs1 = { MXC_GPIO3, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT2,
-                                          MXC_GPIO_PAD_NONE };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spixr = { MXC_GPIO0,
-                                        (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 |
-                                         MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_WEAK_PULL_UP };
+const mxc_gpio_cfg_t gpio_cfg_spixr = { MXC_GPIO0, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 |
+                                        MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_WEAK_PULL_UP,
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spixfc = { MXC_GPIO0,
-                                         (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9 |
-                                          MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12),
-                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_spixfc = { MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 |
+                                         MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12), MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
+                                         MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_sdhc_0 = { MXC_GPIO0, (MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT2,
-                                         MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_sdhc_1 = { MXC_GPIO1,
-                                         (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 |
-                                          MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 |
-                                          MXC_GPIO_PIN_6),
-                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_sdhc_1 = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 |
+                                         MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT1,
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO1, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                      MXC_GPIO_VSSEL_VDDIOH };
+const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO1, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT1,
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_clcd_0 = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17 |
-     MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 |
-     MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25 | MXC_GPIO_PIN_30),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE
-};
-const mxc_gpio_cfg_t gpio_cfg_clcd_1 = { MXC_GPIO1,
-                                         (MXC_GPIO_PIN_3 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_23 |
-                                          MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 |
-                                          MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29 |
-                                          MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                         MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_clcd_2 = { MXC_GPIO2,
-                                         (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_6 |
-                                          MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 |
-                                          MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18),
-                                         MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_clcd_0 = { MXC_GPIO0, (MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 |
+                                         MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_22 |
+                                         MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25 | MXC_GPIO_PIN_30), MXC_GPIO_FUNC_ALT2,
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_clcd_1 = { MXC_GPIO1, (MXC_GPIO_PIN_3 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 |
+                                         MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29 |
+                                         MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
+                                         MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_clcd_2 = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14 |
+                                         MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18), MXC_GPIO_FUNC_ALT2,
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_i2s = {
-    MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE
-};
+const mxc_gpio_cfg_t gpio_cfg_i2s = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
+                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO3,
-                                                (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO3, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO3, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO3, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI0 does not support Dual or Quad mode.
-const mxc_gpio_cfg_t gpio_cfg_spi1_standard = {
-    MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_29),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi1_standard = { MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI1 does not support Dual or Quad mode.
-const mxc_gpio_cfg_t gpio_cfg_spi2_standard = { MXC_GPIO2,
-                                                (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi2_3wire = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_4),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi2_standard = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi2_3wire = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_4), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI2 does not support Dual or Quad mode.
 
-const mxc_gpio_cfg_t gpio_cfg_spi3_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi3_standard = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_21),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi3_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi3_quad = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi3_dual = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi3_quad = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts0 = { MXC_GPIO1, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts1 = { MXC_GPIO1, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts2 = { MXC_GPIO1, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts3 = { MXC_GPIO1, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ts0 = { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ts1 = { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ts2 = { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ts3 = { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ts2 = { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ts3 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
-
-/**@} end of ingroup MXC_pins*/
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me11.c b/Libraries/PeriphDrivers/Source/SYS/pins_me11.c
index 74f9293cda..f763287cd1 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me11.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me11.c
@@ -42,89 +42,79 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
-const mxc_gpio_cfg_t gpio_cfg_swda = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_swdb = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
 
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                       MXC_GPIO_VSSEL_VDDIO };
+// clang-format off
+const mxc_gpio_cfg_t gpio_cfg_swda = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_swdb = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1a = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                         MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1b = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                         MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1c = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                         MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi0 = {
-    MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1a = {
-    MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1b = {
-    MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE
-};
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT2,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1a = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT2,
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1b = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT3,
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1c = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT3,
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi0 = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1a = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
+                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1b = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
 const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_ALT3,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_32kcal = { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_ALT3,
-                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_i2s0a = {
-    MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE
-};
-const mxc_gpio_cfg_t gpio_cfg_i2s0b = {
-    MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE
-};
+const mxc_gpio_cfg_t gpio_cfg_i2s0a = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
+                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2s0b = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0,
                                                 (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6),
                                                 MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
+                                                MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6),
                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI0 does not support Dual or Quad mode.
 
 const mxc_gpio_cfg_t gpio_cfg_spi1a_standard = {
     MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
+    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0
 };
 const mxc_gpio_cfg_t gpio_cfg_spi1a_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12),
                                               MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
+                                              MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1b_standard = { MXC_GPIO0,
                                                  (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2),
                                                  MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                                 MXC_GPIO_VSSEL_VDDIO };
+                                                 MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1b_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2),
                                               MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
+                                              MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI1 does not support Dual or Quad mode.
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1a_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT1,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1b_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_ALT2,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me12.c b/Libraries/PeriphDrivers/Source/SYS/pins_me12.c
index 68b2b2413b..aaa74d76c9 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me12.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me12.c
@@ -42,164 +42,125 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
+
+// clang-format off
 const mxc_gpio_cfg_t gpio_cfg_lp_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT5,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_hf_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT4,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_9),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                                     MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0b = { MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
-                                         MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                         MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0b_flow = { MXC_GPIO0, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18),
-                                              MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                              MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0b_flow_disable = { MXC_GPIO0,
-                                                      (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18),
-                                                      MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                                      MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                                     MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0b = { MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8), MXC_GPIO_FUNC_ALT4,
+                                         MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0b_flow = { MXC_GPIO0, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18), MXC_GPIO_FUNC_ALT4,
+                                              MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0b_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18), MXC_GPIO_FUNC_IN,
+                                                      MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT2,
+                                        MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
-const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr0b = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr0c = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16),
-                                        MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr1b = { MXC_GPIO0, (MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr1c = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_9),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr2b = { MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr2c = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_i2s = {
-    MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-    MXC_GPIO_FUNC_ALT5, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-
-const mxc_gpio_cfg_t gpio_cfg_spi0 = { MXC_GPIO0,
-                                       (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr0b = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr0c = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT4,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr1b = { MXC_GPIO0, (MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr1c = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT4,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr2b = { MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr2c = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_i2s = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
+                                      MXC_GPIO_FUNC_ALT5, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi0 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss0 = { MXC_GPIO0, (MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi1 = { MXC_GPIO0,
-                                       (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_17),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi1 = { MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_17),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss0 = { MXC_GPIO0, (MXC_GPIO_PIN_18), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1b = { MXC_GPIO0,
-                                        (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1b = { MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
+                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1b_ss0 = { MXC_GPIO0, (MXC_GPIO_PIN_10), MXC_GPIO_FUNC_ALT1,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_pt0 = { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt1 = { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt2 = { MXC_GPIO0, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt3 = { MXC_GPIO0, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_adc_ain0 = { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain1 = { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain2 = { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain3 = { MXC_GPIO0, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_adc_trig_p0_9 = { MXC_GPIO0, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT4,
-                                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_trig_p0_0 = { MXC_GPIO0, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT5,
-                                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_can = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_9),
-                                      MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                      MXC_GPIO_VSSEL_VDDIOH };
-const mxc_gpio_cfg_t gpio_cfg_canb = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIOH };
+const mxc_gpio_cfg_t gpio_cfg_can = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT2,
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_canb = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0,
-                                                (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI0 does not support Dual or Quad mode.
 
-const mxc_gpio_cfg_t gpio_cfg_spi1a_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1a_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_17),
-                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1b_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT2,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1b_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12),
-                                              MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi1a_standard = { MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_13),
+                                                 MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1a_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT1,
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1b_standard = { MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT2,
+                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1b_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12), MXC_GPIO_FUNC_ALT2,
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI1 does not support Dual or Quad mode.
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1a_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT1,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1b_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT2,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me13.c b/Libraries/PeriphDrivers/Source/SYS/pins_me13.c
index 55cfd06c60..5916163049 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me13.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me13.c
@@ -42,138 +42,140 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
+
+// clang-format off
 const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO2, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
                                        MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_i2c2b = { MXC_GPIO1, (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
                                         MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_i2c2c = { MXC_GPIO1, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
                                         MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO1, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO1, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO1, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO1, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO1, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO1, (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart3_flow = { MXC_GPIO1, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart4 = { MXC_GPIO1, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
                                         MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart4b = { MXC_GPIO2, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
                                          MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                         MXC_GPIO_VSSEL_VDDIO };
+                                         MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart4c = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2),
                                          MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE,
-                                         MXC_GPIO_VSSEL_VDDIO };
+                                         MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart4_flow = { MXC_GPIO2, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
                                              MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart4b_flow = { MXC_GPIO2, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
                                               MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
+                                              MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart4c_flow = { MXC_GPIO1, (MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
                                               MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
+                                              MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart5 = { MXC_GPIO1, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
                                         MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart5b = { MXC_GPIO2, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
                                          MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                         MXC_GPIO_VSSEL_VDDIO };
+                                         MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart5_flow = { MXC_GPIO2, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
                                              MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart5b_flow = { MXC_GPIO2, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
                                               MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
+                                              MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // NOTE: uart5b flow control is split across port pins 0.31 and 1.0
 const mxc_gpio_cfg_t gpio_cfg_uart5c_P1_flow = { MXC_GPIO1, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT4,
-                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart5c_P0_flow = { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_ALT4,
-                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_spi0 = {
     MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
+    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0
 };
 // NOTE: SPI1 definied here with SS1 only, SS0 is on port0 by itself.
 const mxc_gpio_cfg_t gpio_cfg_spi1 = {
     MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
+    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0
 };
 // NOTE: SPI2 defined here with SS0 only, and NOT SS1 and SS2
 const mxc_gpio_cfg_t gpio_cfg_spi2 = {
     MXC_GPIO2, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
+    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0
 };
 const mxc_gpio_cfg_t gpio_cfg_spi2b = {
     MXC_GPIO2, (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
-    MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
+    MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0
 };
 // NOTE: SPI3 defined here with SS0 only, and NOT SS1, SS2, or SS3
 const mxc_gpio_cfg_t gpio_cfg_spi3 = { MXC_GPIO0,
                                        (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 |
                                         MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14),
                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
 const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_ALT3,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_ALT3,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO2, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO2, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr4 = { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT3,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr5 = { MXC_GPIO1, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT3,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Pulse trains are only defined once, depending on package, each PT could be mapped to other pins
 const mxc_gpio_cfg_t gpio_cfg_pt0 = { MXC_GPIO2, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt1 = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt2 = { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt3 = { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt4 = { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt5 = { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT3,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt6 = { MXC_GPIO1, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT3,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt7 = { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_ALT3,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
                                       MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE,
@@ -186,18 +188,18 @@ const mxc_gpio_cfg_t gpio_cfg_owmb = { MXC_GPIO1, (MXC_GPIO_PIN_18 | MXC_GPIO_PI
 // Other configurations are available, depending on package, to allow the use of EMAC or SDHC
 // Note that both P1a and P1b must be configured for proper operation
 const mxc_gpio_cfg_t gpio_cfg_P0_clcd = { MXC_GPIO0, 0x00007FC0, MXC_GPIO_FUNC_ALT3,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_P1a_clcd = { MXC_GPIO1, 0x000F003E, MXC_GPIO_FUNC_ALT3,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_P1b_clcd = { MXC_GPIO1, 0x00300000, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_P2_clcd = { MXC_GPIO2, 0x000FFC00, MXC_GPIO_FUNC_ALT3,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO0, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT4,
-                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_rtcsqwb = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT2,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_sdhc = { MXC_GPIO2,
                                        (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 |
@@ -215,18 +217,18 @@ const mxc_gpio_cfg_t gpio_cfg_sdhcb = { MXC_GPIO1,
 const mxc_gpio_cfg_t gpio_cfg_sc0 = { MXC_GPIO0,
                                       (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17 |
                                        MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20),
-                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_sc1 = { MXC_GPIO0,
                                       (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 |
                                        MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
-                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Note that both P0 and P1 must be configured for proper operation
 const mxc_gpio_cfg_t gpio_cfg_spixf = { MXC_GPIO1,
                                         (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 |
                                          MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spixr_P0 = {
     MXC_GPIO1, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29 | MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
     MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP
@@ -236,9 +238,9 @@ const mxc_gpio_cfg_t gpio_cfg_spixr_P1 = { MXC_GPIO2, (MXC_GPIO_PIN_0 | MXC_GPIO
 
 // Note that both P2a and P2b must be configured for proper operation
 const mxc_gpio_cfg_t gpio_cfg_emac_P2a = { MXC_GPIO2, 0x000003FC, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_emac_P2b = { MXC_GPIO2, 0xFFE00000, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Note that all of the following must be configured for proper operation
 const mxc_gpio_cfg_t gpio_cfg_kbd_P2 = { MXC_GPIO2, 0x000003FC, MXC_GPIO_FUNC_ALT1,
@@ -252,17 +254,17 @@ const mxc_gpio_cfg_t gpio_cfg_pcif_P0_BITS_0_7 = {
     MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH
 };
 const mxc_gpio_cfg_t gpio_cfg_pcif_P0_BITS_8 = { MXC_GPIO0, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT2,
-                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_pcif_P1_BITS_9 = { MXC_GPIO1, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT2,
-                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_pcif_P1_BITS_10_11 = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_15),
                                                      MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
                                                      MXC_GPIO_VSSEL_VDDIOH };
 const mxc_gpio_cfg_t gpio_cfg_pcif_hsync = { MXC_GPIO1, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_ALT2,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_pcif_vsync = { MXC_GPIO1, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT4,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_pcif_pclk = { MXC_GPIO1, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT4,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_pcif_pwrdwn = { MXC_GPIO1, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_OUT,
-                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me14.c b/Libraries/PeriphDrivers/Source/SYS/pins_me14.c
index 4c60b9d606..b5c2508177 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me14.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me14.c
@@ -42,288 +42,216 @@
 //Note: Some of the alternate function definitions differ between WLP and CTBGA
 /***** Global Variables *****/
 
+// clang-format off
 const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO0, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO0, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr4 = { MXC_GPIO0, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr5 = { MXC_GPIO0, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_uart0a = { MXC_GPIO0, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10),
-                                         MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                         MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0a_flow = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_11),
-                                              MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                              MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1a = { MXC_GPIO0, (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-                                         MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                         MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1a_flow = { MXC_GPIO0, (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23),
-                                              MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                              MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart2a = { MXC_GPIO0, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2),
-                                         MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                         MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart2a_flow = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_3),
-                                              MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                              MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_uart0a = { MXC_GPIO0, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10), MXC_GPIO_FUNC_ALT3,
+                                         MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0a_flow = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT3,
+                                              MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1a = { MXC_GPIO0, (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21), MXC_GPIO_FUNC_ALT3,
+                                         MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1a_flow = { MXC_GPIO0, (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT3,
+                                              MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2a = { MXC_GPIO0, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2), MXC_GPIO_FUNC_ALT3,
+                                         MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2a_flow = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT3,
+                                              MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_uart0b = { MXC_GPIO1, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                         MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                         MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0b_flow = { MXC_GPIO1, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                              MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                              MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1b = { MXC_GPIO1, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                         MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                         MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1b_flow = { MXC_GPIO1, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                              MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                              MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart2b = { MXC_GPIO0, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-                                         MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                         MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart2b_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                              MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                              MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_uart0b = { MXC_GPIO1, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT3,
+                                         MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0b_flow = { MXC_GPIO1, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT3,
+                                              MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1b = { MXC_GPIO1, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT3,
+                                         MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1b_flow = { MXC_GPIO1, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT3,
+                                              MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2b = { MXC_GPIO0, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT3,
+                                         MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2b_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT3,
+                                              MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO1, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO1, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi0a = {
-    MXC_GPIO1,
-    (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi0b = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi0a = { MXC_GPIO1, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
+                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0b = { MXC_GPIO0, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
+                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss0a = { MXC_GPIO1, (MXC_GPIO_PIN_8), MXC_GPIO_FUNC_ALT1,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss0b = { MXC_GPIO0, (MXC_GPIO_PIN_8), MXC_GPIO_FUNC_ALT2,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss1 = { MXC_GPIO0, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss2 = { MXC_GPIO0, (MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi1 = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi1 = { MXC_GPIO0, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
+                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss0 = { MXC_GPIO0, (MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss1 = { MXC_GPIO0, (MXC_GPIO_PIN_22), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss2 = { MXC_GPIO0, (MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi2 = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi2 = { MXC_GPIO0, (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
+                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ss0 = { MXC_GPIO0, (MXC_GPIO_PIN_24), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ss1 = { MXC_GPIO0, (MXC_GPIO_PIN_30), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ss2 = { MXC_GPIO0, (MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_pt0 = { MXC_GPIO1, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt1 = { MXC_GPIO1, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt2 = { MXC_GPIO1, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt3 = { MXC_GPIO1, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt4 = { MXC_GPIO1, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt5 = { MXC_GPIO1, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt6 = { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt7 = { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt8 = { MXC_GPIO1, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt9 = { MXC_GPIO1, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt10 = { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt11 = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt12 = { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt13 = { MXC_GPIO1, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt14 = { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt15 = { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_ALT4,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spixr = { MXC_GPIO0,
-                                        (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 |
-                                         MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                        MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spixr = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 |
+                                        MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_OUT,
-                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spixfc = { MXC_GPIO0,
-                                         (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 |
-                                          MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                         MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spixfc = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 |
+                                         MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_sdhc = { MXC_GPIO1,
-                                       (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 |
-                                        MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 |
-                                        MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIOH };
+const mxc_gpio_cfg_t gpio_cfg_sdhc = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 |
+                                       MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
+                                       MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_owma = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIOH };
-const mxc_gpio_cfg_t gpio_cfg_owmb = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIOH };
-const mxc_gpio_cfg_t gpio_cfg_owmc = { MXC_GPIO0, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIOH };
+const mxc_gpio_cfg_t gpio_cfg_owma = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_owmb = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_owmc = { MXC_GPIO0, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_adc0 = { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc1 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc2 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc3 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc4 = { MXC_GPIO0, MXC_GPIO_PIN_20, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc5 = { MXC_GPIO0, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc6 = { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc7 = { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_swd_core1 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_swd_core1 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_sdma = {
-    MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-    MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_sdma = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi0a_standard = {
-    MXC_GPIO1, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi0a_3wire = { MXC_GPIO1, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_11),
-                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0a_dual = { MXC_GPIO1,
-                                             (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0a_quad = {
-    MXC_GPIO1,
-    (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi0a_standard = { MXC_GPIO1, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
+                                                 MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0a_3wire = { MXC_GPIO1, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0a_dual = { MXC_GPIO1, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
+                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0a_quad = { MXC_GPIO1, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
+                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi0b_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT2,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi0b_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_11),
-                                              MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0b_dual = { MXC_GPIO0,
-                                             (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0b_quad = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi0b_standard = { MXC_GPIO0, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
+                                                 MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0b_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT2,
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0b_dual = { MXC_GPIO0, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
+                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0b_quad = { MXC_GPIO0, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
+                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi1_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19), MXC_GPIO_FUNC_ALT2,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_19),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
-                                            MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_quad = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi1_standard = { MXC_GPIO0, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
+                                                MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_19), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO0, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
+                                            MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_quad = { MXC_GPIO0, (MXC_GPIO_PIN_17 | MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
+                                            MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi2_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27), MXC_GPIO_FUNC_ALT2,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi2_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_27),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi2_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
-                                            MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi2_quad = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi2_standard = { MXC_GPIO0, (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
+                                                MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi2_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_27), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi2_dual = { MXC_GPIO0, (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
+                                            MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi2_quad = { MXC_GPIO0, (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
+                                            MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0a_ts0 = { MXC_GPIO1, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT1,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0b_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT2,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts2 = { MXC_GPIO0, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts2 = { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_30, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ts2 = { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me15.c b/Libraries/PeriphDrivers/Source/SYS/pins_me15.c
index 8265b08a0a..51ec3596b5 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me15.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me15.c
@@ -42,130 +42,109 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
+
+// clang-format off
 const mxc_gpio_cfg_t gpio_cfg_lpextclk = { MXC_GPIO0, (MXC_GPIO_PIN_12), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_hfextclk = { MXC_GPIO0, (MXC_GPIO_PIN_12), MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE };
-
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                       MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO0, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart3_flow = { MXC_GPIO0, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart3_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE };
-
-const mxc_gpio_cfg_t gpio_cfg_i2s0 = {
-    MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE
-};
-
-const mxc_gpio_cfg_t gpio_cfg_spi0 = {
-    MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE
-};
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT2,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO0, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart3_flow = { MXC_GPIO0, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart3_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_i2s0 = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
+                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi0 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // NOTE: SPI1 definied here with SS0 only
-const mxc_gpio_cfg_t gpio_cfg_spi1 = {
-    MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE
-};
+const mxc_gpio_cfg_t gpio_cfg_spi1 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // NOTE: SPI2 defined here with SS0 only, and NOT SS1 and SS2
-const mxc_gpio_cfg_t gpio_cfg_spi2 = {
-    MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE
-};
+const mxc_gpio_cfg_t gpio_cfg_spi2 = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0};
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
-const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr4 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr5 = { MXC_GPIO0, (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr4 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr5 = { MXC_GPIO0, (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO0, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT4,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_rtcsqwb = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT2,
-                                          MXC_GPIO_PAD_NONE };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_mon_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT4,
-                                          MXC_GPIO_PAD_NONE };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_cmd_rs_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT4,
-                                             MXC_GPIO_PAD_NONE };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_chrg_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_mon_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT4,
-                                          MXC_GPIO_PAD_NONE };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_cmd_rs_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT4,
-                                             MXC_GPIO_PAD_NONE };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_chrg_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0,
-                                                (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI0 does not support Dual or Quad modes.
 
-const mxc_gpio_cfg_t gpio_cfg_spi1_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi1_standard = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI1 does not support Dual or Quad modes.
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me16.c b/Libraries/PeriphDrivers/Source/SYS/pins_me16.c
index 3a298e5cba..b63d8881b2 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me16.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me16.c
@@ -42,98 +42,82 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
+
+// clang-format off
 const mxc_gpio_cfg_t gpio_cfg_hfextclk = { MXC_GPIO0, (MXC_GPIO_PIN_10), MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // NOTE: UART1 pins inaccessible
-const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT2,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // NOTE: UART3 pins inaccessible
 
-const mxc_gpio_cfg_t gpio_cfg_i2s0 = {
-    MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE
-};
+const mxc_gpio_cfg_t gpio_cfg_i2s0 = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
+                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // NOTE: SPI1 definied here with SS0 only
-const mxc_gpio_cfg_t gpio_cfg_spi1 = {
-    MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE
-};
+const mxc_gpio_cfg_t gpio_cfg_spi1 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // NOTE: SPI2 defined here with SS0 only, and NOT SS1 and SS2
-const mxc_gpio_cfg_t gpio_cfg_spi2 = {
-    MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE
-};
+const mxc_gpio_cfg_t gpio_cfg_spi2 = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
-const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr4 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr5 = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr4 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr5 = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_mon_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT4,
-                                          MXC_GPIO_PAD_NONE };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_cmd_rs_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT4,
-                                             MXC_GPIO_PAD_NONE };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_chrg_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_mon_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT4,
-                                          MXC_GPIO_PAD_NONE };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_cmd_rs_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT4,
-                                             MXC_GPIO_PAD_NONE };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_chrg_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi1_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi1_standard = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI1 does not support Dual or Quad modes.
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me17.c b/Libraries/PeriphDrivers/Source/SYS/pins_me17.c
index ba40f8d61a..9bac8893c3 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me17.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me17.c
@@ -42,176 +42,139 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
-const mxc_gpio_cfg_t gpio_cfg_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                         MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                         MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                                     MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                                     MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                                     MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_WEAK_PULL_UP,
-                                        MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t antenna_ctrl0 = { MXC_GPIO1, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t antenna_ctrl1 = { MXC_GPIO1, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+
+// clang-format off
+const mxc_gpio_cfg_t gpio_cfg_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT2,
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                        MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t antenna_ctrl0 = { MXC_GPIO1, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t antenna_ctrl1 = { MXC_GPIO1, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
 const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_2), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr0b = { MXC_GPIO0, (MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1b = { MXC_GPIO0, (MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1_MapB = { MXC_GPIO0, (MXC_GPIO_PIN_20), MXC_GPIO_FUNC_ALT2,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO0, (MXC_GPIO_PIN_26), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2b = { MXC_GPIO0, (MXC_GPIO_PIN_27), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO1, (MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3b = { MXC_GPIO1, (MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_i2s0 = {
-    MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_i2s0 = { MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_i2s0_clkext = { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_ALT2,
-                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO3, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 
 const mxc_gpio_cfg_t gpio_cfg_pt0 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt1 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt2 = { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt3 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_adc_ain0 = { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain1 = { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain2 = { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain3 = { MXC_GPIO2, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain4 = { MXC_GPIO2, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain5 = { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain6 = { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain7 = { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_rv_jtag = {
-    MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-
-const mxc_gpio_cfg_t gpio_cfg_cmp0 = { MXC_GPIO2, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp1 = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp2 = { MXC_GPIO2, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_rv_jtag = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                          MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_cmp0 = { MXC_GPIO2, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp1 = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp2 = { MXC_GPIO2, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0,
-                                                (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_7),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_quad = {
-    MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-
-const mxc_gpio_cfg_t gpio_cfg_spi1_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_23),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_quad = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_quad = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi1_standard = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
+                                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_quad = { MXC_GPIO0, (MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_26, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts2 = { MXC_GPIO0, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_20, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me18.c b/Libraries/PeriphDrivers/Source/SYS/pins_me18.c
index 1a8e119715..d439aa2da0 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me18.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me18.c
@@ -42,384 +42,304 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
+
+// clang-format off
 const mxc_gpio_cfg_t gpio_cfg_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_23), MXC_GPIO_FUNC_IN,
-                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO2, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO1, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO2, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO2, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO2, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP,
-                                                     MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO2, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_16),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO2, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO1, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO2, (MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO2, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO2, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO2, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO2, (MXC_GPIO_PIN_13 | MXC_GPIO_PIN_15),
                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                             MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO2, (MXC_GPIO_PIN_13 | MXC_GPIO_PIN_15),
                                                      MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP,
-                                                     MXC_GPIO_VSSEL_VDDIO };
+                                                     MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10),
                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO1, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                             MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable = { MXC_GPIO1, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
                                                      MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP,
-                                                     MXC_GPIO_VSSEL_VDDIO };
+                                                     MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO3, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
                                         MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_PULL_UP,
-                                        MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart3_flow = { MXC_GPIO3, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
                                              MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_PULL_UP,
-                                             MXC_GPIO_VSSEL_VDDIO };
+                                             MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_uart3_flow_disable = { MXC_GPIO3, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
                                                      MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_PULL_UP,
-                                                     MXC_GPIO_VSSEL_VDDIO };
+                                                     MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t antenna_ctrl0 = { MXC_GPIO2, (MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t antenna_ctrl1 = { MXC_GPIO2, (MXC_GPIO_PIN_18), MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t antenna_ctrl2 = { MXC_GPIO2, (MXC_GPIO_PIN_20), MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t antenna_ctrl3 = { MXC_GPIO2, (MXC_GPIO_PIN_21), MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
-const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr0b = { MXC_GPIO0, (MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14),
-                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr1b = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_17),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO1, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr2b = { MXC_GPIO2, (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO1, (MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr3b = { MXC_GPIO2, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT3,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr0b = { MXC_GPIO0, (MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT2,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr1b = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO1, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr2b = { MXC_GPIO2, (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO1, (MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr3b = { MXC_GPIO2, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr4 = { MXC_GPIO3, (MXC_GPIO_PIN_4), MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr5 = { MXC_GPIO3, (MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_i2s0 = {
-    MXC_GPIO2, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-    MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_i2s0 = { MXC_GPIO2, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
+                                       MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_i2s0_clkext = { MXC_GPIO0, (MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT2,
-                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi0 = { MXC_GPIO2,
-                                       (MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi0 = { MXC_GPIO2, (MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
+                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss0 = { MXC_GPIO0, (MXC_GPIO_PIN_22), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss1 = { MXC_GPIO2, (MXC_GPIO_PIN_26), MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi1 = { MXC_GPIO1,
-                                       (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi1 = { MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss0 = { MXC_GPIO1, (MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss1 = { MXC_GPIO1, (MXC_GPIO_PIN_25), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ss2 = { MXC_GPIO1, (MXC_GPIO_PIN_24), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi2 = { MXC_GPIO2,
-                                       (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi2 = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ss0 = { MXC_GPIO2, (MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ss1 = { MXC_GPIO2, (MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ss2 = { MXC_GPIO2, (MXC_GPIO_PIN_0), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi3 = { MXC_GPIO0,
-                                       (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi3 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ss0 = { MXC_GPIO0, (MXC_GPIO_PIN_19), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ss1 = { MXC_GPIO0, (MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ss2 = { MXC_GPIO0, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spi4 = { MXC_GPIO1,
-                                       (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi4 = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi4_ss0 = { MXC_GPIO1, (MXC_GPIO_PIN_0), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi4_ss1 = { MXC_GPIO1, (MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi4_ss2 = { MXC_GPIO1, (MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spixr = { MXC_GPIO0,
-                                        (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 |
-                                         MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spixr = { MXC_GPIO0, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 |
+                                        MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_spixf = { MXC_GPIO0,
-                                        (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 |
-                                         MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6),
-                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spixf = { MXC_GPIO0, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5 |
+                                        MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO4, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_hpb = { MXC_GPIO1,
-                                      (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14 |
-                                       MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_18 |
-                                       MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-                                      MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_hpb = { MXC_GPIO1, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13 | MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 |
+                                      MXC_GPIO_PIN_16 | MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
+                                      MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_hpb_cs0 = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT3,
-                                          MXC_GPIO_PAD_NONE };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_hpb_cs1 = { MXC_GPIO1, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT3,
-                                          MXC_GPIO_PAD_NONE };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_pt0 = { MXC_GPIO2, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt1 = { MXC_GPIO1, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt2 = { MXC_GPIO1, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt3 = { MXC_GPIO1, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt4 = { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt5 = { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt6 = { MXC_GPIO1, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt7 = { MXC_GPIO1, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt8 = { MXC_GPIO1, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt9 = { MXC_GPIO1, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt10 = { MXC_GPIO2, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt11 = { MXC_GPIO2, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt12 = { MXC_GPIO2, MXC_GPIO_PIN_26, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt13 = { MXC_GPIO2, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt14 = { MXC_GPIO2, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt15 = { MXC_GPIO2, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8),
-                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8), MXC_GPIO_FUNC_ALT1,
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_adc_ain0 = { MXC_GPIO3, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain1 = { MXC_GPIO3, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain2 = { MXC_GPIO3, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain3 = { MXC_GPIO3, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain4 = { MXC_GPIO3, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain5 = { MXC_GPIO3, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain6 = { MXC_GPIO3, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain7 = { MXC_GPIO3, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_adc_trig_p0_10 = { MXC_GPIO0, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT1,
-                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_trig_p1_0 = { MXC_GPIO1, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT2,
-                                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_trig_p2_15 = { MXC_GPIO2, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_ALT2,
-                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_cmp0 = { MXC_GPIO3, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp1 = { MXC_GPIO3, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp2 = { MXC_GPIO3, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_cmp3 = { MXC_GPIO3, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_rv_jtag = {
-    MXC_GPIO0, (MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-
-const mxc_gpio_cfg_t gpio_cfg_can0 = { MXC_GPIO2, (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIOH };
-const mxc_gpio_cfg_t gpio_cfg_can1 = { MXC_GPIO2, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIOH };
+                                                 MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_cmp0 = { MXC_GPIO3, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp1 = { MXC_GPIO3, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp2 = { MXC_GPIO3, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_cmp3 = { MXC_GPIO3, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_rv_jtag = { MXC_GPIO0, (MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21 | MXC_GPIO_PIN_22),
+                                          MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_can0 = { MXC_GPIO2, (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_can1 = { MXC_GPIO2, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi0_standard = {
-    MXC_GPIO2, (MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO2, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO2,
-                                            (MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_quad = {
-    MXC_GPIO2,
-    (MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29 | MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-
-const mxc_gpio_cfg_t gpio_cfg_spi1_standard = {
-    MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_29),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO1,
-                                            (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_quad_0 = { MXC_GPIO1,
-                                              (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi1_quad_1 = { MXC_GPIO1, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_11),
-                                              MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_spi2_standard = { MXC_GPIO2,
-                                                (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi2_3wire = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_4),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi2_dual = { MXC_GPIO2,
-                                            (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi2_quad_0 = { MXC_GPIO0,
-                                              (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi2_quad_1 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                              MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                              MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_spi3_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi3_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_21),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi3_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi3_quad = {
-    MXC_GPIO0,
-    (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-
-const mxc_gpio_cfg_t gpio_cfg_spi4_standard = { MXC_GPIO1,
-                                                (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi4_3wire = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_3),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi4_dual = { MXC_GPIO1,
-                                            (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi4_quad = {
-    MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO2, (MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO2, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO2, (MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT1,
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_quad = { MXC_GPIO2, (MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29 | MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
+                                            MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi1_standard = { MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_dual = { MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_quad_0 = { MXC_GPIO1, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
+                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_quad_1 = { MXC_GPIO1, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT2,
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi2_standard = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi2_3wire = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_4), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi2_dual = { MXC_GPIO2, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi2_quad_0 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                              MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi2_quad_1 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi3_standard = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21), MXC_GPIO_FUNC_ALT1,
+                                                MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi3_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_21), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi3_dual = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi3_quad = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17 | MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi4_standard = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi4_3wire = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi4_dual = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi4_quad = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts1 = { MXC_GPIO2, MXC_GPIO_PIN_26, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts0 = { MXC_GPIO1, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts1 = { MXC_GPIO1, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts2 = { MXC_GPIO1, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_spi2_ts0 = { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ts1 = { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ts2 = { MXC_GPIO1, MXC_GPIO_PIN_27, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_spi3_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi3_ts2 = { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_spi4_ts0 = { MXC_GPIO1, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi4_ts1 = { MXC_GPIO1, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi4_ts2 = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me20.c b/Libraries/PeriphDrivers/Source/SYS/pins_me20.c
index 66d6bb145f..dec5e155bd 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me20.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me20.c
@@ -42,143 +42,118 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
-const mxc_gpio_cfg_t gpio_cfg_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                         MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                         MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                                     MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                                     MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_NONE,
-                                                     MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t antenna_ctrl0 = { MXC_GPIO1, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t antenna_ctrl1 = { MXC_GPIO1, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                       MXC_GPIO_VSSEL_VDDIO };
+
+// clang-format off
+const mxc_gpio_cfg_t gpio_cfg_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT2,
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO2, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t antenna_ctrl0 = { MXC_GPIO1, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t antenna_ctrl1 = { MXC_GPIO1, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
 const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_2), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr0b = { MXC_GPIO0, (MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_14), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1b = { MXC_GPIO0, (MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1_MapB = { MXC_GPIO0, (MXC_GPIO_PIN_20), MXC_GPIO_FUNC_ALT2,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO0, (MXC_GPIO_PIN_26), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2b = { MXC_GPIO0, (MXC_GPIO_PIN_27), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO1, (MXC_GPIO_PIN_6), MXC_GPIO_FUNC_ALT1,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3b = { MXC_GPIO1, (MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
-                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_i2s0 = {
-    MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_i2s0 = { MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO0, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT4,
-                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_rtcsqwb = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT2,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_pt0 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt1 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT1,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt2 = { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt3 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_adc_ain0 = { MXC_GPIO2, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain1 = { MXC_GPIO2, MXC_GPIO_PIN_1, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain2 = { MXC_GPIO2, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain3 = { MXC_GPIO2, MXC_GPIO_PIN_3, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain4 = { MXC_GPIO2, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain5 = { MXC_GPIO2, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain6 = { MXC_GPIO2, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_adc_ain7 = { MXC_GPIO2, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_rv_jtag = {
-    MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_rv_jtag = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                          MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0,
-                                                (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_7),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO0,
-                                            (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                            MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_quad = {
-    MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
+const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_quad = { MXC_GPIO0, (MXC_GPIO_PIN_5 | MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7 | MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
+                                            MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts2 = { MXC_GPIO0, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me21.c b/Libraries/PeriphDrivers/Source/SYS/pins_me21.c
index 47bd7add96..0b59b394d9 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me21.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me21.c
@@ -42,229 +42,195 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
-const mxc_gpio_cfg_t gpio_cfg_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                         MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
+
+// clang-format off
+const mxc_gpio_cfg_t gpio_cfg_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT2,
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_hfextclk = { MXC_GPIO0, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_lpextclk = { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE };
-
-const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                       MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_PULL_UP,
-                                       MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP };
-const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP };
-const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                        MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                             MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP };
-const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO0, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
-                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart3_flow = { MXC_GPIO0, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_uart3_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25),
-                                                     MXC_GPIO_FUNC_IN, MXC_GPIO_PAD_WEAK_PULL_UP };
-
-const mxc_gpio_cfg_t gpio_cfg_i2s0 = {
-    MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-    MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE
-};
-
-const mxc_gpio_cfg_t gpio_cfg_spi0 = { MXC_GPIO0,
-                                       (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c1 = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_i2c2 = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19), MXC_GPIO_FUNC_ALT1,
+                                       MXC_GPIO_PAD_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_uart0 = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1 = { MXC_GPIO0, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT2,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2_flow = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT2,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart3 = { MXC_GPIO0, (MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27), MXC_GPIO_FUNC_ALT1,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart3_flow = { MXC_GPIO0, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_uart3_flow_disable = { MXC_GPIO0, (MXC_GPIO_PIN_24 | MXC_GPIO_PIN_25), MXC_GPIO_FUNC_IN,
+                                                     MXC_GPIO_PAD_WEAK_PULL_UP, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_i2s0 = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9 | MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
+                                       MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_spi0 = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 //SPI chip selected defined separately below
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss0 = { MXC_GPIO0, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss1 = { MXC_GPIO0, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT3,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss2 = { MXC_GPIO0, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT3,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_spi0_ss3 = { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_ALT3,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // NOTE: SPI1 defined here with SS0 only
-const mxc_gpio_cfg_t gpio_cfg_spi1 = {
-    MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE
-};
+const mxc_gpio_cfg_t gpio_cfg_spi1 = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // NOTE: SPI2 defined here with SS0 only, and NOT SS1 and SS2
-const mxc_gpio_cfg_t gpio_cfg_spi2 = {
-    MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-    MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE
-};
+const mxc_gpio_cfg_t gpio_cfg_spi2 = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                       MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
-const mxc_gpio_cfg_t gpio_cfg_tmr0a = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr0b = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr0c = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_tmr0a = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr0b = { MXC_GPIO0, (MXC_GPIO_PIN_8 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr0c = { MXC_GPIO0, (MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr0d_in = { MXC_GPIO0, MXC_GPIO_PIN_22, MXC_GPIO_FUNC_ALT3,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr0d_out = { MXC_GPIO1, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT3,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_tmr1a = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr1b = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr1c = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr1d = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_9),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_tmr2a = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr2b = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr2c = { MXC_GPIO0, (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_tmr3a = { MXC_GPIO0, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr3b = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr3c = { MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_1),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_tmr3d = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31),
-                                        MXC_GPIO_FUNC_ALT3, MXC_GPIO_PAD_NONE,
-                                        MXC_GPIO_VSSEL_VDDIO };
-
-const mxc_gpio_cfg_t gpio_cfg_lptmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                         MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
-                                         MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_lptmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23),
-                                         MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                         MXC_GPIO_VSSEL_VDDIO };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_tmr1a = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr1b = { MXC_GPIO0, (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr1c = { MXC_GPIO0, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr1d = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_9), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_tmr2a = { MXC_GPIO0, (MXC_GPIO_PIN_4 | MXC_GPIO_PIN_5), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr2b = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr2c = { MXC_GPIO0, (MXC_GPIO_PIN_20 | MXC_GPIO_PIN_21), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_tmr3a = { MXC_GPIO0, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr3b = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr3c = { MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_1), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_tmr3d = { MXC_GPIO0, (MXC_GPIO_PIN_30 | MXC_GPIO_PIN_31), MXC_GPIO_FUNC_ALT3,
+                                        MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+
+const mxc_gpio_cfg_t gpio_cfg_lptmr0 = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT2,
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_lptmr1 = { MXC_GPIO0, (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23), MXC_GPIO_FUNC_ALT1,
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT2,
-                                         MXC_GPIO_PAD_NONE };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
-const mxc_gpio_cfg_t gpio_cfg_qdec_in = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7),
-                                          MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE };
-const mxc_gpio_cfg_t gpio_cfg_qdec_out = { MXC_GPIO0,
-                                           (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
-                                           MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE };
+const mxc_gpio_cfg_t gpio_cfg_qdec_in = { MXC_GPIO0, (MXC_GPIO_PIN_6 | MXC_GPIO_PIN_7), MXC_GPIO_FUNC_ALT4,
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_qdec_out = { MXC_GPIO0, (MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
+                                           MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_mon_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT4,
-                                          MXC_GPIO_PAD_NONE };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_cmd_rs_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT4,
-                                             MXC_GPIO_PAD_NONE };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_chrg_lc1 = { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_mon_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT4,
-                                          MXC_GPIO_PAD_NONE };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_cmd_rs_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT4,
-                                             MXC_GPIO_PAD_NONE };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_chrg_lc2 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_adc_ain0 = { MXC_GPIO0, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain1 = { MXC_GPIO0, MXC_GPIO_PIN_9, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain2 = { MXC_GPIO0, MXC_GPIO_PIN_10, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain3 = { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain4 = { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain5 = { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain6 = { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain7 = { MXC_GPIO0, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain8 = { MXC_GPIO0, MXC_GPIO_PIN_16, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain9 = { MXC_GPIO0, MXC_GPIO_PIN_17, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain10 = { MXC_GPIO0, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT4,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_adc_ain11 = { MXC_GPIO0, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT4,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 
 // SPI v2 Pin Definitions
-const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0,
-                                                (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO0, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_3 | MXC_GPIO_PIN_4), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI0 does not support Dual or Quad modes
 
-const mxc_gpio_cfg_t gpio_cfg_spi1_standard = {
-    MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT1,
-    MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO
-};
-const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi1_standard = { MXC_GPIO0, (MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi1_3wire = { MXC_GPIO0, (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI1 does not support Dual or Quad modes
 
-const mxc_gpio_cfg_t gpio_cfg_spi2_standard = { MXC_GPIO1,
-                                                (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                                MXC_GPIO_VSSEL_VDDIO };
-const mxc_gpio_cfg_t gpio_cfg_spi2_3wire = { MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
-                                             MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
-                                             MXC_GPIO_VSSEL_VDDIO };
+const mxc_gpio_cfg_t gpio_cfg_spi2_standard = { MXC_GPIO1, (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3),
+                                                MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
+const mxc_gpio_cfg_t gpio_cfg_spi2_3wire = { MXC_GPIO1, (MXC_GPIO_PIN_2 | MXC_GPIO_PIN_3), MXC_GPIO_FUNC_ALT1,
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 // MXC_SPI2 does not support Dual or Quad modes
 
 // SPI v2 Target Selects Pin Definitions
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_5, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts1 = { MXC_GPIO0, MXC_GPIO_PIN_6, MXC_GPIO_FUNC_ALT3,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts2 = { MXC_GPIO0, MXC_GPIO_PIN_7, MXC_GPIO_FUNC_ALT3,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi0_ts3 = { MXC_GPIO0, MXC_GPIO_PIN_23, MXC_GPIO_FUNC_ALT3,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi1_ts0 = { MXC_GPIO0, MXC_GPIO_PIN_29, MXC_GPIO_FUNC_ALT2,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_spi2_ts0 = { MXC_GPIO1, MXC_GPIO_PIN_4, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me55.c b/Libraries/PeriphDrivers/Source/SYS/pins_me55.c
index b50f6a62e1..96b7b8a598 100644
--- a/Libraries/PeriphDrivers/Source/SYS/pins_me55.c
+++ b/Libraries/PeriphDrivers/Source/SYS/pins_me55.c
@@ -42,6 +42,8 @@
 /***** Definitions *****/
 
 /***** Global Variables *****/
+
+// clang-format off
 const mxc_gpio_cfg_t gpio_cfg_i2c0 = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
                                        MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE,
                                        MXC_GPIO_VSSEL_VDDIO };
@@ -116,38 +118,38 @@ const mxc_gpio_cfg_t gpio_cfg_spi2b = {
 
 // Timers are only defined once, depending on package, each timer could be mapped to other pins
 const mxc_gpio_cfg_t gpio_cfg_tmr0 = { MXC_GPIO1, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_ALT3,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr1 = { MXC_GPIO1, MXC_GPIO_PIN_15, MXC_GPIO_FUNC_ALT3,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr2 = { MXC_GPIO1, MXC_GPIO_PIN_24, MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr3 = { MXC_GPIO1, MXC_GPIO_PIN_25, MXC_GPIO_FUNC_ALT2,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr4 = { MXC_GPIO1, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT3,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_tmr5 = { MXC_GPIO1, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT3,
-                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                       MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Pulse trains are only defined once, depending on package, each PT could be mapped to other pins
 const mxc_gpio_cfg_t gpio_cfg_pt0 = { MXC_GPIO1, MXC_GPIO_PIN_28, MXC_GPIO_FUNC_ALT2,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt1 = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt2 = { MXC_GPIO0, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt3 = { MXC_GPIO0, MXC_GPIO_PIN_12, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt4 = { MXC_GPIO0, MXC_GPIO_PIN_13, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt5 = { MXC_GPIO0, MXC_GPIO_PIN_14, MXC_GPIO_FUNC_ALT4,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt6 = { MXC_GPIO1, MXC_GPIO_PIN_0, MXC_GPIO_FUNC_ALT3,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_pt7 = { MXC_GPIO0, MXC_GPIO_PIN_31, MXC_GPIO_FUNC_ALT3,
-                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_owm = { MXC_GPIO0, (MXC_GPIO_PIN_0 | MXC_GPIO_PIN_1),
-                                      MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_owmb = { MXC_GPIO1, (MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19),
                                        MXC_GPIO_FUNC_ALT4, MXC_GPIO_PAD_NONE,
                                        MXC_GPIO_VSSEL_VDDIO };
@@ -156,18 +158,18 @@ const mxc_gpio_cfg_t gpio_cfg_owmb = { MXC_GPIO1, (MXC_GPIO_PIN_18 | MXC_GPIO_PI
 // Other configurations are available, depending on package, to allow the use of EMAC or SDHC
 // Note that both P1a and P1b must be configured for proper operation
 const mxc_gpio_cfg_t gpio_cfg_P0_clcd = { MXC_GPIO0, 0x00007FC0, MXC_GPIO_FUNC_ALT3,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_P1a_clcd = { MXC_GPIO1, 0x000F003E, MXC_GPIO_FUNC_ALT3,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_P1b_clcd = { MXC_GPIO1, 0x00300000, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_P2_clcd = { MXC_GPIO1, 0x000FFC00, MXC_GPIO_FUNC_ALT3,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_rtcsqw = { MXC_GPIO0, MXC_GPIO_PIN_8, MXC_GPIO_FUNC_ALT4,
-                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                         MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_rtcsqwb = { MXC_GPIO1, MXC_GPIO_PIN_11, MXC_GPIO_FUNC_ALT2,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 const mxc_gpio_cfg_t gpio_cfg_sdhc = { MXC_GPIO1,
                                        (MXC_GPIO_PIN_10 | MXC_GPIO_PIN_11 | MXC_GPIO_PIN_12 |
@@ -185,11 +187,11 @@ const mxc_gpio_cfg_t gpio_cfg_sdhcb = { MXC_GPIO1,
 const mxc_gpio_cfg_t gpio_cfg_sc0 = { MXC_GPIO0,
                                       (MXC_GPIO_PIN_15 | MXC_GPIO_PIN_16 | MXC_GPIO_PIN_17 |
                                        MXC_GPIO_PIN_18 | MXC_GPIO_PIN_19 | MXC_GPIO_PIN_20),
-                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_sc1 = { MXC_GPIO0,
                                       (MXC_GPIO_PIN_22 | MXC_GPIO_PIN_23 | MXC_GPIO_PIN_24 |
                                        MXC_GPIO_PIN_25 | MXC_GPIO_PIN_26 | MXC_GPIO_PIN_27),
-                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                      MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Note that both P0 and P1 must be configured for proper operation
 const mxc_gpio_cfg_t gpio_cfg_spixf = { MXC_GPIO1,
@@ -206,9 +208,9 @@ const mxc_gpio_cfg_t gpio_cfg_spixr_P1 = { MXC_GPIO1, (MXC_GPIO_PIN_0 | MXC_GPIO
 
 // Note that both P2a and P2b must be configured for proper operation
 const mxc_gpio_cfg_t gpio_cfg_emac_P2a = { MXC_GPIO1, 0x000003FC, MXC_GPIO_FUNC_ALT4,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 const mxc_gpio_cfg_t gpio_cfg_emac_P2b = { MXC_GPIO1, 0xFFE00000, MXC_GPIO_FUNC_ALT1,
-                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO };
+                                           MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };
 
 // Note that all of the following must be configured for proper operation
 const mxc_gpio_cfg_t gpio_cfg_kbd_P2 = { MXC_GPIO1, 0x000003FC, MXC_GPIO_FUNC_ALT1,
@@ -216,16 +218,16 @@ const mxc_gpio_cfg_t gpio_cfg_kbd_P2 = { MXC_GPIO1, 0x000003FC, MXC_GPIO_FUNC_AL
 
 // Note that both P0 and P1 must be configured for proper operation
 const mxc_gpio_cfg_t gpio_cfg_pcif_P0 = { MXC_GPIO0, 0x00007FC0, MXC_GPIO_FUNC_ALT2,
-                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                          MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_pcif_P1 = { MXC_GPIO1,
                                           (MXC_GPIO_PIN_1 | MXC_GPIO_PIN_14 | MXC_GPIO_PIN_15),
                                           MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE,
                                           MXC_GPIO_VSSEL_VDDIOH };
 const mxc_gpio_cfg_t gpio_cfg_pcif_hsync = { MXC_GPIO1, MXC_GPIO_PIN_2, MXC_GPIO_FUNC_ALT2,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_pcif_vsync = { MXC_GPIO1, MXC_GPIO_PIN_18, MXC_GPIO_FUNC_ALT4,
-                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                             MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_pcif_pclk = { MXC_GPIO1, MXC_GPIO_PIN_19, MXC_GPIO_FUNC_ALT4,
-                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                            MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};
 const mxc_gpio_cfg_t gpio_cfg_pcif_pwrdwn = { MXC_GPIO1, MXC_GPIO_PIN_21, MXC_GPIO_FUNC_OUT,
-                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH };
+                                              MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIOH, MXC_GPIO_DRVSTR_0};