From 1d57c20feae2be3b2f7be9a3340eb0941da3b9bf Mon Sep 17 00:00:00 2001 From: AndrDragomir Date: Wed, 18 Dec 2024 14:57:30 +0200 Subject: [PATCH 1/2] arm: dts: zc706_adrv9009: Add data offload Add data offload in dts to support the new hdl changes in https://github.com/analogdevicesinc/hdl/pull/1516 Signed-off-by: AndrDragomir --- .../boot/dts/xilinx/zynq-zc706-adv7511-adrv9009.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/xilinx/zynq-zc706-adv7511-adrv9009.dts b/arch/arm/boot/dts/xilinx/zynq-zc706-adv7511-adrv9009.dts index 2408770cc26c3..b8d8a1d54e9f3 100644 --- a/arch/arm/boot/dts/xilinx/zynq-zc706-adv7511-adrv9009.dts +++ b/arch/arm/boot/dts/xilinx/zynq-zc706-adv7511-adrv9009.dts @@ -88,6 +88,7 @@ clock-names = "sampl_clk"; spibus-connected = <&trx0_adrv9009>; adi,axi-pl-fifo-enable; + adi,axi-data-offload-connected = <&axi_data_offload_tx>; adi,axi-interpolation-core-available; interpolation-gpios = <&gpio0 116 GPIO_ACTIVE_HIGH>; }; @@ -220,6 +221,16 @@ adi,sys-clk-select = ; adi,out-clk-select = ; }; + + axi_data_offload_tx: axi-data-offload-0@7c430000 { + compatible = "adi,axi-data-offload-1.0.a"; + reg = <0x7c430000 0x10000>; + // adi,bringup; + // adi,oneshot; + // adi,bypass; + // adi,sync-config = <2>; + // adi,transfer-length = /bits/ 64 <0x10000>; // 2**16 bytes + }; }; &spi0 { From 521d5541bf416d7e7ec6d45df5931c41099e7a55 Mon Sep 17 00:00:00 2001 From: AndrDragomir Date: Wed, 18 Dec 2024 14:59:20 +0200 Subject: [PATCH 2/2] arm64: dts: zcu102_adrv9009: Add data offload Add data offload in dts to support the new hdl changes in https://github.com/analogdevicesinc/hdl/pull/1516 Signed-off-by: AndrDragomir --- .../dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts index cadfd01b34ae4..5769346465a74 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts @@ -114,7 +114,8 @@ clocks = <&trx0_adrv9009 2>; clock-names = "sampl_clk"; spibus-connected = <&trx0_adrv9009>; - //adi,axi-pl-fifo-enable; + adi,axi-pl-fifo-enable; + adi,axi-data-offload-connected = <&axi_data_offload_tx>; adi,axi-interpolation-core-available; interpolation-gpios = <&gpio 140 GPIO_ACTIVE_HIGH>; }; @@ -252,6 +253,16 @@ compatible = "adi,axi-sysid-1.00.a"; reg = <0x85000000 0x10000>; }; + + axi_data_offload_tx: axi-data-offload-0@9c430000 { + compatible = "adi,axi-data-offload-1.0.a"; + reg = <0x9c430000 0x10000>; + // adi,bringup; + // adi,oneshot; + // adi,bypass; + // adi,sync-config = <2>; + // adi,transfer-length = /bits/ 64 <0x10000>; // 2**16 bytes + }; }; };