From 19846f4f407ce6684c2b37dd9fa993d18a17743d Mon Sep 17 00:00:00 2001 From: alin724 Date: Fri, 4 Oct 2024 16:55:31 +0300 Subject: [PATCH] docs: Add Imageon page Signed-off-by: alin724 --- docs/projects/imageon/imageon_bd.svg | 3552 +++++++++++++++++ .../projects/imageon/imageon_func_diagram.svg | 1036 +++++ docs/projects/imageon/index.rst | 221 + docs/projects/index.rst | 8 +- 4 files changed, 4815 insertions(+), 2 deletions(-) create mode 100644 docs/projects/imageon/imageon_bd.svg create mode 100644 docs/projects/imageon/imageon_func_diagram.svg create mode 100755 docs/projects/imageon/index.rst diff --git a/docs/projects/imageon/imageon_bd.svg b/docs/projects/imageon/imageon_bd.svg new file mode 100644 index 0000000000..20f41612d0 --- /dev/null +++ b/docs/projects/imageon/imageon_bd.svg @@ -0,0 +1,3552 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + + Zed +   +   +   +   + + + + + + + Transmit path + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Ethernet + UART + DDRx + SPI + I2C + Interrupts + Zynq + Timer + + + + + AXI_HDMI_TX_CORE + + +   +   + +   + + + + + + AXI_HDMI_RX_CORE + + + + + + CSC + + bypass + + + + + DataClipping + + + + + + + + + + + + + + + + Chroma subsampling  + + + + + + + + + + + + + + + Data interleaving + + + + + + + + + SyncSignals + + HDMI_CLK + + + + DATA_24 + DATA_16 + DATA_36 + DATA_16_ES + HSYNC/VSYNC/DE + HDMI_OUT_CLK + + + + + + + + + + EmbededSync + + + + + + + + + + + + + + + + + bypass + + + + + + + + + + AXI_SPDIF_TX_CORE + + CSC +   + + + + EmbededSync + + SYNC + CLK + DATA +   +   + + + Super Sampling + + + + TPM Sync monitor + + + + + + Datainterleave  + 1. Color space conversion (RGB/YCrCb).2. Color space sampling (422/444).3. The reference design uses FMC-HPC, but the card is FMC-LPC compatible.  + +   + + + + + + 16 + + 16 + + + + + 32 + + + + 64 + + + + + + 24 + + AXI_SPDIF_RX_CORE + + + + + + + + + Receive path + + 64 + 64 + + + + + + FMC CONNECTOR + + HDMI_TX_Clk=148.48MHz + SPDIF_Clk=12.288MHz + SPDIF_Clk=12.288MHz + 32 + 32 + HDMI_RX_Clk=100MHz + + AXI_HDMI_TX_DMA + + + AXI_HDMI_RX_DMA + + MEMORY INTERCONNECT + Sys_Clk=100MHz + Sys_Clk=100MHz + + + + + 64 + + + + 24 + + 24 + + + 24 + + (8b luma/green & 8b Cb/blue) + + + + + 24 + + + + 24 + + 24 + + + 16 + + + *1 + *2 + *3 + + + + + + + + + + + + + + + + + + + FIFO + + + + + TPG + + + + + 24 + + 24 + + + + + +   +   + + + + + diff --git a/docs/projects/imageon/imageon_func_diagram.svg b/docs/projects/imageon/imageon_func_diagram.svg new file mode 100644 index 0000000000..3cbc2a8d93 --- /dev/null +++ b/docs/projects/imageon/imageon_func_diagram.svg @@ -0,0 +1,1036 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + + + + + FMC CONNECTOR + + + + ADV7511 + 225MHz/12bit Deep Color up to 1080pHDMI 1.4, 3D Video, Audio Return ChannelProgrammable two-way color space converterITU656-based embedded syncsAutomatic input video format timing detection + + + + + + spdif + + + ADV7611 + 165MHz/24bit pixel output up to 1080pHDMI 1.4a, 3D Video, HDCPProgrammable 3x3 color space converterITU656-based embedded syncsProgrammable HDMI equalizer + The card has many othercomponents and features, only the referencedesign relatedcomponents are shown here. + FMC-IMAGEON + + + + 16bits + 16bits + + + pixel-clock + pixel-clock + + + + + I2C + data + data + + diff --git a/docs/projects/imageon/index.rst b/docs/projects/imageon/index.rst new file mode 100755 index 0000000000..5e01345907 --- /dev/null +++ b/docs/projects/imageon/index.rst @@ -0,0 +1,221 @@ +.. _imageon: + +Imageon HDL project (OBSOLETE) +=============================================================================== + +Overview +------------------------------------------------------------------------------- + +The :dokuwiki:`FMC-Imageon ` is a +HDMI input/output FMC card that provides high definition video interface for +Xilinx FPGAs. The HDMI input interface is implemented with the :adi:`ADV7611`, +a 165MHz, 24bit pixel output, HDCP capable HDMI 1.4a receiver. +The HDMI output interface is implemented with the :adi:`ADV7511`, a 225MHz, +36-bit deep color, HDMI 1.4 transmitter. + +This reference design provides the video and audio interface between the FPGA +and ADV7511/ADV7611 on board. The video uses a 16bit 422 YCbCr interface and +the audio uses a single bit SPDIF interface in both directions. + +Supported boards +------------------------------------------------------------------------------- + +- FMC-IMAGEON + +Supported devices +------------------------------------------------------------------------------- + +- :adi:`ADV7611` +- :adi:`ADV7511` + +Supported carriers +------------------------------------------------------------------------------- + +- :xilinx:`ZedBoard ` on FMC slot + +Block design +------------------------------------------------------------------------------- + +The reference design is divided in three parts as related to the functionalities +of the board. The first one, related to video transmission, uses the +axi_hdmi_tx module and the axi_dmac modules to read 24 bits of RGB data from +the SoC's DDR memory, and then performs the transmission using the +corresponding HDMI TX-related controller. On the receive side, the inverse +operation is done, by using the HDMI RX-related controller. + +In terms of audio part, the axi_spdif module is used to manage the audio output +transmission on the HDMI connector. Additionally, a conversion from RGB to +YCbCr and a downsampling from 444 to 422 are done in the transmit and receive +(in reverse) datapaths as a default operation. To ensure the setup of the +:adi:`ADV7511` and :adi:`ADV75611` ICs, Xilinx's AXI IIC module is used. + +Block diagram +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The data and control paths, along with the corresponding clocks are depicted +in the first diagram. As related to the functional description of the HDL +modules, this is presented in the second diagram. + +FMC-IMAGEON Block Diagram +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +.. image:: imageon_bd.svg + :width: 800 + :align: center + :alt: FMC-IMAGEON block diagram + +FMC-IMAGEON Functional Description +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +.. image:: imageon_func_diagram.svg + :width: 800 + :align: center + :alt: IMAGEON functional description + +CPU/Memory interconnects addresses +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The addresses are dependent on the architecture of the FPGA, having an offset +added to the base address from HDL (see more at :ref:`architecture cpu-intercon-addr`). + +======================== =========== +Instance Zynq +======================== =========== +axi_iic_main 0x4160_0000 +axi_sysid_0 0x4500_0000 +axi_hdmi_clkgen 0x7900_0000 +axi_hdmi_dma 0x4300_0000 +axi_hdmi_core 0x70E0_0000 +axi_spdif_tx_core 0x75C0_0000 +axi_i2s_adi 0x7760_0000 +axi_iic_fmc 0x4162_0000 +axi_hdmi_rx_core 0x4310_0000 +axi_hdmi_rx_dma 0x43C2_0000 +axi_spdif_rx_core 0x75C2_0000 +axi_iic_imageon 0x43C4_0000 +======================== =========== + +GPIO +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The Software GPIO number is calculated as follows: + +- Zynq-7000: if PS7 EMIOs are used, then offset is 54 + +.. list-table:: + :widths: 25 25 25 25 + :header-rows: 2 + + * - GPIO signal + - Direction + - HDL GPIO EMIO + - Software GPIO + * - + - (from FPGA view) + - + - Zynq-7000 + * - hdmi_iic_rstn + - INOUT + - 33 + - 87 + * - hdmi_rx_int + - INOUT + - 32 + - 86 + * - gpio_bd[31:0] + - INOUT + - 31:0 + - 85:54 + +Interrupts +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Below are the Programmable Logic interrupts used in this project. + +=============================== === ============ ============= +Instance name HDL Linux Zynq Actual Zynq +=============================== === ============ ============= +axi_hdmi_dma/irq 15 59 91 +axi_hdmi_rx_dma/irq 14 58 90 +axi_iic_imageon/iic2intc_irpt 11 55 87 +=============================== === ============ ============= + +Building the HDL project +------------------------------------------------------------------------------- + +The design is built upon ADI's generic HDL reference design framework. +ADI distributed the bit/elf files of this project as part of the +:dokuwiki:`ADI Kuiper Linux ` +in the 2019_R1 release +If you want to build the sources, ADI makes them available on the +:git-hdl:`HDL repository `. But, since this is an obsolete project, you need +to check out the last release branch where it was tested (hdl_2019_r1). +To get the source you must +`clone `__ +the HDL repository, and then build the project as follows: + +**Linux/Cygwin/WSL** + +.. shell:: bash + + /hdl + $git checkout hdl_2019_r1 + $cd projects/imageon/zed + $ make + +A more comprehensive build guide can be found in the :ref:`build_hdl` user guide. + +Resources +------------------------------------------------------------------------------- + +Hardware related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- ADV7511 datasheet: :adi:`ADV7511` +- ADV7611 datasheet: :adi:`ADV7611` + +HDL related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- :git-hdl:`IMAGEON HDL project source code ` + +.. list-table:: + :widths: 30 35 35 + :header-rows: 1 + + * - IP name + - Source code link + - Documentation link + * - AXI_CLKGEN + - :git-hdl:`hdl_2019_r1:library/axi_clkgen` + - :ref:`axi_clkgen` + * - AXI_DMAC + - :git-hdl:`hdl_2019_r1:library/axi_dmac` + - :ref:`axi_dmac` + * - AXI_HDMI_RX + - :git-hdl:`hdl_2019_r1:library/axi_hdmi_rx` + - :ref:`axi_hdmi_rx` + * - AXI_HDMI_TX + - :git-hdl:`hdl_2019_r1:library/axi_hdmi_tx` + - :ref:`axi_hdmi_tx` + * - AXI_SYSID + - :git-hdl:`hdl_2019_r1:library/axi_sysid` + - :ref:`axi_sysid` + * - SYSID_ROM + - :git-hdl:`hdl_2019_r1:library/sysid_rom` + - :ref:`axi_sysid` + * - AXI_SDDIF_RX + - :git-hdl:`hdl_2019_r1:library/axi_spdif_rx` + - --- + +Software related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- :git-linux:`IMAGEON dts source code (arm32) ` +- :git-linux:`ADV7604 Linux driver ` +- :git-linux:`ADV7511 Linux driver ` +- :dokuwiki:`ADV7511 driver docs ` + +.. include:: ../common/more_information.rst + +.. include:: ../common/support.rst diff --git a/docs/projects/index.rst b/docs/projects/index.rst index 8fa7c61b11..1da3c799e1 100644 --- a/docs/projects/index.rst +++ b/docs/projects/index.rst @@ -72,6 +72,10 @@ Contents Obsolete projects ------------------------------------------------------------------------------- +.. toctree:: + :maxdepth: 1 + + IMAGEON .. toctree:: :maxdepth: 1 @@ -80,5 +84,5 @@ The following projects are obsolete and **not maintained anymore**. Support is limited. The latest available sources for these projects can be found in the same archive. - imageon - - ad_fmclidar1_ebz - + imageon - hdl_2019_r1 + ad_fmclidar1_ebz