From dae009fe214198e9b70d2ae4b3ac2432039e09e5 Mon Sep 17 00:00:00 2001 From: Jorge Marques Date: Fri, 22 Nov 2024 15:37:12 -0300 Subject: [PATCH] docs: axi_dmac: Fixup regmap Signed-off-by: Jorge Marques --- docs/regmap/adi_regmap_dmac.txt | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/docs/regmap/adi_regmap_dmac.txt b/docs/regmap/adi_regmap_dmac.txt index eb612fef94..d8da24cf4e 100644 --- a/docs/regmap/adi_regmap_dmac.txt +++ b/docs/regmap/adi_regmap_dmac.txt @@ -135,7 +135,6 @@ Use external sync. ENDFIELD FIELD -DMA_TYPE_DEST [26] DMA_2D_TLAST_MODE DMA_2D_TLAST_MODE R @@ -742,14 +741,13 @@ SG_ADDRESS ENDREG FIELD -[31:0] ''AUTORUN_SG_ADDRESS'' +[31:0] 0x00000000 SG_ADDRESS RW This register contains the starting address of the scatter-gather transfer. The address needs to be aligned to the bus width. If ``AUTORUN`` is set, the default value of the field is ``AUTORUN_SG_ADDRESS``. -If ``AUTORUN`` is unset, the default value of the field is 0x00000000. This register is only valid if the DMA channel has been configured with SG transfer support. ENDFIELD