From fe162563fb7bf0038f85598ad71113877ba9ecc7 Mon Sep 17 00:00:00 2001 From: Abbas Yadollahi Date: Thu, 30 Nov 2017 13:57:02 -0500 Subject: [PATCH] Partially progressed in Lab 5 --- lab4/gA6_rules_dealer.bdf => lab5/Block2.bdf | 339 +- lab5/db/gA6_lab5.(0).cnf.cdb | Bin 0 -> 1819 bytes lab5/db/gA6_lab5.(0).cnf.hdb | Bin 0 -> 1073 bytes lab5/db/gA6_lab5.(1).cnf.cdb | Bin 0 -> 2109 bytes lab5/db/gA6_lab5.(1).cnf.hdb | Bin 0 -> 1069 bytes lab5/db/gA6_lab5.(2).cnf.cdb | Bin 0 -> 4861 bytes lab5/db/gA6_lab5.(2).cnf.hdb | Bin 0 -> 1471 bytes lab5/db/gA6_lab5.asm.qmsg | 6 + lab5/db/gA6_lab5.asm.rdb | Bin 0 -> 1488 bytes lab5/db/gA6_lab5.asm_labs.ddb | Bin 0 -> 8286 bytes lab5/db/gA6_lab5.cbx.xml | 5 + lab5/db/gA6_lab5.cmp.bpm | Bin 0 -> 948 bytes lab5/db/gA6_lab5.cmp.cdb | Bin 0 -> 13704 bytes lab5/db/gA6_lab5.cmp.hdb | Bin 0 -> 12885 bytes lab5/db/gA6_lab5.cmp.idb | Bin 0 -> 4848 bytes lab5/db/gA6_lab5.cmp.kpt | Bin 0 -> 211 bytes lab5/db/gA6_lab5.cmp.logdb | 1 + lab5/db/gA6_lab5.cmp.rdb | Bin 0 -> 23127 bytes lab5/db/gA6_lab5.cmp0.ddb | Bin 0 -> 73317 bytes lab5/db/gA6_lab5.cmp1.ddb | Bin 0 -> 72405 bytes lab5/db/gA6_lab5.cmp2.ddb | Bin 0 -> 45986 bytes lab5/db/gA6_lab5.cmp_merge.kpt | Bin 0 -> 212 bytes lab5/db/gA6_lab5.db_info | 3 + lab5/db/gA6_lab5.eda.qmsg | 5 + lab5/db/gA6_lab5.fit.qmsg | 46 + lab5/db/gA6_lab5.hier_info | 219 + lab5/db/gA6_lab5.hif | Bin 0 -> 519 bytes lab5/db/gA6_lab5.ipinfo | Bin 0 -> 309 bytes lab5/db/gA6_lab5.lpc.html | 50 + lab5/db/gA6_lab5.lpc.rdb | Bin 0 -> 462 bytes lab5/db/gA6_lab5.lpc.txt | 8 + lab5/db/gA6_lab5.map.ammdb | Bin 0 -> 122 bytes lab5/db/gA6_lab5.map.bpm | Bin 0 -> 911 bytes lab5/db/gA6_lab5.map.cdb | Bin 0 -> 5478 bytes lab5/db/gA6_lab5.map.hdb | Bin 0 -> 12044 bytes lab5/db/gA6_lab5.map.kpt | Bin 0 -> 1055 bytes lab5/db/gA6_lab5.map.logdb | 1 + lab5/db/gA6_lab5.map.qmsg | 14 + lab5/db/gA6_lab5.map.rdb | Bin 0 -> 1313 bytes lab5/db/gA6_lab5.map_bb.cdb | Bin 0 -> 2084 bytes lab5/db/gA6_lab5.map_bb.hdb | Bin 0 -> 9951 bytes lab5/db/gA6_lab5.map_bb.logdb | 1 + lab5/db/gA6_lab5.pre_map.hdb | Bin 0 -> 12335 bytes lab5/db/gA6_lab5.pti_db_list.ddb | Bin 0 -> 176 bytes .../db/gA6_lab5.root_partition.map.reg_db.cdb | Bin 0 -> 762 bytes lab5/db/gA6_lab5.routing.rdb | Bin 0 -> 5547 bytes lab5/db/gA6_lab5.rtlv.hdb | Bin 0 -> 12251 bytes lab5/db/gA6_lab5.rtlv_sg.cdb | Bin 0 -> 6605 bytes lab5/db/gA6_lab5.rtlv_sg_swap.cdb | Bin 0 -> 1046 bytes lab5/db/gA6_lab5.sgdiff.cdb | Bin 0 -> 5207 bytes lab5/db/gA6_lab5.sgdiff.hdb | Bin 0 -> 11826 bytes lab5/db/gA6_lab5.sld_design_entry.sci | Bin 0 -> 201 bytes lab5/db/gA6_lab5.sld_design_entry_dsc.sci | Bin 0 -> 201 bytes lab5/db/gA6_lab5.smart_action.txt | 1 + lab5/db/gA6_lab5.sta.qmsg | 30 + lab5/db/gA6_lab5.sta.rdb | Bin 0 -> 13168 bytes lab5/db/gA6_lab5.sta_cmp.7_slow.tdb | Bin 0 -> 11189 bytes lab5/db/gA6_lab5.syn_hier_info | 0 lab5/db/gA6_lab5.tis_db_list.ddb | Bin 0 -> 176 bytes lab5/db/gA6_lab5.vpr.ammdb | Bin 0 -> 395 bytes lab5/db/logic_util_heursitic.dat | Bin 0 -> 5016 bytes lab5/db/prev_cmp_gA6_lab5.qmsg | 4 + lab5/gA6_7_segment_decoder.bsf | 50 + lab5/gA6_7_segment_decoder.vhd | 64 + lab5/gA6_7_segment_decoder.vhd.bak | 64 + lab5/gA6_RANDU.bsf | 43 + lab5/gA6_RANDU.vhd | 72 + lab5/gA6_adder.bdf | 376 + lab5/gA6_adder.bsf | 64 + lab5/gA6_adder32.cmp | 25 + lab5/gA6_adder32.qip | 4 + lab5/gA6_adder32.vhd | 77 + lab5/gA6_adder32.vhd.bak | 146 + lab5/gA6_adder6.bdf | 604 + lab5/gA6_adder6.bsf | 64 + lab5/gA6_adder8.bdf | 763 + lab5/gA6_adder8.bsf | 64 + lab5/gA6_computer.bsf | 85 + lab5/gA6_computer.vhd | 106 + lab5/gA6_computer.vhd.bak | 73 + lab5/gA6_datapath.bsf | 127 + lab5/gA6_datapath.vhd | 154 + lab5/gA6_datapath.vhd.bak | 139 + lab5/gA6_dealer.bsf | 71 + lab5/gA6_dealer.vhd | 78 + lab5/gA6_dealer.vhd.bak | 25 + lab5/gA6_debouncer.bdf | 458 + lab5/gA6_debouncer.bsf | 50 + lab5/gA6_ff_enable52.bdf | 6067 ++++++ lab5/gA6_ff_enable52.bsf | 64 + lab5/gA6_lab5.bdf | 2082 ++ lab5/gA6_lab5.qpf | 30 + lab5/gA6_lab5.qsf | 84 + lab5/gA6_lab5.qws | Bin 0 -> 2181 bytes lab5/gA6_lab5_fsm.vwf | 973 + lab5/gA6_modulo_13.bdf | 444 + lab5/gA6_modulo_13.bsf | 50 + lab5/gA6_not6.bdf | 263 + lab5/gA6_not6.bsf | 43 + lab5/gA6_pop_enable.bsf | 50 + lab5/gA6_pop_enable.vhd | 41 + lab5/gA6_popup_rom_data.mif | 77 + lab5/gA6_rules.bsf | 78 + lab5/gA6_rules.vhd | 85 + lab5/gA6_rules.vhd.bak | 10 + lab5/gA6_stack52.bdf | 15686 ++++++++++++++++ lab5/gA6_stack52.bsf | 99 + lab5/gA6_winner.bsf | 99 + lab5/gA6_winner.vhd | 76 + lab5/gA6_winner.vhd.bak | 77 + lab5/greybox_tmp/cbx_args.txt | 11 + lab5/incremental_db/README | 11 + .../compiled_partitions/gA6_lab5.db_info | 3 + .../gA6_lab5.root_partition.cmp.ammdb | Bin 0 -> 385 bytes .../gA6_lab5.root_partition.cmp.cdb | Bin 0 -> 7339 bytes .../gA6_lab5.root_partition.cmp.dfp | Bin 0 -> 33 bytes .../gA6_lab5.root_partition.cmp.hdb | Bin 0 -> 12303 bytes .../gA6_lab5.root_partition.cmp.kpt | Bin 0 -> 209 bytes .../gA6_lab5.root_partition.cmp.logdb | 1 + .../gA6_lab5.root_partition.cmp.rcfdb | Bin 0 -> 5916 bytes .../gA6_lab5.root_partition.map.cdb | Bin 0 -> 5435 bytes .../gA6_lab5.root_partition.map.dpi | Bin 0 -> 954 bytes .../gA6_lab5.root_partition.map.hbdb.cdb | Bin 0 -> 1287 bytes .../gA6_lab5.root_partition.map.hbdb.hb_info | Bin 0 -> 46 bytes .../gA6_lab5.root_partition.map.hbdb.hdb | Bin 0 -> 11731 bytes .../gA6_lab5.root_partition.map.hbdb.sig | 1 + .../gA6_lab5.root_partition.map.hdb | Bin 0 -> 12222 bytes .../gA6_lab5.root_partition.map.kpt | Bin 0 -> 1052 bytes lab5/lpm_mux0.bsf | 418 + lab5/lpm_mux0.qip | 5 + lab5/lpm_mux0.vhd | 670 + lab5/lpm_mux1.bsf | 82 + lab5/lpm_mux1.qip | 4 + lab5/lpm_mux1.vhd | 146 + lab5/output_files/gA6_lab5.asm.rpt | 130 + lab5/output_files/gA6_lab5.done | 1 + lab5/output_files/gA6_lab5.eda.rpt | 92 + lab5/output_files/gA6_lab5.fit.rpt | 1485 ++ lab5/output_files/gA6_lab5.fit.smsg | 8 + lab5/output_files/gA6_lab5.fit.summary | 16 + lab5/output_files/gA6_lab5.flow.rpt | 136 + lab5/output_files/gA6_lab5.jdi | 8 + lab5/output_files/gA6_lab5.map.rpt | 325 + lab5/output_files/gA6_lab5.map.summary | 14 + lab5/output_files/gA6_lab5.pin | 554 + lab5/output_files/gA6_lab5.pof | Bin 0 -> 2097358 bytes lab5/output_files/gA6_lab5.sof | Bin 0 -> 476046 bytes lab5/output_files/gA6_lab5.sta.rpt | 1149 ++ lab5/output_files/gA6_lab5.sta.summary | 29 + lab5/simulation/modelsim/gA6_lab5.sft | 1 + lab5/simulation/modelsim/gA6_lab5.vho | 2415 +++ lab5/simulation/modelsim/gA6_lab5.vo | 3064 +++ lab5/simulation/modelsim/gA6_lab5_fast.vho | 2415 +++ .../simulation/modelsim/gA6_lab5_modelsim.xrf | 123 + lab5/simulation/modelsim/gA6_lab5_vhd.sdo | 1373 ++ .../simulation/modelsim/gA6_lab5_vhd_fast.sdo | 1373 ++ lab5/simulation/qsim/gA6_lab5.do | 10 + lab5/simulation/qsim/gA6_lab5.msim.vcd | 1320 ++ lab5/simulation/qsim/gA6_lab5.msim.vwf | 5208 +++++ lab5/simulation/qsim/gA6_lab5.sim.vwf | 1075 ++ lab5/simulation/qsim/gA6_lab5.vo | 3064 +++ lab5/simulation/qsim/gA6_lab5.vt | 638 + lab5/simulation/qsim/transcript | 33 + lab5/simulation/qsim/vsim.wlf | Bin 0 -> 73728 bytes lab5/simulation/qsim/work/_info | 85 + lab5/simulation/qsim/work/_vmake | 3 + .../qsim/work/g@a6_lab5/_primary.dat | Bin 0 -> 50850 bytes .../qsim/work/g@a6_lab5/_primary.dbs | Bin 0 -> 46170 bytes .../qsim/work/g@a6_lab5/_primary.vhd | 21 + .../qsim/work/g@a6_lab5/verilog.prw | Bin 0 -> 2081 bytes .../qsim/work/g@a6_lab5/verilog.psm | Bin 0 -> 290944 bytes .../work/g@a6_lab5_vlg_check_tst/_primary.dat | Bin 0 -> 7133 bytes .../work/g@a6_lab5_vlg_check_tst/_primary.dbs | Bin 0 -> 5145 bytes .../work/g@a6_lab5_vlg_check_tst/_primary.vhd | 17 + .../work/g@a6_lab5_vlg_check_tst/verilog.prw | Bin 0 -> 3673 bytes .../work/g@a6_lab5_vlg_check_tst/verilog.psm | Bin 0 -> 62712 bytes .../g@a6_lab5_vlg_sample_tst/_primary.dat | Bin 0 -> 571 bytes .../g@a6_lab5_vlg_sample_tst/_primary.dbs | Bin 0 -> 719 bytes .../g@a6_lab5_vlg_sample_tst/_primary.vhd | 12 + .../work/g@a6_lab5_vlg_sample_tst/verilog.prw | Bin 0 -> 372 bytes .../work/g@a6_lab5_vlg_sample_tst/verilog.psm | Bin 0 -> 6888 bytes .../work/g@a6_lab5_vlg_vec_tst/_primary.dat | Bin 0 -> 4952 bytes .../work/g@a6_lab5_vlg_vec_tst/_primary.dbs | Bin 0 -> 5208 bytes .../work/g@a6_lab5_vlg_vec_tst/_primary.vhd | 4 + .../work/g@a6_lab5_vlg_vec_tst/verilog.prw | Bin 0 -> 2356 bytes .../work/g@a6_lab5_vlg_vec_tst/verilog.psm | Bin 0 -> 31648 bytes 186 files changed, 58451 insertions(+), 159 deletions(-) rename lab4/gA6_rules_dealer.bdf => lab5/Block2.bdf (52%) create mode 100644 lab5/db/gA6_lab5.(0).cnf.cdb create mode 100644 lab5/db/gA6_lab5.(0).cnf.hdb create mode 100644 lab5/db/gA6_lab5.(1).cnf.cdb create mode 100644 lab5/db/gA6_lab5.(1).cnf.hdb create mode 100644 lab5/db/gA6_lab5.(2).cnf.cdb create mode 100644 lab5/db/gA6_lab5.(2).cnf.hdb create mode 100644 lab5/db/gA6_lab5.asm.qmsg create mode 100644 lab5/db/gA6_lab5.asm.rdb create mode 100644 lab5/db/gA6_lab5.asm_labs.ddb create mode 100644 lab5/db/gA6_lab5.cbx.xml create mode 100644 lab5/db/gA6_lab5.cmp.bpm create mode 100644 lab5/db/gA6_lab5.cmp.cdb create mode 100644 lab5/db/gA6_lab5.cmp.hdb create mode 100644 lab5/db/gA6_lab5.cmp.idb create mode 100644 lab5/db/gA6_lab5.cmp.kpt create mode 100644 lab5/db/gA6_lab5.cmp.logdb create mode 100644 lab5/db/gA6_lab5.cmp.rdb create mode 100644 lab5/db/gA6_lab5.cmp0.ddb create mode 100644 lab5/db/gA6_lab5.cmp1.ddb create mode 100644 lab5/db/gA6_lab5.cmp2.ddb create mode 100644 lab5/db/gA6_lab5.cmp_merge.kpt create mode 100644 lab5/db/gA6_lab5.db_info create mode 100644 lab5/db/gA6_lab5.eda.qmsg create mode 100644 lab5/db/gA6_lab5.fit.qmsg create mode 100644 lab5/db/gA6_lab5.hier_info create mode 100644 lab5/db/gA6_lab5.hif create mode 100644 lab5/db/gA6_lab5.ipinfo create mode 100644 lab5/db/gA6_lab5.lpc.html create mode 100644 lab5/db/gA6_lab5.lpc.rdb create mode 100644 lab5/db/gA6_lab5.lpc.txt create mode 100644 lab5/db/gA6_lab5.map.ammdb create mode 100644 lab5/db/gA6_lab5.map.bpm create mode 100644 lab5/db/gA6_lab5.map.cdb create mode 100644 lab5/db/gA6_lab5.map.hdb create mode 100644 lab5/db/gA6_lab5.map.kpt create mode 100644 lab5/db/gA6_lab5.map.logdb create mode 100644 lab5/db/gA6_lab5.map.qmsg create mode 100644 lab5/db/gA6_lab5.map.rdb create mode 100644 lab5/db/gA6_lab5.map_bb.cdb create mode 100644 lab5/db/gA6_lab5.map_bb.hdb create mode 100644 lab5/db/gA6_lab5.map_bb.logdb create mode 100644 lab5/db/gA6_lab5.pre_map.hdb create mode 100644 lab5/db/gA6_lab5.pti_db_list.ddb create mode 100644 lab5/db/gA6_lab5.root_partition.map.reg_db.cdb create mode 100644 lab5/db/gA6_lab5.routing.rdb create mode 100644 lab5/db/gA6_lab5.rtlv.hdb create mode 100644 lab5/db/gA6_lab5.rtlv_sg.cdb create mode 100644 lab5/db/gA6_lab5.rtlv_sg_swap.cdb create mode 100644 lab5/db/gA6_lab5.sgdiff.cdb create mode 100644 lab5/db/gA6_lab5.sgdiff.hdb create mode 100644 lab5/db/gA6_lab5.sld_design_entry.sci create mode 100644 lab5/db/gA6_lab5.sld_design_entry_dsc.sci create mode 100644 lab5/db/gA6_lab5.smart_action.txt create mode 100644 lab5/db/gA6_lab5.sta.qmsg create mode 100644 lab5/db/gA6_lab5.sta.rdb create mode 100644 lab5/db/gA6_lab5.sta_cmp.7_slow.tdb create mode 100644 lab5/db/gA6_lab5.syn_hier_info create mode 100644 lab5/db/gA6_lab5.tis_db_list.ddb create mode 100644 lab5/db/gA6_lab5.vpr.ammdb create mode 100644 lab5/db/logic_util_heursitic.dat create mode 100644 lab5/db/prev_cmp_gA6_lab5.qmsg create mode 100644 lab5/gA6_7_segment_decoder.bsf create mode 100644 lab5/gA6_7_segment_decoder.vhd create mode 100644 lab5/gA6_7_segment_decoder.vhd.bak create mode 100644 lab5/gA6_RANDU.bsf create mode 100644 lab5/gA6_RANDU.vhd create mode 100644 lab5/gA6_adder.bdf create mode 100644 lab5/gA6_adder.bsf create mode 100644 lab5/gA6_adder32.cmp create mode 100644 lab5/gA6_adder32.qip create mode 100644 lab5/gA6_adder32.vhd create mode 100644 lab5/gA6_adder32.vhd.bak create mode 100644 lab5/gA6_adder6.bdf create mode 100644 lab5/gA6_adder6.bsf create mode 100644 lab5/gA6_adder8.bdf create mode 100644 lab5/gA6_adder8.bsf create mode 100644 lab5/gA6_computer.bsf create mode 100644 lab5/gA6_computer.vhd create mode 100644 lab5/gA6_computer.vhd.bak create mode 100644 lab5/gA6_datapath.bsf create mode 100644 lab5/gA6_datapath.vhd create mode 100644 lab5/gA6_datapath.vhd.bak create mode 100644 lab5/gA6_dealer.bsf create mode 100644 lab5/gA6_dealer.vhd create mode 100644 lab5/gA6_dealer.vhd.bak create mode 100644 lab5/gA6_debouncer.bdf create mode 100644 lab5/gA6_debouncer.bsf create mode 100644 lab5/gA6_ff_enable52.bdf create mode 100644 lab5/gA6_ff_enable52.bsf create mode 100644 lab5/gA6_lab5.bdf create mode 100644 lab5/gA6_lab5.qpf create mode 100644 lab5/gA6_lab5.qsf create mode 100644 lab5/gA6_lab5.qws create mode 100644 lab5/gA6_lab5_fsm.vwf create mode 100644 lab5/gA6_modulo_13.bdf create mode 100644 lab5/gA6_modulo_13.bsf create mode 100644 lab5/gA6_not6.bdf create mode 100644 lab5/gA6_not6.bsf create mode 100644 lab5/gA6_pop_enable.bsf create mode 100644 lab5/gA6_pop_enable.vhd create mode 100644 lab5/gA6_popup_rom_data.mif create mode 100644 lab5/gA6_rules.bsf create mode 100644 lab5/gA6_rules.vhd create mode 100644 lab5/gA6_rules.vhd.bak create mode 100644 lab5/gA6_stack52.bdf create mode 100644 lab5/gA6_stack52.bsf create mode 100644 lab5/gA6_winner.bsf create mode 100644 lab5/gA6_winner.vhd create mode 100644 lab5/gA6_winner.vhd.bak create mode 100644 lab5/greybox_tmp/cbx_args.txt create mode 100644 lab5/incremental_db/README create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.db_info create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.cmp.ammdb create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.cmp.cdb create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.cmp.dfp create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.cmp.hdb create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.cmp.kpt create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.cmp.logdb create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.cmp.rcfdb create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.map.cdb create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.map.dpi create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.map.hbdb.cdb create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.map.hbdb.hb_info create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.map.hbdb.hdb create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.map.hbdb.sig create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.map.hdb create mode 100644 lab5/incremental_db/compiled_partitions/gA6_lab5.root_partition.map.kpt create mode 100644 lab5/lpm_mux0.bsf create mode 100644 lab5/lpm_mux0.qip create mode 100644 lab5/lpm_mux0.vhd create mode 100644 lab5/lpm_mux1.bsf create mode 100644 lab5/lpm_mux1.qip create mode 100644 lab5/lpm_mux1.vhd create mode 100644 lab5/output_files/gA6_lab5.asm.rpt create mode 100644 lab5/output_files/gA6_lab5.done create mode 100644 lab5/output_files/gA6_lab5.eda.rpt create mode 100644 lab5/output_files/gA6_lab5.fit.rpt create mode 100644 lab5/output_files/gA6_lab5.fit.smsg create mode 100644 lab5/output_files/gA6_lab5.fit.summary create mode 100644 lab5/output_files/gA6_lab5.flow.rpt create mode 100644 lab5/output_files/gA6_lab5.jdi create mode 100644 lab5/output_files/gA6_lab5.map.rpt create mode 100644 lab5/output_files/gA6_lab5.map.summary create mode 100644 lab5/output_files/gA6_lab5.pin create mode 100644 lab5/output_files/gA6_lab5.pof create mode 100644 lab5/output_files/gA6_lab5.sof create mode 100644 lab5/output_files/gA6_lab5.sta.rpt create mode 100644 lab5/output_files/gA6_lab5.sta.summary create mode 100644 lab5/simulation/modelsim/gA6_lab5.sft create mode 100644 lab5/simulation/modelsim/gA6_lab5.vho create mode 100644 lab5/simulation/modelsim/gA6_lab5.vo create mode 100644 lab5/simulation/modelsim/gA6_lab5_fast.vho create mode 100644 lab5/simulation/modelsim/gA6_lab5_modelsim.xrf create mode 100644 lab5/simulation/modelsim/gA6_lab5_vhd.sdo create mode 100644 lab5/simulation/modelsim/gA6_lab5_vhd_fast.sdo create mode 100644 lab5/simulation/qsim/gA6_lab5.do create mode 100644 lab5/simulation/qsim/gA6_lab5.msim.vcd create mode 100644 lab5/simulation/qsim/gA6_lab5.msim.vwf create mode 100644 lab5/simulation/qsim/gA6_lab5.sim.vwf create mode 100644 lab5/simulation/qsim/gA6_lab5.vo create mode 100644 lab5/simulation/qsim/gA6_lab5.vt create mode 100644 lab5/simulation/qsim/transcript create mode 100644 lab5/simulation/qsim/vsim.wlf create mode 100644 lab5/simulation/qsim/work/_info create mode 100644 lab5/simulation/qsim/work/_vmake create mode 100644 lab5/simulation/qsim/work/g@a6_lab5/_primary.dat create mode 100644 lab5/simulation/qsim/work/g@a6_lab5/_primary.dbs create mode 100644 lab5/simulation/qsim/work/g@a6_lab5/_primary.vhd create mode 100644 lab5/simulation/qsim/work/g@a6_lab5/verilog.prw create mode 100644 lab5/simulation/qsim/work/g@a6_lab5/verilog.psm create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_check_tst/_primary.dat create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_check_tst/_primary.dbs create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_check_tst/_primary.vhd create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_check_tst/verilog.prw create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_check_tst/verilog.psm create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_sample_tst/_primary.dat create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_sample_tst/_primary.dbs create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_sample_tst/_primary.vhd create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_sample_tst/verilog.prw create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_sample_tst/verilog.psm create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_vec_tst/_primary.dat create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_vec_tst/_primary.dbs create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_vec_tst/_primary.vhd create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_vec_tst/verilog.prw create mode 100644 lab5/simulation/qsim/work/g@a6_lab5_vlg_vec_tst/verilog.psm diff --git a/lab4/gA6_rules_dealer.bdf b/lab5/Block2.bdf similarity index 52% rename from lab4/gA6_rules_dealer.bdf rename to lab5/Block2.bdf index 8a377e0..38f77f2 100644 --- a/lab4/gA6_rules_dealer.bdf +++ b/lab5/Block2.bdf @@ -21,41 +21,9 @@ applicable agreement for further details. (header "graphic" (version "1.4")) (pin (input) - (rect 320 304 496 320) - (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6))) - (text "new_card[5..0]" (rect 9 0 80 12)(font "Arial" )) - (pt 176 8) - (drawing - (line (pt 92 12)(pt 117 12)) - (line (pt 92 4)(pt 117 4)) - (line (pt 121 8)(pt 176 8)) - (line (pt 92 12)(pt 92 4)) - (line (pt 117 4)(pt 121 8)) - (line (pt 117 12)(pt 121 8)) - ) - (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6))) -) -(pin - (input) - (rect 320 320 496 336) - (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6))) - (text "hand_sum[5..0]" (rect 5 0 81 12)(font "Arial" )) - (pt 176 8) - (drawing - (line (pt 92 12)(pt 117 12)) - (line (pt 92 4)(pt 117 4)) - (line (pt 121 8)(pt 176 8)) - (line (pt 92 12)(pt 92 4)) - (line (pt 117 4)(pt 121 8)) - (line (pt 117 12)(pt 121 8)) - ) - (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6))) -) -(pin - (input) - (rect 344 128 512 144) + (rect 728 104 896 120) (text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6))) - (text "clk" (rect 5 0 20 12)(font "Arial" )) + (text "clk" (rect 5 0 19 12)(font "Arial" )) (pt 168 8) (drawing (line (pt 84 12)(pt 109 12)) @@ -69,9 +37,25 @@ applicable agreement for further details. ) (pin (input) - (rect 344 144 512 160) + (rect 392 336 576 352) + (text "INPUT" (rect 141 0 169 10)(font "Arial" (font_size 6))) + (text "player_sum[5..0]" (rect 5 0 88 12)(font "Arial" )) + (pt 184 8) + (drawing + (line (pt 100 12)(pt 125 12)) + (line (pt 100 4)(pt 125 4)) + (line (pt 129 8)(pt 184 8)) + (line (pt 100 12)(pt 100 4)) + (line (pt 125 4)(pt 129 8)) + (line (pt 125 12)(pt 129 8)) + ) + (text "VCC" (rect 144 7 164 17)(font "Arial" (font_size 6))) +) +(pin + (input) + (rect 544 200 712 216) (text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6))) - (text "rst" (rect 5 0 18 12)(font "Arial" )) + (text "rst" (rect 5 0 17 12)(font "Arial" )) (pt 168 8) (drawing (line (pt 84 12)(pt 109 12)) @@ -85,9 +69,9 @@ applicable agreement for further details. ) (pin (input) - (rect 344 160 512 176) + (rect 544 216 712 232) (text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6))) - (text "legal_num" (rect 5 0 55 12)(font "Arial" )) + (text "turn" (rect 5 0 23 12)(font "Arial" )) (pt 168 8) (drawing (line (pt 84 12)(pt 109 12)) @@ -101,9 +85,9 @@ applicable agreement for further details. ) (pin (input) - (rect 344 176 512 192) + (rect 544 232 712 248) (text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6))) - (text "request_deal" (rect 5 0 68 12)(font "Arial" )) + (text "sum[5..0]" (rect 5 0 52 12)(font "Arial" )) (pt 168 8) (drawing (line (pt 84 12)(pt 109 12)) @@ -117,9 +101,25 @@ applicable agreement for further details. ) (pin (output) - (rect 784 304 960 320) + (rect 920 184 1096 200) + (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) + (text "hit" (rect 90 0 101 12)(font "Arial" )) + (pt 0 8) + (drawing + (line (pt 0 8)(pt 52 8)) + (line (pt 52 4)(pt 78 4)) + (line (pt 52 12)(pt 78 12)) + (line (pt 52 12)(pt 52 4)) + (line (pt 78 4)(pt 82 8)) + (line (pt 82 8)(pt 78 12)) + (line (pt 78 12)(pt 82 8)) + ) +) +(pin + (output) + (rect 920 200 1096 216) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) - (text "legal_play" (rect 90 0 139 12)(font "Arial" )) + (text "done" (rect 90 0 113 12)(font "Arial" )) (pt 0 8) (drawing (line (pt 0 8)(pt 52 8)) @@ -133,9 +133,9 @@ applicable agreement for further details. ) (pin (output) - (rect 784 288 960 304) + (rect 944 216 1120 232) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) - (text "ace_out" (rect 90 0 128 12)(font "Arial" )) + (text "sum_out[5..0]" (rect 90 0 158 12)(font "Arial" )) (pt 0 8) (drawing (line (pt 0 8)(pt 52 8)) @@ -149,9 +149,9 @@ applicable agreement for further details. ) (pin (output) - (rect 784 336 960 352) + (rect 944 320 1120 336) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) - (text "out_2[5..0]" (rect 90 0 143 12)(font "Arial" )) + (text "player_wins" (rect 90 0 147 12)(font "Arial" )) (pt 0 8) (drawing (line (pt 0 8)(pt 52 8)) @@ -165,9 +165,9 @@ applicable agreement for further details. ) (pin (output) - (rect 784 352 960 368) + (rect 944 336 1120 352) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) - (text "out_3[5..0]" (rect 90 0 143 12)(font "Arial" )) + (text "dealer_wins" (rect 90 0 146 12)(font "Arial" )) (pt 0 8) (drawing (line (pt 0 8)(pt 52 8)) @@ -181,9 +181,9 @@ applicable agreement for further details. ) (pin (output) - (rect 784 368 960 384) + (rect 944 352 1127 368) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) - (text "out_4" (rect 90 0 117 12)(font "Arial" )) + (text "led_display1[6..0]" (rect 90 0 177 12)(font "Arial" )) (pt 0 8) (drawing (line (pt 0 8)(pt 52 8)) @@ -197,9 +197,9 @@ applicable agreement for further details. ) (pin (output) - (rect 784 320 960 336) + (rect 944 368 1127 384) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) - (text "out_1[5..0]" (rect 90 0 143 12)(font "Arial" )) + (text "led_display2[6..0]" (rect 90 0 177 12)(font "Arial" )) (pt 0 8) (drawing (line (pt 0 8)(pt 52 8)) @@ -213,9 +213,9 @@ applicable agreement for further details. ) (pin (output) - (rect 784 384 960 400) + (rect 944 384 1127 400) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) - (text "out_5" (rect 90 0 117 12)(font "Arial" )) + (text "led_display3[6..0]" (rect 90 0 177 12)(font "Arial" )) (pt 0 8) (drawing (line (pt 0 8)(pt 52 8)) @@ -229,9 +229,9 @@ applicable agreement for further details. ) (pin (output) - (rect 760 128 936 144) + (rect 944 400 1127 416) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) - (text "rand_enable" (rect 90 0 149 12)(font "Arial" )) + (text "led_display4[6..0]" (rect 90 0 177 12)(font "Arial" )) (pt 0 8) (drawing (line (pt 0 8)(pt 52 8)) @@ -245,9 +245,9 @@ applicable agreement for further details. ) (pin (output) - (rect 760 144 936 160) + (rect 944 232 1120 248) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) - (text "stack_enable" (rect 90 0 154 12)(font "Arial" )) + (text "state_out[1..0]" (rect 90 0 161 12)(font "Arial" )) (pt 0 8) (drawing (line (pt 0 8)(pt 52 8)) @@ -260,87 +260,80 @@ applicable agreement for further details. ) ) (symbol - (rect 536 264 744 440) - (text "gA6_rules" (rect 5 0 53 12)(font "Arial" )) - (text "inst" (rect 8 160 25 172)(font "Arial" )) + (rect 696 296 936 440) + (text "gA6_winner" (rect 5 0 60 12)(font "Arial" )) + (text "inst1" (rect 8 128 31 140)(font "Arial" )) (port (pt 0 32) (input) - (text "ace" (rect 0 0 17 12)(font "Arial" )) - (text "ace" (rect 21 27 38 39)(font "Arial" )) + (text "clk" (rect 0 0 14 12)(font "Arial" )) + (text "clk" (rect 21 27 35 39)(font "Arial" )) (line (pt 0 32)(pt 16 32)) ) (port (pt 0 48) (input) - (text "new_card[5..0]" (rect 0 0 71 12)(font "Arial" )) - (text "new_card[5..0]" (rect 21 43 92 55)(font "Arial" )) + (text "player_sum[5..0]" (rect 0 0 83 12)(font "Arial" )) + (text "player_sum[5..0]" (rect 21 43 104 55)(font "Arial" )) (line (pt 0 48)(pt 16 48)(line_width 3)) ) (port (pt 0 64) (input) - (text "hand_sum[5..0]" (rect 0 0 76 12)(font "Arial" )) - (text "hand_sum[5..0]" (rect 21 59 97 71)(font "Arial" )) + (text "dealer_sum[5..0]" (rect 0 0 82 12)(font "Arial" )) + (text "dealer_sum[5..0]" (rect 21 59 103 71)(font "Arial" )) (line (pt 0 64)(pt 16 64)(line_width 3)) ) (port - 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a/lab5/db/gA6_lab5.db_info b/lab5/db/gA6_lab5.db_info new file mode 100644 index 0000000..7442402 --- /dev/null +++ b/lab5/db/gA6_lab5.db_info @@ -0,0 +1,3 @@ +Quartus_Version = Version 13.0.0 Build 156 04/24/2013 SJ Web Edition +Version_Index = 302029824 +Creation_Time = Thu Nov 30 11:17:41 2017 diff --git a/lab5/db/gA6_lab5.eda.qmsg b/lab5/db/gA6_lab5.eda.qmsg new file mode 100644 index 0000000..ae6c072 --- /dev/null +++ b/lab5/db/gA6_lab5.eda.qmsg @@ -0,0 +1,5 @@ +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1511999705103 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus II 64-Bit " "Running Quartus II 64-Bit EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.0 Build 156 04/24/2013 SJ Web Edition " "Version 13.0.0 Build 156 04/24/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1511999705104 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Nov 29 18:55:04 2017 " "Processing started: Wed Nov 29 18:55:04 2017" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1511999705104 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1511999705104 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --functional=on --simulation=on --tool=modelsim_oem --format=verilog gA6_lab5 -c gA6_lab5 " "Command: quartus_eda --functional=on --simulation=on --tool=modelsim_oem --format=verilog gA6_lab5 -c gA6_lab5" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1511999705104 ""} +{ "Info" "IWSC_DONE_HDL_GENERATION" "gA6_lab5.vo C:/home/abbas/dsd_A6/lab5/simulation/modelsim/ simulation " "Generated file gA6_lab5.vo in folder \"C:/home/abbas/dsd_A6/lab5/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1511999705741 ""} +{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s Quartus II 64-Bit " "Quartus II 64-Bit EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "459 " "Peak virtual memory: 459 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1511999705844 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Nov 29 18:55:05 2017 " "Processing ended: Wed Nov 29 18:55:05 2017" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1511999705844 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1511999705844 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1511999705844 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1511999705844 ""} diff --git a/lab5/db/gA6_lab5.fit.qmsg b/lab5/db/gA6_lab5.fit.qmsg new file mode 100644 index 0000000..b0fb8d6 --- /dev/null +++ b/lab5/db/gA6_lab5.fit.qmsg @@ -0,0 +1,46 @@ +{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS_MORE_LOGICAL" "2 2 4 " "Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead." { } { } 0 11104 "Parallel Compilation has detected %3!i! hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use %1!i! of the %2!i! physical processors detected instead." 0 0 "Fitter" 0 -1 1511999669234 ""} +{ "Info" "IMPP_MPP_USER_DEVICE" "gA6_lab5 EP2C20F484C7 " "Selected device EP2C20F484C7 for design \"gA6_lab5\"" { } { } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1511999669244 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1511999669295 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1511999669296 ""} +{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1511999669389 ""} +{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." { } { } 0 292013 "Feature %1!s! is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." 0 0 "Fitter" 0 -1 1511999669403 ""} +{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C15AF484C7 " "Device EP2C15AF484C7 is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Quartus II" 0 -1 1511999670047 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C35F484C7 " "Device EP2C35F484C7 is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Quartus II" 0 -1 1511999670047 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C50F484C7 " "Device EP2C50F484C7 is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Quartus II" 0 -1 1511999670047 ""} } { } 2 176444 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "Fitter" 0 -1 1511999670047 ""} +{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "3 " "Fitter converted 3 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ C4 " "Pin ~ASDO~ is reserved at location C4" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { ~ASDO~ } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 154 9224 9983 0} } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1511999670049 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ C3 " "Pin ~nCSO~ is reserved at location C3" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { ~nCSO~ } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 155 9224 9983 0} } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1511999670049 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~LVDS91p/nCEO~ W20 " "Pin ~LVDS91p/nCEO~ is reserved at location W20" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { ~LVDS91p/nCEO~ } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { ~LVDS91p/nCEO~ } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 156 9224 9983 0} } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Quartus II" 0 -1 1511999670049 ""} } { } 0 169124 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "Fitter" 0 -1 1511999670049 ""} +{ "Critical Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "55 55 " "No exact pin location assignment(s) for 55 pins of 55 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "hit " "Pin hit not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { hit } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 160 384 560 176 "hit" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { hit } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 61 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "done " "Pin done not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { done } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 176 384 560 192 "done" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { done } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 65 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "player_wins " "Pin player_wins not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { player_wins } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 296 408 584 312 "player_wins" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { player_wins } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 66 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "dealer_wins " "Pin dealer_wins not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { dealer_wins } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 312 408 584 328 "dealer_wins" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { dealer_wins } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 67 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display1\[6\] " "Pin led_display1\[6\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display1[6] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 328 408 591 344 "led_display1" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display1[6] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 25 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display1\[5\] " "Pin led_display1\[5\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display1[5] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 328 408 591 344 "led_display1" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display1[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 26 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display1\[4\] " "Pin led_display1\[4\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display1[4] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 328 408 591 344 "led_display1" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display1[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 27 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display1\[3\] " "Pin led_display1\[3\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display1[3] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 328 408 591 344 "led_display1" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display1[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 28 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display1\[2\] " "Pin led_display1\[2\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display1[2] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 328 408 591 344 "led_display1" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display1[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 29 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display1\[1\] " "Pin led_display1\[1\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display1[1] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 328 408 591 344 "led_display1" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display1[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 30 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display1\[0\] " "Pin led_display1\[0\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display1[0] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 328 408 591 344 "led_display1" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display1[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 31 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display2\[6\] " "Pin led_display2\[6\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display2[6] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 344 408 591 360 "led_display2" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display2[6] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 32 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display2\[5\] " "Pin led_display2\[5\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display2[5] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 344 408 591 360 "led_display2" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display2[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 33 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display2\[4\] " "Pin led_display2\[4\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display2[4] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 344 408 591 360 "led_display2" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display2[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 34 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display2\[3\] " "Pin led_display2\[3\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display2[3] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 344 408 591 360 "led_display2" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display2[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 35 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display2\[2\] " "Pin led_display2\[2\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display2[2] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 344 408 591 360 "led_display2" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display2[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 36 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display2\[1\] " "Pin led_display2\[1\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display2[1] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 344 408 591 360 "led_display2" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display2[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 37 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display2\[0\] " "Pin led_display2\[0\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display2[0] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 344 408 591 360 "led_display2" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display2[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 38 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display3\[6\] " "Pin led_display3\[6\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display3[6] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 360 408 591 376 "led_display3" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display3[6] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 39 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display3\[5\] " "Pin led_display3\[5\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display3[5] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 360 408 591 376 "led_display3" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display3[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 40 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display3\[4\] " "Pin led_display3\[4\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display3[4] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 360 408 591 376 "led_display3" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display3[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 41 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display3\[3\] " "Pin led_display3\[3\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display3[3] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 360 408 591 376 "led_display3" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display3[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 42 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display3\[2\] " "Pin led_display3\[2\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display3[2] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 360 408 591 376 "led_display3" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display3[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 43 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display3\[1\] " "Pin led_display3\[1\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display3[1] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 360 408 591 376 "led_display3" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display3[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 44 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display3\[0\] " "Pin led_display3\[0\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display3[0] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 360 408 591 376 "led_display3" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display3[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 45 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display4\[6\] " "Pin led_display4\[6\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display4[6] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 376 408 591 392 "led_display4" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display4[6] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 46 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display4\[5\] " "Pin led_display4\[5\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display4[5] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 376 408 591 392 "led_display4" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display4[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 47 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display4\[4\] " "Pin led_display4\[4\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display4[4] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 376 408 591 392 "led_display4" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display4[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 48 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display4\[3\] " "Pin led_display4\[3\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display4[3] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 376 408 591 392 "led_display4" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display4[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 49 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display4\[2\] " "Pin led_display4\[2\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display4[2] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 376 408 591 392 "led_display4" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display4[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 50 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display4\[1\] " "Pin led_display4\[1\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display4[1] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 376 408 591 392 "led_display4" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display4[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 51 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "led_display4\[0\] " "Pin led_display4\[0\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { led_display4[0] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 376 408 591 392 "led_display4" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { led_display4[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 52 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "state_out\[1\] " "Pin state_out\[1\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { state_out[1] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 208 408 584 224 "state_out" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { state_out[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 53 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "state_out\[0\] " "Pin state_out\[0\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { state_out[0] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 208 408 584 224 "state_out" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { state_out[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 54 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum_out\[5\] " "Pin sum_out\[5\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum_out[5] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 192 408 584 208 "sum_out" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum_out[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 55 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum_out\[4\] " "Pin sum_out\[4\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum_out[4] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 192 408 584 208 "sum_out" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum_out[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 56 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum_out\[3\] " "Pin sum_out\[3\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum_out[3] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 192 408 584 208 "sum_out" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum_out[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 57 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum_out\[2\] " "Pin sum_out\[2\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum_out[2] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 192 408 584 208 "sum_out" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum_out[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 58 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum_out\[1\] " "Pin sum_out\[1\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum_out[1] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 192 408 584 208 "sum_out" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum_out[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 59 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum_out\[0\] " "Pin sum_out\[0\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum_out[0] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 192 408 584 208 "sum_out" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum_out[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 60 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum\[5\] " "Pin sum\[5\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum[5] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 208 8 176 224 "sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 13 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum\[4\] " "Pin sum\[4\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum[4] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 208 8 176 224 "sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 14 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum\[3\] " "Pin sum\[3\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum[3] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 208 8 176 224 "sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 15 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum\[2\] " "Pin sum\[2\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum[2] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 208 8 176 224 "sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 16 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum\[1\] " "Pin sum\[1\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum[1] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 208 8 176 224 "sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 17 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sum\[0\] " "Pin sum\[0\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { sum[0] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 208 8 176 224 "sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { sum[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 18 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "clk " "Pin clk not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { clk } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 80 192 360 96 "clk" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 62 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "rst " "Pin rst not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { rst } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 176 8 176 192 "rst" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { rst } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 63 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "player_sum\[5\] " "Pin player_sum\[5\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { player_sum[5] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 312 -144 40 328 "player_sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { player_sum[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 19 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "player_sum\[4\] " "Pin player_sum\[4\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { player_sum[4] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 312 -144 40 328 "player_sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { player_sum[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 20 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "player_sum\[3\] " "Pin player_sum\[3\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { player_sum[3] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 312 -144 40 328 "player_sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { player_sum[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 21 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "player_sum\[2\] " "Pin player_sum\[2\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { player_sum[2] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 312 -144 40 328 "player_sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { player_sum[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 22 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "player_sum\[1\] " "Pin player_sum\[1\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { player_sum[1] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 312 -144 40 328 "player_sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { player_sum[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 23 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "player_sum\[0\] " "Pin player_sum\[0\] not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { player_sum[0] } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 312 -144 40 328 "player_sum" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { player_sum[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 24 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "turn " "Pin turn not assigned to an exact location on the device" { } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { turn } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 192 8 176 208 "turn" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { turn } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 64 9224 9983 0} } } } } 0 169086 "Pin %1!s! not assigned to an exact location on the device" 0 0 "Quartus II" 0 -1 1511999670158 ""} } { } 1 169085 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0 "Fitter" 0 -1 1511999670158 ""} +{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "gA6_lab5.sdc " "Synopsys Design Constraints File file not found: 'gA6_lab5.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1511999670322 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1511999670323 ""} +{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." { } { } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1511999670326 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk (placed in PIN M1 (CLK2, LVDSCLK1p, Input)) " "Automatically promoted node clk (placed in PIN M1 (CLK2, LVDSCLK1p, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G3 " "Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G3" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1511999670346 ""} } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { clk } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 80 192 360 96 "clk" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 62 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1511999670346 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "rst (placed in PIN M2 (CLK3, LVDSCLK1n, Input)) " "Automatically promoted node rst (placed in PIN M2 (CLK3, LVDSCLK1n, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G1 " "Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G1" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Quartus II" 0 -1 1511999670346 ""} } { { "c:/altera/13.0/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/altera/13.0/quartus/bin64/pin_planner.ppl" { rst } } } { "gA6_lab5.bdf" "" { Schematic "C:/home/abbas/dsd_A6/lab5/gA6_lab5.bdf" { { 176 8 176 192 "rst" "" } } } } { "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/13.0/quartus/bin64/TimingClosureFloorplan.fld" "" "" { rst } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 0 { 0 ""} 0 63 9224 9983 0} } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1511999670346 ""} +{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" { } { } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1511999670438 ""} +{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Performing register packing on registers with non-logic cell location assignments" { } { } 1 176273 "Performing register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1511999670439 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Completed register packing on registers with non-logic cell location assignments" { } { } 1 176274 "Completed register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1511999670439 ""} +{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" { } { } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1511999670440 ""} +{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" { } { } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1511999670441 ""} +{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" { } { } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1511999670442 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" { } { } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1511999670442 ""} +{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" { } { } 1 176248 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1511999670442 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" { } { } 1 176249 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1511999670461 ""} +{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" { } { } 1 176219 "No registers were packed into other blocks" 0 0 "Quartus II" 0 -1 1511999670462 ""} } { } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1511999670462 ""} +{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "53 unused 3.3V 13 40 0 " "Number of I/O pins in group: 53 (unused VREF, 3.3V VCCIO, 13 input, 40 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "3.3-V LVTTL. " "I/O standards used: 3.3-V LVTTL." { } { } 0 176212 "I/O standards used: %1!s!" 0 0 "Quartus II" 0 -1 1511999670465 ""} } { } 0 176211 "Number of I/O pins in group: %1!d! (%2!s! VREF, %3!s! VCCIO, %4!d! input, %5!d! output, %6!d! bidirectional)" 0 0 "Quartus II" 0 -1 1511999670465 ""} } { } 0 176214 "Statistics of %1!s!" 0 0 "Fitter" 0 -1 1511999670465 ""} +{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use undetermined 2 39 " "I/O bank number 1 does not use VREF pins and has undetermined VCCIO pins. 2 total pin(s) used -- 39 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1511999670466 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use undetermined 2 31 " "I/O bank number 2 does not use VREF pins and has undetermined VCCIO pins. 2 total pin(s) used -- 31 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1511999670466 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use undetermined 0 43 " "I/O bank number 3 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used -- 43 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1511999670466 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use undetermined 0 40 " "I/O bank number 4 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used -- 40 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1511999670466 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "5 does not use undetermined 0 39 " "I/O bank number 5 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used -- 39 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1511999670466 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "6 does not use undetermined 1 35 " "I/O bank number 6 does not use VREF pins and has undetermined VCCIO pins. 1 total pin(s) used -- 35 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1511999670466 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "7 does not use undetermined 0 40 " "I/O bank number 7 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used -- 40 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1511999670466 ""} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "8 does not use undetermined 0 43 " "I/O bank number 8 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used -- 43 pins available" { } { } 0 176213 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used -- %5!d! pins available" 0 0 "Quartus II" 0 -1 1511999670466 ""} } { } 0 176214 "Statistics of %1!s!" 0 0 "Quartus II" 0 -1 1511999670466 ""} } { } 0 176215 "I/O bank details %1!s! I/O pin placement" 0 0 "Fitter" 0 -1 1511999670466 ""} +{ "Info" "IFITCC_FITTER_PREPARATION_END" "00:00:00 " "Fitter preparation operations ending: elapsed time is 00:00:00" { } { } 0 171121 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1511999670502 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" { } { } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1511999671704 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Fitter placement preparation operations ending: elapsed time is 00:00:00" { } { } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1511999671821 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" { } { } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1511999671834 ""} +{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" { } { } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1511999672662 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:01 " "Fitter placement operations ending: elapsed time is 00:00:01" { } { } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1511999672662 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" { } { } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1511999672748 ""} +{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 " "Router estimated average interconnect usage is 0% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "0 X0_Y0 X11_Y13 " "Router estimated peak interconnect usage is 0% of the available device resources in the region that extends from location X0_Y0 to location X11_Y13" { } { { "loc" "" { Generic "C:/home/abbas/dsd_A6/lab5/" { { 1 { 0 "Router estimated peak interconnect usage is 0% of the available device resources in the region that extends from location X0_Y0 to location X11_Y13"} { { 11 { 0 "Router estimated peak interconnect usage is 0% of the available device resources in the region that extends from location X0_Y0 to location X11_Y13"} 0 0 12 14 } } } } } } } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Quartus II" 0 -1 1511999674897 ""} } { } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1511999674897 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:02 " "Fitter routing operations ending: elapsed time is 00:00:02" { } { } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1511999675217 ""} +{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" { } { } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Quartus II" 0 -1 1511999675220 ""} } { } 0 170199 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1511999675220 ""} +{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "0.28 " "Total time spent on timing analysis during the Fitter is 0.28 seconds." { } { } 0 11888 "Total time spent on timing analysis during the Fitter is %1!s! seconds." 0 0 "Fitter" 0 -1 1511999675229 ""} +{ "Info" "IDAT_DAT_STARTED" "" "Started post-fitting delay annotation" { } { } 0 306004 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1511999675232 ""} +{ "Warning" "WDAT_NO_LOADING_SPECIFIED_ONE_OR_MORE_PINS" "40 " "Found 40 output pins without output pin load capacitance assignment" { { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "hit 0 " "Pin \"hit\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "done 0 " "Pin \"done\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "player_wins 0 " "Pin \"player_wins\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "dealer_wins 0 " "Pin \"dealer_wins\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display1\[6\] 0 " "Pin \"led_display1\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display1\[5\] 0 " "Pin \"led_display1\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display1\[4\] 0 " "Pin \"led_display1\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display1\[3\] 0 " "Pin \"led_display1\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display1\[2\] 0 " "Pin \"led_display1\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display1\[1\] 0 " "Pin \"led_display1\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display1\[0\] 0 " "Pin \"led_display1\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display2\[6\] 0 " "Pin \"led_display2\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display2\[5\] 0 " "Pin \"led_display2\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display2\[4\] 0 " "Pin \"led_display2\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display2\[3\] 0 " "Pin \"led_display2\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display2\[2\] 0 " "Pin \"led_display2\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display2\[1\] 0 " "Pin \"led_display2\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display2\[0\] 0 " "Pin \"led_display2\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display3\[6\] 0 " "Pin \"led_display3\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display3\[5\] 0 " "Pin \"led_display3\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display3\[4\] 0 " "Pin \"led_display3\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display3\[3\] 0 " "Pin \"led_display3\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display3\[2\] 0 " "Pin \"led_display3\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display3\[1\] 0 " "Pin \"led_display3\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display3\[0\] 0 " "Pin \"led_display3\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display4\[6\] 0 " "Pin \"led_display4\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display4\[5\] 0 " "Pin \"led_display4\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display4\[4\] 0 " "Pin \"led_display4\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display4\[3\] 0 " "Pin \"led_display4\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display4\[2\] 0 " "Pin \"led_display4\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display4\[1\] 0 " "Pin \"led_display4\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "led_display4\[0\] 0 " "Pin \"led_display4\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "state_out\[1\] 0 " "Pin \"state_out\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "state_out\[0\] 0 " "Pin \"state_out\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "sum_out\[5\] 0 " "Pin \"sum_out\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "sum_out\[4\] 0 " "Pin \"sum_out\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "sum_out\[3\] 0 " "Pin \"sum_out\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "sum_out\[2\] 0 " "Pin \"sum_out\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "sum_out\[1\] 0 " "Pin \"sum_out\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} { "Info" "IDAT_NO_LOADING_SPECIFIED_ON_PIN" "sum_out\[0\] 0 " "Pin \"sum_out\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0 306007 "Pin \"%1!s!\" has no specified output pin load capacitance -- assuming default load capacitance of %2!d! pF for timing analysis" 0 0 "Quartus II" 0 -1 1511999675237 ""} } { } 0 306006 "Found %1!d! output pins without output pin load capacitance assignment" 0 0 "Fitter" 0 -1 1511999675237 ""} +{ "Info" "IDAT_DAT_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 306005 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1511999675373 ""} +{ "Info" "IDAT_DAT_STARTED" "" "Started post-fitting delay annotation" { } { } 0 306004 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1511999675391 ""} +{ "Info" "IDAT_DAT_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 306005 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1511999675503 ""} +{ "Info" "IFITCC_FITTER_POST_OPERATION_END" "00:00:00 " "Fitter post-fit operations ending: elapsed time is 00:00:00" { } { } 0 11218 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1511999675838 ""} +{ "Warning" "WFIOMGR_RESERVE_ASSIGNMENT_FOR_UNUSED_PINS_IS_DEFAULT" "As output driving ground " "The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'." { } { } 0 169174 "The Reserve All Unused Pins setting has not been specified, and will default to '%1!s!'." 0 0 "Fitter" 0 -1 1511999675939 ""} +{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/home/abbas/dsd_A6/lab5/output_files/gA6_lab5.fit.smsg " "Generated suppressed messages file C:/home/abbas/dsd_A6/lab5/output_files/gA6_lab5.fit.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1511999676079 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 5 s Quartus II 64-Bit " "Quartus II 64-Bit Fitter was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "944 " "Peak virtual memory: 944 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1511999676412 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Nov 29 18:54:36 2017 " "Processing ended: Wed Nov 29 18:54:36 2017" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1511999676412 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:08 " "Elapsed time: 00:00:08" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1511999676412 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:09 " "Total CPU time (on all processors): 00:00:09" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1511999676412 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1511999676412 ""} diff --git a/lab5/db/gA6_lab5.hier_info b/lab5/db/gA6_lab5.hier_info new file mode 100644 index 0000000..356abaf --- /dev/null +++ b/lab5/db/gA6_lab5.hier_info @@ -0,0 +1,219 @@ +|gA6_lab5 +hit <= gA6_computer:inst.hit +clk => gA6_computer:inst.clk +clk => gA6_winner:inst1.clk +rst => gA6_computer:inst.rst +turn => gA6_computer:inst.turn +sum[0] => gA6_computer:inst.sum[0] +sum[1] => gA6_computer:inst.sum[1] +sum[2] => gA6_computer:inst.sum[2] +sum[3] => gA6_computer:inst.sum[3] +sum[4] => gA6_computer:inst.sum[4] +sum[5] => gA6_computer:inst.sum[5] +done <= gA6_computer:inst.done +player_wins <= gA6_winner:inst1.player_wins +player_sum[0] => gA6_winner:inst1.player_sum[0] +player_sum[1] => gA6_winner:inst1.player_sum[1] +player_sum[2] => gA6_winner:inst1.player_sum[2] +player_sum[3] => gA6_winner:inst1.player_sum[3] +player_sum[4] => gA6_winner:inst1.player_sum[4] +player_sum[5] => gA6_winner:inst1.player_sum[5] +dealer_wins <= gA6_winner:inst1.dealer_wins +led_display1[0] <= gA6_winner:inst1.led_display1[0] +led_display1[1] <= gA6_winner:inst1.led_display1[1] +led_display1[2] <= gA6_winner:inst1.led_display1[2] +led_display1[3] <= gA6_winner:inst1.led_display1[3] +led_display1[4] <= gA6_winner:inst1.led_display1[4] +led_display1[5] <= gA6_winner:inst1.led_display1[5] +led_display1[6] <= gA6_winner:inst1.led_display1[6] +led_display2[0] <= gA6_winner:inst1.led_display2[0] +led_display2[1] <= gA6_winner:inst1.led_display2[1] +led_display2[2] <= gA6_winner:inst1.led_display2[2] +led_display2[3] <= gA6_winner:inst1.led_display2[3] +led_display2[4] <= gA6_winner:inst1.led_display2[4] +led_display2[5] <= gA6_winner:inst1.led_display2[5] +led_display2[6] <= gA6_winner:inst1.led_display2[6] +led_display3[0] <= gA6_winner:inst1.led_display3[0] +led_display3[1] <= gA6_winner:inst1.led_display3[1] +led_display3[2] <= gA6_winner:inst1.led_display3[2] +led_display3[3] <= gA6_winner:inst1.led_display3[3] +led_display3[4] <= gA6_winner:inst1.led_display3[4] +led_display3[5] <= gA6_winner:inst1.led_display3[5] +led_display3[6] <= gA6_winner:inst1.led_display3[6] +led_display4[0] <= gA6_winner:inst1.led_display4[0] +led_display4[1] <= gA6_winner:inst1.led_display4[1] +led_display4[2] <= gA6_winner:inst1.led_display4[2] +led_display4[3] <= gA6_winner:inst1.led_display4[3] +led_display4[4] <= gA6_winner:inst1.led_display4[4] +led_display4[5] <= gA6_winner:inst1.led_display4[5] +led_display4[6] <= gA6_winner:inst1.led_display4[6] +state_out[0] <= gA6_computer:inst.state_out[0] +state_out[1] <= gA6_computer:inst.state_out[1] +sum_out[0] <= gA6_computer:inst.sum_out[0] +sum_out[1] <= gA6_computer:inst.sum_out[1] +sum_out[2] <= gA6_computer:inst.sum_out[2] +sum_out[3] <= gA6_computer:inst.sum_out[3] +sum_out[4] <= gA6_computer:inst.sum_out[4] +sum_out[5] <= gA6_computer:inst.sum_out[5] + + +|gA6_lab5|gA6_computer:inst +clk => sum_out[0]~reg0.CLK +clk => sum_out[1]~reg0.CLK +clk => sum_out[2]~reg0.CLK +clk => sum_out[3]~reg0.CLK +clk => sum_out[4]~reg0.CLK +clk => sum_out[5]~reg0.CLK +clk => done~reg0.CLK +clk => hit~reg0.CLK +clk => \computer:state[0].CLK +clk => \computer:state[1].CLK +rst => sum_out[0]~reg0.ACLR +rst => sum_out[1]~reg0.ACLR +rst => sum_out[2]~reg0.ACLR +rst => sum_out[3]~reg0.ACLR +rst => sum_out[4]~reg0.ACLR +rst => sum_out[5]~reg0.ACLR +rst => done~reg0.ACLR +rst => hit~reg0.ACLR +rst => \computer:state[0].ACLR +rst => \computer:state[1].ACLR +turn => state.OUTPUTSELECT +turn => state.OUTPUTSELECT +sum[0] => LessThan0.IN12 +sum[0] => sum_out[0]~reg0.DATAIN +sum[1] => LessThan0.IN11 +sum[1] => sum_out[1]~reg0.DATAIN +sum[2] => LessThan0.IN10 +sum[2] => sum_out[2]~reg0.DATAIN +sum[3] => LessThan0.IN9 +sum[3] => sum_out[3]~reg0.DATAIN +sum[4] => LessThan0.IN8 +sum[4] => sum_out[4]~reg0.DATAIN +sum[5] => LessThan0.IN7 +sum[5] => sum_out[5]~reg0.DATAIN +hit <= hit~reg0.DB_MAX_OUTPUT_PORT_TYPE +done <= done~reg0.DB_MAX_OUTPUT_PORT_TYPE +sum_out[0] <= sum_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE +sum_out[1] <= sum_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE +sum_out[2] <= sum_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE +sum_out[3] <= sum_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE +sum_out[4] <= sum_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE +sum_out[5] <= sum_out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE +state_out[0] <= \computer:state[0].DB_MAX_OUTPUT_PORT_TYPE +state_out[1] <= \computer:state[1].DB_MAX_OUTPUT_PORT_TYPE + + +|gA6_lab5|gA6_winner:inst1 +clk => led_display4[0]~reg0.CLK +clk => led_display4[1]~reg0.CLK +clk => led_display4[2]~reg0.CLK +clk => led_display4[3]~reg0.CLK +clk => led_display4[4]~reg0.CLK +clk => led_display4[5]~reg0.CLK +clk => led_display4[6]~reg0.CLK +clk => led_display3[0]~reg0.CLK +clk => led_display3[1]~reg0.CLK +clk => led_display3[2]~reg0.CLK +clk => led_display3[3]~reg0.CLK +clk => led_display3[4]~reg0.CLK +clk => led_display3[5]~reg0.CLK +clk => led_display3[6]~reg0.CLK +clk => led_display2[0]~reg0.CLK +clk => led_display2[1]~reg0.CLK +clk => led_display2[2]~reg0.CLK +clk => led_display2[3]~reg0.CLK +clk => led_display2[4]~reg0.CLK +clk => led_display2[5]~reg0.CLK +clk => led_display2[6]~reg0.CLK +clk => led_display1[0]~reg0.CLK +clk => led_display1[1]~reg0.CLK +clk => led_display1[2]~reg0.CLK +clk => led_display1[3]~reg0.CLK +clk => led_display1[4]~reg0.CLK +clk => led_display1[5]~reg0.CLK +clk => led_display1[6]~reg0.CLK +clk => dealer_wins~reg0.CLK +clk => player_wins~reg0.CLK +clk => \dealer:d_win.CLK +clk => \dealer:p_win.CLK +player_sum[0] => LessThan0.IN12 +player_sum[0] => LessThan2.IN6 +player_sum[0] => LessThan3.IN6 +player_sum[0] => Equal0.IN5 +player_sum[1] => LessThan0.IN11 +player_sum[1] => LessThan2.IN5 +player_sum[1] => LessThan3.IN5 +player_sum[1] => Equal0.IN4 +player_sum[2] => LessThan0.IN10 +player_sum[2] => LessThan2.IN4 +player_sum[2] => LessThan3.IN4 +player_sum[2] => Equal0.IN3 +player_sum[3] => LessThan0.IN9 +player_sum[3] => LessThan2.IN3 +player_sum[3] => LessThan3.IN3 +player_sum[3] => Equal0.IN2 +player_sum[4] => LessThan0.IN8 +player_sum[4] => LessThan2.IN2 +player_sum[4] => LessThan3.IN2 +player_sum[4] => Equal0.IN1 +player_sum[5] => LessThan0.IN7 +player_sum[5] => LessThan2.IN1 +player_sum[5] => LessThan3.IN1 +player_sum[5] => Equal0.IN0 +dealer_sum[0] => LessThan1.IN12 +dealer_sum[0] => LessThan2.IN12 +dealer_sum[0] => LessThan3.IN12 +dealer_sum[0] => Equal0.IN11 +dealer_sum[1] => LessThan1.IN11 +dealer_sum[1] => LessThan2.IN11 +dealer_sum[1] => LessThan3.IN11 +dealer_sum[1] => Equal0.IN10 +dealer_sum[2] => LessThan1.IN10 +dealer_sum[2] => LessThan2.IN10 +dealer_sum[2] => LessThan3.IN10 +dealer_sum[2] => Equal0.IN9 +dealer_sum[3] => LessThan1.IN9 +dealer_sum[3] => LessThan2.IN9 +dealer_sum[3] => LessThan3.IN9 +dealer_sum[3] => Equal0.IN8 +dealer_sum[4] => LessThan1.IN8 +dealer_sum[4] => LessThan2.IN8 +dealer_sum[4] => LessThan3.IN8 +dealer_sum[4] => Equal0.IN7 +dealer_sum[5] => LessThan1.IN7 +dealer_sum[5] => LessThan2.IN7 +dealer_sum[5] => LessThan3.IN7 +dealer_sum[5] => Equal0.IN6 +player_wins <= player_wins~reg0.DB_MAX_OUTPUT_PORT_TYPE +dealer_wins <= dealer_wins~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display1[0] <= led_display1[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display1[1] <= led_display1[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display1[2] <= led_display1[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display1[3] <= led_display1[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display1[4] <= led_display1[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display1[5] <= led_display1[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display1[6] <= led_display1[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display2[0] <= led_display2[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display2[1] <= led_display2[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display2[2] <= led_display2[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display2[3] <= led_display2[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display2[4] <= led_display2[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display2[5] <= led_display2[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display2[6] <= led_display2[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display3[0] <= led_display3[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display3[1] <= led_display3[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display3[2] <= led_display3[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display3[3] <= led_display3[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display3[4] <= led_display3[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display3[5] <= led_display3[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display3[6] <= led_display3[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display4[0] <= led_display4[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display4[1] <= led_display4[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display4[2] <= led_display4[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display4[3] <= led_display4[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display4[4] <= led_display4[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display4[5] <= led_display4[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE +led_display4[6] <= led_display4[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE + + diff --git a/lab5/db/gA6_lab5.hif b/lab5/db/gA6_lab5.hif new file mode 100644 index 0000000000000000000000000000000000000000..e6220c3ca6efbb357492763e23fa04fa9b9a8ca0 GIT binary patch literal 519 zcmV+i0{H!`4*>uG0001ZoXwI?Z<{a}#_yK)9W3>-9g^7)4D3cylCTljLXsUVW1GYh zg$_)ns@-=VkVMT?I`uMXvMt2>M}D54-){}8bW_71fMhb7Dh+nBs#RG)Y>v?w!D*v% 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HierarchyInputConstant InputUnused InputFloating InputOutputConstant OutputUnused OutputFloating OutputBidirConstant BidirUnused BidirInput only BidirOutput only Bidir
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inst90001000000000
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++----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Legal Partition Candidates ; ++-----------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+ +; Hierarchy ; Input ; Constant Input ; Unused Input ; Floating Input ; Output ; Constant Output ; Unused Output ; Floating Output ; Bidir ; Constant Bidir ; Unused Bidir ; Input only Bidir ; Output only Bidir ; ++-----------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+ +; inst1 ; 13 ; 0 ; 0 ; 0 ; 30 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; +; inst ; 9 ; 0 ; 0 ; 0 ; 10 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 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