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Refactoring of MVAU and VVAU #963
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mmrahorovic
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Xilinx:refactor/rtl_integration
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mmrahorovic:refactor/mvu_vvu
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be1503a
First changes to custom_op for RTL-based MVAU
mmrahorovic 8265985
Merge remote-tracking branch 'upstream/dev' into feature/dsp_packing
mmrahorovic afab9cd
[rtl custom op]: initial implementation of mvu_8sx9
mmrahorovic a94fc3b
[rtl custom op]: testbench for mvu_8sx9
mmrahorovic 98f9acc
[rtl custom op]: initial implementation of flow control component for…
mmrahorovic 96925a9
[rtl custom op]: implementation of replay buffer for mvu
mmrahorovic a3d1156
[rtl custom op]: testbench for mvu_8sx9_axi (including axi_wrapper & …
mmrahorovic 2aea664
[rtl custom op]: initial implementation of verilog wrapper for mvu_8s…
mmrahorovic c92e4e3
Merge remote-tracking branch 'upstream/dev' into feature/dsp_packing
mmrahorovic 8b57849
[rtl mvu]: fix tab indentation
mmrahorovic 5e61f42
[rtl custom op]: fix to indentation
mmrahorovic cbee193
[rtl custom-op]: minor changes for compiler integration
mmrahorovic ba5e77b
[rtl custom op]: moved testbenches to separate directory
mmrahorovic 69310b4
[rtl custom op]: fixed output width to ACCU_WIDTH
mmrahorovic cfcff00
[rtl custom op]: renamed file and added generic to switch between com…
mmrahorovic 72b5196
[rtl custom op]: renamed file and added generic to switch between com…
mmrahorovic c068bb6
[rtl mvu]: added behavioral model DSP58
mmrahorovic 18f94e7
[rtl mvu]: extended flow control wrapper with additional compute core…
mmrahorovic 6d4a0a7
[rtl mvu]: fix to done_len flag when SIMD dimension fully unrolled an…
mmrahorovic 90c547d
[rtl mvu tb]: updated testbench
mmrahorovic 0c37f1f
[builder]: added specialize_to_rtl step and changed standalone thresh…
mmrahorovic 5ccb016
[builder]: added specialize_to_rtl step
mmrahorovic f099f4b
[custom op]: added custom op MatrixVectorActivation_rtl
mmrahorovic 9a3b0fd
[custom op]: added additional attribute to enable conversion to RTL (…
mmrahorovic 38aa930
[custom op]: modified ip-stitching and code generation
mmrahorovic 4e44934
[tests]: initial version of unit test for RTL custom op and specializ…
mmrahorovic cc361d9
[rtl mvu]: specialized compute core for 4-bit weights and activations…
mmrahorovic 8eefb53
[rtl mvu]: specialized compute core for > 4-bit weights and activatio…
mmrahorovic e7109e7
[fpgadataflow transform]: initial specialize_to_rtl_layers-transform …
mmrahorovic d107b4d
Merge remote-tracking branch 'upstream/dev' into feature/dsp_packing
mmrahorovic 5a868d1
[rtl mvu] fixes for latest memstream + linting
maltanar 4a9cfa1
[rtl custom_op]: add support for external weights
mmrahorovic 8a9ac1a
Specify clock and reset associations of bus interfaces.
preusser 51bbe02
Merge remote-tracking branch 'upstream/dev' into feature/dsp_packing
mmrahorovic 3d856b7
Merge branch 'dev' into feature/dsp_packing
preusser d9b9079
[rtlmvu] More fixes for memstream and param gen
maltanar a5f2a83
[Build] apply config to only FIFO nodes in step_set_fifo_depths
maltanar 08cbdc5
Revised control interface attributes.
preusser 48f0c5c
Merge branch 'dev' into feature/dsp_packing
preusser d058cc2
Mask device primitives from Verilator in favor of using behavioral code.
preusser a66f38f
[Deps] update qonnx
maltanar 8f9bd04
Adding folding hints. Impl selection by case statement.
preusser 8799707
Merge branch 'feature/verilator_workarounds' into feature/dsp_packing
preusser 9de5ed6
Fixed behavioral sideband prediction.
preusser b6e92bb
Merge remote-tracking branch 'origin/feature/dsp_packing' into featur…
mmrahorovic 239759a
[rtl mvu]: extension to allow selecting PE values that are not multip…
mmrahorovic 8d3247c
[rtlmvu] Avoid unintentional verilator metacomments
maltanar ffc11d6
Merge remote-tracking branch 'origin/feature/dsp_packing' into featur…
mmrahorovic c866350
[rtl mvu]: extension to allow selecting PE values that are not multip…
mmrahorovic fd1e038
[rtl mvu axi]: updated comments on folding hints
mmrahorovic f60d4c6
[rtl custom op]: minor fixes to codegen
mmrahorovic a1ad304
[specialize-to-rtl]: add ram_style and rt_writeable_weights support
mmrahorovic 2cbb68f
[rtllib]: change string type to parameter type due to Vivado error
mmrahorovic 92eb0ed
[rtllib]: renamed variable for consistency
mmrahorovic 471a221
Fix improper blocking assignment & linting.
preusser 5c5dc09
[test rtl mvu]: modified/extended test cases
mmrahorovic b4eb9b6
[rtl mvu]: updated DSP58 >4-bit variant to lift SIMD%3==0 restriction
mmrahorovic ad63673
[rtl mvu]: bug fix for SIMD=1 init_leave_loads
mmrahorovic 79e8a5e
[mvu rtl]: restrict index i to be less than 3 (within bounds of hi4)
mmrahorovic 7be62b4
Merge remote-tracking branch 'upstream/dev' into feature/dsp_packing
mmrahorovic e3493c3
Rewrite replay_buffer for input elasticity.
preusser 44fae0c
Merge remote-tracking branch 'upstream/dev' into feature/dsp_packing
mmrahorovic df51f11
Merge remote-tracking branch 'upstream/dev' into feature/dsp_packing
mmrahorovic 2efba68
[to-rtl]: Infer unique node names after transformation is applied
mmrahorovic 114ea1b
[mvu rtl]: add synthesis directive to handle 'X in simulation
mmrahorovic 79fafdb
[replay buffer rtl]: minor fix to when LEN=1 (= AWIDTH=0)
mmrahorovic 619d9db
[mvu lut]: LUT-based MVU compute core
mmrahorovic 090f2ac
[custom op]: add preferred_backend attribute
mmrahorovic ac5e82d
Ensure a minimum of two buffer slots even for length-1 sequences.
preusser d5ff2a2
Merge pull request #1 from Xilinx/bugfix/replay_len1
mmrahorovic bb94092
Merge remote-tracking branch 'origin/feature/dsp_packing' into featur…
mmrahorovic 8515693
[rtl mvu wrapper]: support for vvu layer and rename
mmrahorovic cf28d78
[mvu vvu tb]: modified testbench to also support testing VVU on DSP58
mmrahorovic 2617c39
[axi wrapper]: minor modification to comment description
mmrahorovic 8ca5fe7
[mvu axi]: add support for VVU on DSP58
mmrahorovic 32d6338
[mvu vvu axi]: renamed file for consistency purposes
mmrahorovic 031406d
[mvu 8sx9]: added support for VVU on DSP58, resolved PyVerilator-caus…
mmrahorovic e2c1f15
[mvu vvu 8sx9]: renamed compute core for consistency
mmrahorovic adb5869
[axi wrapper]: changed parameter to localparam
mmrahorovic f54d438
[axi]: added support for LUT-based VVU
mmrahorovic a4e2ac7
[mvu vvu 8sx9]: minor change to list of generics
mmrahorovic 40ad0b4
[mvu lut]: added support for VVU
mmrahorovic 30fcb5b
[mvu vvu lut]: renamed file for consistency
mmrahorovic cb43438
Revert to proper address truncation without generation bit.
preusser b4b69f3
remove deletd/renamed files
mmrahorovic 14c5fa9
[mvu vvu 8sx9]: renamed for consistency
mmrahorovic 3a37588
[mvu vvu axi]: changes for renamed module
mmrahorovic afe36ba
[mvu vvu wrapper]: convert localparam to param
mmrahorovic e4f2f9e
[mvau-rtl custom-op]: bugfix to instantiate memstreamer, modified ren…
mmrahorovic b49b79a
[specialize to rtl]: fix to changed attribute name and added support …
mmrahorovic 9bdba03
Adding core for DSP48 backport.
preusser 2cf1ef7
[mvu rtl core]: added support for signed activations for DSP48-based …
mmrahorovic ab8d4a8
[rtl mvu custom-op]: add upper bound to SEGMENTLEN equal to number of…
mmrahorovic 5a429fc
[mvu_vvu dsp58]: change weight input to 2D instead of 3D array
mmrahorovic a4a18bb
[mvu_vvu axi]: re-wire weights appropriately for VVU DSP58
mmrahorovic cc0737b
[mvu_vvu axi wrapper]: fix to IS_MVU parameter
mmrahorovic c0eff0b
[mvu_vvu tb]: WIP -- changes to self-checker and shape of input data
mmrahorovic cf7f494
[mvu vvu axi]: minor bugfixes to enable VVU
mmrahorovic 5ffc221
[mvu vvu axi]: minor fix -- define mvauin_weight_t
mmrahorovic d573043
Merge remote-tracking branch 'upstream/dev' into feature/dsp_packing
mmrahorovic 40d652c
[rtl mvu op]: minor fix to chain length estimation and enabled behavi…
mmrahorovic 6e98bac
[rtlsim]: use pyverilator util functions
mmrahorovic 5dd74ad
[mvu vvu axi]: sign extend output tdata (byte-aligned)
mmrahorovic b20410b
[mvu core]: dsp48 convert unpacked array to packed array to work arou…
mmrahorovic 1c2cc0c
[mvu axi]: update list of deduced parameters
mmrahorovic eeb3cea
[mvu custom-op]: remove lut-based implementation and update compute c…
mmrahorovic 0813d14
[mvu axi]: remove LUT-based compute core
mmrahorovic 4892d66
[hls custom-op]: enable reset in sim
mmrahorovic 44f6e0f
[test mvu rtl]: updated test flow (DSP58 only)
mmrahorovic 9b2cceb
[mvu vvu axi]: reworked flow control and backpressure handling by tpr…
mmrahorovic 8b46c90
Merge remote-tracking branch 'origin/feature/dsp_packing' into refact…
mmrahorovic 4ab6596
[hlsbackend]: update limit HLS axi streams (8k-1)
mmrahorovic 3011144
Merge remote-tracking branch 'upstream/refactor/rtl_integration' into…
mmrahorovic c3ce0c6
Merge remote-tracking branch 'upstream/refactor/rtl_integration' into…
mmrahorovic 72ccc83
[mvau hls]: refactored MVAU_hls custom_op
mmrahorovic 7a9b82b
[refactor]: call to base_op_type method instead of custom_op type
mmrahorovic 4556d2d
[hls custom-op]: add mvau_hls
mmrahorovic 0b2fc98
[hw custom-op]: refactor MVAU
mmrahorovic 1a40e6a
[VVAU hw custom-op]: add base_op_type method
mmrahorovic 5e1ed9b
[transform]: add transformation to infer MVAU hw custom-op
mmrahorovic 63c73c2
removed mvu rtl code to clean up PR
mmrahorovic 472ce11
[test mvau]: modified to support new custom-ops
mmrahorovic 31083d5
removed rtl refactoring steps
mmrahorovic 0032743
removed old rtl custom-op
mmrahorovic 04ec562
removed old specialize_to_rtl transform
mmrahorovic de778cf
removed rtl custom-op test
mmrahorovic 4a47437
Merge remote-tracking branch 'upstream/refactor/rtl_integration' into…
mmrahorovic 911239c
[vvau hls]: add custom op to dict
mmrahorovic b1ee540
[vvu hw-op]: refactored hw custom-op VVAU
mmrahorovic bc44a4d
[vvau hls-op]: refactored HLS custom-op VVAU
mmrahorovic faabc0f
[convert-to-hw]: added transformations to infer binary-MVAU and VVAU
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This change looks like it has nothing to do with the new class hierarchy. Could you provide more information on this or take it out of the PR, please?
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That's correct, I'll remove it.
Nevertheless, do you think it's worth having this change upstream? My reasoning was that this particular transformation step (
step_set_fifo_depths
) should only affect the FIFOs as the name suggests. By passing an appropriatenode_filter
to the ApplyConfig transformation, we ensure that onlyStreamingFIFO
-nodes are affected. This could potentially prevent confusion/bug when the folding config file has changed after thestep_apply_folding_config
step.If so, I can create a separate PR with this change and a description.