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Refactoring of MVAU and VVAU #963
Refactoring of MVAU and VVAU #963
Commits on Jan 3, 2023
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Commits on May 8, 2023
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[rtl mvu]: extended flow control wrapper with additional compute core…
… and other minor changes
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[rtl mvu]: fix to done_len flag when SIMD dimension fully unrolled an…
…d PyVerilator-related syntax change
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[builder]: added specialize_to_rtl step and changed standalone thresh…
…old layers to be by default true
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[tests]: initial version of unit test for RTL custom op and specializ…
…e_to_rtl transformation for MVU
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[rtl mvu]: specialized compute core for 4-bit weights and activations…
… for DSP48/DSP58
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Commits on May 9, 2023
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Commits on May 24, 2023
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Commits on Jun 2, 2023
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Merge pull request #1 from Xilinx/bugfix/replay_len1
Ensure a minimum of two buffer slots even for length-1 sequences.
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[mvu 8sx9]: added support for VVU on DSP58, resolved PyVerilator-caus…
…ed error and added synthesis directive to handle 'X in input data
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Commits on Sep 25, 2023
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[mvau-rtl custom-op]: bugfix to instantiate memstreamer, modified ren…
…amed files and axi wrapper template fill-out
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[specialize to rtl]: fix to changed attribute name and added support …
…for converting HLS-based VVU custom-ops to RTL-based custom-ops
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[rtl mvu custom-op]: add upper bound to SEGMENTLEN equal to number of…
… DSP58s chained together
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Commits on Oct 13, 2023
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Commits on Nov 29, 2023
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[rtl mvu op]: minor fix to chain length estimation and enabled behavi…
…oral mode for rtl sim
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Commits on Jan 4, 2024
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Commits on Jan 8, 2024
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[mvu core]: dsp48 convert unpacked array to packed array to work arou…
…nd limitation on max array indices in Verilator
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Commits on Jan 11, 2024
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Commits on Jan 18, 2024
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Merge remote-tracking branch 'upstream/refactor/rtl_integration' into…
… refactor/mvu_vvu
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Commits on Jan 26, 2024
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Merge remote-tracking branch 'upstream/refactor/rtl_integration' into…
… refactor/mvu_vvu
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Commits on Feb 1, 2024
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Merge remote-tracking branch 'upstream/refactor/rtl_integration' into…
… refactor/mvu_vvu
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