diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md
index 4bf69d7ea..baba47066 100644
--- a/proposals/simd/BinarySIMD.md
+++ b/proposals/simd/BinarySIMD.md
@@ -262,4 +262,8 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
 | `i16x8.extadd_pairwise_i8x16_s` |     `TBD`| -                        |
 | `i16x8.extadd_pairwise_i8x16_u` |     `TBD`| -                        |
 | `i32x4.extadd_pairwise_i16x8_s` |     `TBD`| -                        |
-| `i32x4.extadd_pairwise_i16x8_u` |     `TBD`| -                        |
\ No newline at end of file
+| `i32x4.extadd_pairwise_i16x8_u` |     `TBD`| -                        |
+| `v8x16.signselect`              |     `TBD`| -                        |
+| `v16x8.signselect`              |     `TBD`| -                        |
+| `v32x4.signselect`              |     `TBD`| -                        |
+| `v64x2.signselect`              |     `TBD`| -                        |
diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md
index 69451b313..0c1037d09 100644
--- a/proposals/simd/ImplementationStatus.md
+++ b/proposals/simd/ImplementationStatus.md
@@ -231,6 +231,10 @@
 | `i16x8.extadd_pairwise_i8x16_u` |                           |                    |                    |                    |                    |
 | `i32x4.extadd_pairwise_i16x8_s` |                           |                    |                    |                    |                    |
 | `i32x4.extadd_pairwise_i16x8_u` |                           |                    |                    |                    |                    |
+| `v8x16.signselect`              |                           |                    |                    |                    |                    |
+| `v16x8.signselect`              |                           |                    |                    |                    |                    |
+| `v32x4.signselect`              |                           |                    |                    |                    |                    |
+| `v64x2.signselect`              |                           |                    |                    |                    |                    |
 
 [1] Tip of tree LLVM as of May 20, 2020
 
diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md
index c189f3c62..2edb5b43a 100644
--- a/proposals/simd/SIMD.md
+++ b/proposals/simd/SIMD.md
@@ -683,6 +683,18 @@ Note that the normal WebAssembly `select` instruction also works with vector
 types. It selects between two whole vectors controlled by a single scalar value,
 rather than selecting bits controlled by a control mask vector.
 
+### Sign select
+* `v8x16.signselect(v1: v128, v2: v128, c: v128) -> v128`
+* `v16x8.signselect(v1: v128, v2: v128, c: v128) -> v128`
+* `v32x4.signselect(v1: v128, v2: v128, c: v128) -> v128`
+* `v64x2.signselect(v1: v128, v2: v128, c: v128) -> v128`
+
+Use the sign bits in the control mask `c` to select the corresponding element
+from `v1` when 1 (negative sign) and `v2` when 0 (positive sign).
+
+Note that these instructions work for both signed integer and floating-point
+control masks.
+
 ### Lane-wise Population Count
 * `i8x16.popcnt(v: v128) -> v128`