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This repository has been archived by the owner on Dec 22, 2021. It is now read-only.
In SIMD instruction sets where integer arithmetic is really first-class, support for different bit width in different operands is not just an ad-hoc addition for a few instructions. Instead, generically most multiplication, addition, subtraction instructions support "long" and "widening" variants. In ARM parlance, "widening" means that one operand is narrower and gets widened to match the other, e.g. (widening addition, ARM SADDW)
int16 := int16 + int8
and "long" means that while both source operands are the same width, the result or accumulator is larger, e.g. (long addition, ARM SADDL)
int16 := int8 + int8
or (long multiply-add, ARM SMLAL)
int16 += int8 * int8
While some issues have been filed in the past to discuss a few specific cases, such as Issue #175 , such ad-hoc addition of a few instructions isn't going to solve the whole problem.
The text was updated successfully, but these errors were encountered:
In SIMD instruction sets where integer arithmetic is really first-class, support for different bit width in different operands is not just an ad-hoc addition for a few instructions. Instead, generically most multiplication, addition, subtraction instructions support "long" and "widening" variants. In ARM parlance, "widening" means that one operand is narrower and gets widened to match the other, e.g. (widening addition, ARM SADDW)
int16 := int16 + int8
and "long" means that while both source operands are the same width, the result or accumulator is larger, e.g. (long addition, ARM SADDL)
int16 := int8 + int8
or (long multiply-add, ARM SMLAL)
int16 += int8 * int8
While some issues have been filed in the past to discuss a few specific cases, such as Issue #175 , such ad-hoc addition of a few instructions isn't going to solve the whole problem.
The text was updated successfully, but these errors were encountered: