From 61be22f09d9f22d17d6b34f9366158002c8338ee Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Thu, 9 Feb 2023 11:48:02 +0100 Subject: [PATCH 01/93] card draft --- include/villas/fpga/card.hpp | 6 ++--- include/villas/fpga/platform_card.hpp | 28 +++++++++++++++++++ lib/CMakeLists.txt | 1 + lib/platform_card.cpp | 39 +++++++++++++++++++++++++++ 4 files changed, 70 insertions(+), 4 deletions(-) create mode 100644 include/villas/fpga/platform_card.hpp create mode 100644 lib/platform_card.cpp diff --git a/include/villas/fpga/card.hpp b/include/villas/fpga/card.hpp index f58a4c68..f9dc65a8 100644 --- a/include/villas/fpga/card.hpp +++ b/include/villas/fpga/card.hpp @@ -22,10 +22,7 @@ class Card { public: bool polling; - - std::string name; // The name of the FPGA card - std::shared_ptr vfioContainer; - std::shared_ptr vfioDevice; + std::shared_ptr vfioDevice; //? Only used by intc // Slave address space ID to access the PCIe address space from the // FPGA @@ -52,6 +49,7 @@ class Card std::map> memoryBlocksMapped; Logger logger; + }; } // namespace fpga diff --git a/include/villas/fpga/platform_card.hpp b/include/villas/fpga/platform_card.hpp new file mode 100644 index 00000000..d507c39d --- /dev/null +++ b/include/villas/fpga/platform_card.hpp @@ -0,0 +1,28 @@ +/** + * Author: Pascal Henry Bauer + * Based on the work of: Steffen Vogel and Daniel Krebs + * + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-License-Identifier: Apache-2.0 + *********************************************************************************/ + +#pragma once + +#include + +namespace villas { +namespace fpga { + +class PlatformCard : public Card +{ +public: + PlatformCard(std::shared_ptr vfioContainer); + ~PlatformCard(){}; + + static int Test(); + +private: +}; + +} /* namespace fpga */ +} /* namespace villas */ \ No newline at end of file diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt index 34d65d4c..d8ac0637 100644 --- a/lib/CMakeLists.txt +++ b/lib/CMakeLists.txt @@ -8,6 +8,7 @@ set(SOURCES vlnv.cpp card.cpp pcie_card.cpp + platform_card.cpp core.cpp node.cpp utils.cpp diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp new file mode 100644 index 00000000..cb58c9a9 --- /dev/null +++ b/lib/platform_card.cpp @@ -0,0 +1,39 @@ +/** + * Author: Pascal Henry Bauer + * Based on the work of: Steffen Vogel and Daniel Krebs + * + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC + * SPDX-License-Identifier: Apache-2.0 + *********************************************************************************/ + +#include + +using namespace villas; +using namespace villas::fpga; + +int PlatformCard::Test() +{ + auto vfioContainer = std::make_shared(); + + //const int IOMMU_GROUP = 2; + PlatformCard card = PlatformCard(vfioContainer); + + return 0; +} + +PlatformCard::PlatformCard(std::shared_ptr vfioContainer) +{ + this -> vfioContainer = vfioContainer; + + logger = villas::logging.get("PlatformCard"); + // logger->info("Initializing FPGA card {}", DEV_NAME); + + // Attach PCIe card to VFIO container + // vfioDevice = vfioContainer->attachDevice(DEV_NAME, DEV_GROUP); + + // // Enable memory access and PCI bus mastering for DMA + // if(not vfioDevice->pciEnable()) { + // logger->error("Failed to enable PCI device"); + // return false; + // } +} From 7ac4423248d1c8f33cc095b220de23b7ce66f578 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Thu, 9 Feb 2023 12:30:01 +0100 Subject: [PATCH 02/93] investigation --- lib/platform_card.cpp | 40 +++++++++++++++++++++++++++++----------- 1 file changed, 29 insertions(+), 11 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index cb58c9a9..a709b1ed 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -13,10 +13,37 @@ using namespace villas::fpga; int PlatformCard::Test() { + /* Factory + card->name = std::string(card_name); + card->vfioContainer = vc; + card->affinity = affinity; + card->doReset = do_reset != 0; + card->polling = (polling != 0); + card->pdev + { + pciDevice* lookupPci + { + std::make_shared(id, slot) + } + } + card -> init() + { + vfioDevice = vfioContainer->attachDevice(pdev); + vfioDevice->pciEnable() + } + card->ips = ip::CoreFactory::make(card.get(), json_ips); + + some messing with cores through getIp func + */ auto vfioContainer = std::make_shared(); + /* PCI System (finds Device for vfio) + + */ //const int IOMMU_GROUP = 2; - PlatformCard card = PlatformCard(vfioContainer); + + + + //PlatformCard card = PlatformCard(vfioContainer); return 0; } @@ -26,14 +53,5 @@ PlatformCard::PlatformCard(std::shared_ptr vfioContaine this -> vfioContainer = vfioContainer; logger = villas::logging.get("PlatformCard"); - // logger->info("Initializing FPGA card {}", DEV_NAME); - - // Attach PCIe card to VFIO container - // vfioDevice = vfioContainer->attachDevice(DEV_NAME, DEV_GROUP); - - // // Enable memory access and PCI bus mastering for DMA - // if(not vfioDevice->pciEnable()) { - // logger->error("Failed to enable PCI device"); - // return false; - // } + } From 3072fb33afcae027b5113e9d9b5cc1c0d0c649d8 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Thu, 9 Feb 2023 13:36:39 +0100 Subject: [PATCH 03/93] improved investigation --- lib/platform_card.cpp | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index a709b1ed..f7333db0 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -13,7 +13,16 @@ using namespace villas::fpga; int PlatformCard::Test() { - /* Factory + /* To investigate + -relation between vfio device and pci device + - vfio dev uses pci device as member + -> when is it accessed?? + + */ + + /* Report of dependencies to produce a minimal card example + + Factory in pcieCard: card->name = std::string(card_name); card->vfioContainer = vc; card->affinity = affinity; @@ -29,21 +38,20 @@ int PlatformCard::Test() card -> init() { vfioDevice = vfioContainer->attachDevice(pdev); + { IMPORTANT two implementations exist with overloaded parameters, PCI dev and some generic + >>> investigation <<< + } vfioDevice->pciEnable() } card->ips = ip::CoreFactory::make(card.get(), json_ips); + some messing with cores through getIp func */ + auto vfioContainer = std::make_shared(); + // xilinx-vdma a0000000.dma: Adding to iommu group 2 + const int IOMMU_GROUP = 2; + vfioContainer -> attachDevice("xilinx-vdma a0000000.dma", IOMMU_GROUP); - /* PCI System (finds Device for vfio) - - */ - //const int IOMMU_GROUP = 2; - - - - //PlatformCard card = PlatformCard(vfioContainer); return 0; } From c44fc786c3c0db1479b8802696c4b6ec0be914a3 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Thu, 9 Feb 2023 13:36:52 +0100 Subject: [PATCH 04/93] added Test --- src/villas-fpga-ctrl.cpp | 210 +++++++++++++++++++-------------------- 1 file changed, 103 insertions(+), 107 deletions(-) diff --git a/src/villas-fpga-ctrl.cpp b/src/villas-fpga-ctrl.cpp index ba332ce4..684f1775 100644 --- a/src/villas-fpga-ctrl.cpp +++ b/src/villas-fpga-ctrl.cpp @@ -33,6 +33,8 @@ #include #include +#include + using namespace villas; static std::shared_ptr pciDevices; @@ -172,111 +174,105 @@ void readFromDmaToStdOut( } } -int main(int argc, char *argv[]) { - // Command Line Parser - CLI::App app{"VILLASfpga data output"}; - - try { - std::string configFile; - app.add_option("-c,--config", configFile, "Configuration file") - ->check(CLI::ExistingFile); - - std::string fpgaName = "vc707"; - app.add_option("--fpga", fpgaName, "Which FPGA to use"); - std::vector connectStr; - app.add_option("-x,--connect", connectStr, - "Connect a FPGA port with another or stdin/stdout"); - bool noDma = false; - app.add_flag("--no-dma", noDma, - "Do not setup DMA, only setup FPGA and Crossbar links"); - std::string outputFormat = "short"; - app.add_option("--output-format", outputFormat, - "Output format (short, long)"); - bool dumpGraph = false; - app.add_flag("--dump-graph", dumpGraph, - "Dumps the graph of memory regions into \"graph.dot\""); - bool dumpAuroraChannels = true; - app.add_flag("--dump-aurora", dumpAuroraChannels, - "Dumps the detected Aurora channels."); - app.parse(argc, argv); - - // Logging setup - - logging.setLevel(spdlog::level::debug); - fpga::setupColorHandling(); - - if (configFile.empty()) { - logger->error( - "No configuration file provided/ Please use -c/--config argument"); - return 1; - } - - auto card = fpga::setupFpgaCard(configFile, fpgaName); - - if (dumpGraph) { - auto &mm = MemoryManager::get(); - mm.getGraph().dump("graph.dot"); - } - - if (dumpAuroraChannels) { - auto aurora_channels = getAuroraChannels(card); - for (auto aurora : *aurora_channels) - aurora->dump(); - } - bool writeToStdout = false; - bool readFromStdin = false; - // Configure Crossbar switch - for (std::string str : connectStr) { - const fpga::ConnectString parsedConnectString(str); - parsedConnectString.configCrossBar(card); - if (parsedConnectString.isSrcStdin()) { - readFromStdin = true; - if (parsedConnectString.isBidirectional()) { - writeToStdout = true; - } - } - if (parsedConnectString.isDstStdout()) { - writeToStdout = true; - if (parsedConnectString.isBidirectional()) { - readFromStdin = true; - } - } - } - if (writeToStdout || readFromStdin) { - auto dma = std::dynamic_pointer_cast( - card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:"))); - if (dma == nullptr) { - logger->error("No DMA found on FPGA "); - throw std::runtime_error("No DMA found on FPGA"); - } - std::unique_ptr stdInThread = nullptr; - if (!noDma && writeToStdout) { - auto formatter = fpga::getBufferedSampleFormatter(outputFormat, 16); - // We copy the dma shared ptr but move the fomatter unqiue ptr as we don't need it - // in this thread anymore - stdInThread = std::make_unique(readFromDmaToStdOut, dma, - std::move(formatter)); - } - if (!noDma && readFromStdin) { - writeToDmaFromStdIn(dma); - } - - if (stdInThread) { - stdInThread->join(); - } - } - } catch (const RuntimeError &e) { - logger->error("Error: {}", e.what()); - return -1; - } catch (const CLI::ParseError &e) { - return app.exit(e); - } catch (const std::exception &e) { - logger->error("Error: {}", e.what()); - return -1; - } catch (...) { - logger->error("Unknown error"); - return -1; - } - - return 0; +int main() +{ + return fpga::PlatformCard::Test(); + + /* + // Command Line Parser + CLI::App app{"VILLASfpga data output"}; + + try { + std::string configFile; + app.add_option("-c,--config", configFile, "Configuration file") + ->check(CLI::ExistingFile); + + std::string fpgaName = "vc707"; + app.add_option("--fpga", fpgaName, "Which FPGA to use"); + std::string connectStr = ""; + app.add_option("-x,--connect", connectStr, "Connect a FPGA port with another or stdin/stdout"); + bool noDma = false; + app.add_flag("--no-dma", noDma, "Do not setup DMA, only setup FPGA and Crossbar links"); + std::string outputFormat = "short"; + app.add_option("--output-format", outputFormat, "Output format (short, long)"); + bool dumpGraph = false; + app.add_flag("--dump-graph", dumpGraph, "Dumps the graph of memory regions into \"graph.dot\""); + bool dumpAuroraChannels = true; + app.add_flag("--dump-aurora", dumpAuroraChannels, "Dumps the detected Aurora channels."); + app.parse(argc, argv); + + // Logging setup + + logging.setLevel(spdlog::level::debug); + fpga::setupColorHandling(); + + if (configFile.empty()) { + logger->error("No configuration file provided/ Please use -c/--config argument"); + return 1; + } + + auto card = fpga::setupFpgaCard(configFile, fpgaName); + + std::vector> aurora_channels; + for (int i = 0; i < 4; i++) { + auto name = fmt::format("aurora_8b10b_ch{}", i); + auto id = fpga::ip::IpIdentifier("xilinx.com:ip:aurora_8b10b:", name); + auto aurora = std::dynamic_pointer_cast(card->lookupIp(id)); + if (aurora == nullptr) { + logger->error("No Aurora interface found on FPGA"); + return 1; + } + + aurora_channels.push_back(aurora); + } + + auto dma = std::dynamic_pointer_cast + (card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:"))); + if (dma == nullptr) { + logger->error("No DMA found on FPGA "); + return 1; + } + + if (dumpGraph) { + auto &mm = MemoryManager::get(); + mm.getGraph().dump("graph.dot"); + } + + if (dumpAuroraChannels) { + for (auto aurora : aurora_channels) + aurora->dump(); + } + // Configure Crossbar switch + const fpga::ConnectString parsedConnectString(connectStr); + parsedConnectString.configCrossBar(dma, aurora_channels); + + std::unique_ptr stdInThread = nullptr; + if (!noDma && parsedConnectString.isDstStdout()) { + auto formatter = fpga::getBufferedSampleFormatter(outputFormat, 16); + // We copy the dma shared ptr but move the fomatter unqiue ptr as we don't need it + // in this thread anymore + stdInThread = std::make_unique(readFromDmaToStdOut, dma, std::move(formatter)); + } + if (!noDma && parsedConnectString.isSrcStdin()) { + writeToDmaFromStdIn(dma); + } + + if (stdInThread) { + stdInThread->join(); + } + } catch (const RuntimeError &e) { + logger->error("Error: {}", e.what()); + return -1; + } catch (const CLI::ParseError &e) { + return app.exit(e); + } catch (const std::exception &e) { + logger->error("Error: {}", e.what()); + return -1; + } catch (...) { + logger->error("Unknown error"); + return -1; + } + + return 0; + */ } From 6a7113f90af2954b93bff79ad89da84b4bdb863f Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 10 Feb 2023 14:38:42 +0100 Subject: [PATCH 05/93] added comment --- lib/platform_card.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index f7333db0..a3e41089 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -48,7 +48,7 @@ int PlatformCard::Test() */ auto vfioContainer = std::make_shared(); - // xilinx-vdma a0000000.dma: Adding to iommu group 2 + // DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 const int IOMMU_GROUP = 2; vfioContainer -> attachDevice("xilinx-vdma a0000000.dma", IOMMU_GROUP); From 1b9a0599388be0b0a0a026733b0ea89cb2c86fc9 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 10 Feb 2023 14:39:43 +0100 Subject: [PATCH 06/93] added format file to gitignore --- .gitignore | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.gitignore b/.gitignore index 97d5b8e0..e9b540fe 100644 --- a/.gitignore +++ b/.gitignore @@ -11,3 +11,5 @@ build/ *.so *.user graph.dot + +.clang-format \ No newline at end of file From 52fcc6420baad1a80598439521d88dc9414af99c Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 10 Feb 2023 14:40:08 +0100 Subject: [PATCH 07/93] change submodule branch --- .gitmodules | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitmodules b/.gitmodules index c12e2121..65586052 100644 --- a/.gitmodules +++ b/.gitmodules @@ -6,6 +6,7 @@ [submodule "common"] path = common url = https://github.com/VILLASframework/common.git + branch = feature/vfioPlatform [submodule "thirdparty/libxil"] path = thirdparty/libxil url = https://github.com/VILLASframework/libxil.git From e92c825307871c6311c92a376cd3d2ab9882b0ae Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 10 Feb 2023 14:51:56 +0100 Subject: [PATCH 08/93] added warnings coreguidlines --- .gitlab-ci.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index fdb4c4a9..f94c6b49 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -66,7 +66,7 @@ test:cppcheck: --error-exitcode=1 --quiet --inline-suppr - --enable=warning,performance,portability,information,missingInclude + --enable=cppcoreguidelines,warning,performance,portability,information,missingInclude --std=c++11 --suppress=noValidConfiguration -I include From 7242dea68671ab9b11634c6898a3712480d63cdf Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 24 Feb 2023 14:13:21 +0100 Subject: [PATCH 09/93] new vfio test --- lib/platform_card.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index a3e41089..252fa966 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -50,7 +50,9 @@ int PlatformCard::Test() auto vfioContainer = std::make_shared(); // DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 const int IOMMU_GROUP = 2; - vfioContainer -> attachDevice("xilinx-vdma a0000000.dma", IOMMU_GROUP); + unique_ptr group = make_unique(IOMMU_GROUP, true); + //vfioContainer -> attachGroup() + //vfioContainer -> attachDevice("xilinx-vdma a0000000.dma", IOMMU_GROUP); return 0; From d0551417a717f82ad4bc9bdf2968e1e2dd367c8a Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 24 Feb 2023 14:19:05 +0100 Subject: [PATCH 10/93] fixed syntax --- lib/platform_card.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 252fa966..4e8fa00b 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -50,7 +50,7 @@ int PlatformCard::Test() auto vfioContainer = std::make_shared(); // DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 const int IOMMU_GROUP = 2; - unique_ptr group = make_unique(IOMMU_GROUP, true); + auto group = std::make_unique(IOMMU_GROUP, true); //vfioContainer -> attachGroup() //vfioContainer -> attachDevice("xilinx-vdma a0000000.dma", IOMMU_GROUP); From 9e718d19c92cc6c052b278a8c11e1dbfe2fe6ab3 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 24 Feb 2023 14:26:44 +0100 Subject: [PATCH 11/93] revert pipe --- src/villas-fpga-ctrl.cpp | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/src/villas-fpga-ctrl.cpp b/src/villas-fpga-ctrl.cpp index 684f1775..6f979a4a 100644 --- a/src/villas-fpga-ctrl.cpp +++ b/src/villas-fpga-ctrl.cpp @@ -33,8 +33,6 @@ #include #include -#include - using namespace villas; static std::shared_ptr pciDevices; @@ -174,11 +172,8 @@ void readFromDmaToStdOut( } } -int main() +int main(int argc, char* argv[]) { - return fpga::PlatformCard::Test(); - - /* // Command Line Parser CLI::App app{"VILLASfpga data output"}; @@ -274,5 +269,4 @@ int main() } return 0; - */ } From 0162b3f9877c368c9f684bccda370e1b85e17dd8 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 24 Feb 2023 14:32:07 +0100 Subject: [PATCH 12/93] platform test to own file --- src/CMakeLists.txt | 5 +++++ src/platform.cpp | 12 ++++++++++++ 2 files changed, 17 insertions(+) create mode 100644 src/platform.cpp diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 2d158b2f..be2bab5b 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -17,4 +17,9 @@ target_link_libraries(villas-fpga-pipe PUBLIC ) +add_executable(platform platform.cpp) +target_link_libraries(platform PUBLIC + villas-fpga +) + add_executable(pcimem pcimem.c) diff --git a/src/platform.cpp b/src/platform.cpp new file mode 100644 index 00000000..17a0303a --- /dev/null +++ b/src/platform.cpp @@ -0,0 +1,12 @@ + +#include + +using namespace villas::fpga; + +int main() +{ + PlatformCard::Test(); + + return 0; +} + From cd6ce679cab558d5b15b181f71cb59af9f6c5585 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 10 Mar 2023 13:55:49 +0100 Subject: [PATCH 13/93] added missing var --- include/villas/fpga/card.hpp | 1 + 1 file changed, 1 insertion(+) diff --git a/include/villas/fpga/card.hpp b/include/villas/fpga/card.hpp index f9dc65a8..2fbf6001 100644 --- a/include/villas/fpga/card.hpp +++ b/include/villas/fpga/card.hpp @@ -22,6 +22,7 @@ class Card { public: bool polling; + std::shared_ptr vfioContainer; std::shared_ptr vfioDevice; //? Only used by intc // Slave address space ID to access the PCIe address space from the From 48cabfe46779b0c50147afe34df59181d829ec5e Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 10 Mar 2023 14:35:32 +0100 Subject: [PATCH 14/93] added vfio bind script --- scripts/bind_platform_vfio.sh | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 scripts/bind_platform_vfio.sh diff --git a/scripts/bind_platform_vfio.sh b/scripts/bind_platform_vfio.sh new file mode 100644 index 00000000..9bcee4cb --- /dev/null +++ b/scripts/bind_platform_vfio.sh @@ -0,0 +1,14 @@ +#!/bin/bash +# +# Bind Platform fpga to vfio +# +# Author: Pascal Bauer +# SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC +# SPDX-License-Identifier: Apache-2.0 +################################################################################## + +# Unbind Device from driver +echo a0000000.dma > /sys/bus/platform/drivers/xilinx-vdma/unbind +# Bind device +echo vfio-platform > /sys/bus/platform/devices/a0000000.dma/driver_override +echo a0000000.dma > /sys/bus/platform/drivers/vfio-platform/bind From 05ef8d8acb35dc9c899826a2b825939531a86eeb Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 10 Mar 2023 19:17:22 +0100 Subject: [PATCH 15/93] removed faulty error handling --- lib/platform_card.cpp | 81 ++++++++++++++++++++++--------------------- 1 file changed, 42 insertions(+), 39 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 4e8fa00b..4a5fb20d 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -1,9 +1,10 @@ -/** +/** * Author: Pascal Henry Bauer - * Based on the work of: Steffen Vogel and Daniel Krebs + * Based on the work of: Steffen Vogel and Daniel Krebs + * * - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, EONERC - * SPDX-License-Identifier: Apache-2.0 + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power + *Systems, EONERC SPDX-License-Identifier: Apache-2.0 *********************************************************************************/ #include @@ -13,55 +14,57 @@ using namespace villas::fpga; int PlatformCard::Test() { - /* To investigate - -relation between vfio device and pci device - - vfio dev uses pci device as member - -> when is it accessed?? - - */ + /* To investigate + -relation between vfio device and pci device + - vfio dev uses pci device as member + -> when is it accessed?? - /* Report of dependencies to produce a minimal card example + */ - Factory in pcieCard: - card->name = std::string(card_name); - card->vfioContainer = vc; - card->affinity = affinity; - card->doReset = do_reset != 0; - card->polling = (polling != 0); - card->pdev - { - pciDevice* lookupPci + /* Report of dependencies to produce a minimal card example + + Factory in pcieCard: + card->name = std::string(card_name); + card->vfioContainer = vc; + card->affinity = affinity; + card->doReset = do_reset != 0; + card->polling = (polling != 0); + card->pdev { - std::make_shared(id, slot) + pciDevice* lookupPci + { + std::make_shared(id, slot) + } } - } - card -> init() - { - vfioDevice = vfioContainer->attachDevice(pdev); - { IMPORTANT two implementations exist with overloaded parameters, PCI dev and some generic - >>> investigation <<< + card -> init() + { + vfioDevice = vfioContainer->attachDevice(pdev); + { IMPORTANT two implementations exist with overloaded + parameters, PCI dev and some generic + >>> investigation <<< + } + vfioDevice->pciEnable() } - vfioDevice->pciEnable() - } - card->ips = ip::CoreFactory::make(card.get(), json_ips); - + some messing with cores through getIp func - */ - + card->ips = ip::CoreFactory::make(card.get(), json_ips); + + some messing with cores through getIp func + */ + auto vfioContainer = std::make_shared(); // DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 const int IOMMU_GROUP = 2; auto group = std::make_unique(IOMMU_GROUP, true); - //vfioContainer -> attachGroup() - //vfioContainer -> attachDevice("xilinx-vdma a0000000.dma", IOMMU_GROUP); - + // vfioContainer -> attachGroup() + // vfioContainer -> attachDevice("xilinx-vdma a0000000.dma", + // IOMMU_GROUP); return 0; } -PlatformCard::PlatformCard(std::shared_ptr vfioContainer) + +PlatformCard::PlatformCard( + std::shared_ptr vfioContainer) { - this -> vfioContainer = vfioContainer; + this->vfioContainer = vfioContainer; logger = villas::logging.get("PlatformCard"); - } From dd36342f6bd7b229372dc84d6feb245a902eb631 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Tue, 14 Mar 2023 13:37:57 +0100 Subject: [PATCH 16/93] changed order --- lib/platform_card.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 4a5fb20d..572a1505 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -49,18 +49,18 @@ int PlatformCard::Test() + some messing with cores through getIp func */ - auto vfioContainer = std::make_shared(); // DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 + + const int IOMMU_GROUP = 2; - auto group = std::make_unique(IOMMU_GROUP, true); - // vfioContainer -> attachGroup() - // vfioContainer -> attachDevice("xilinx-vdma a0000000.dma", - // IOMMU_GROUP); + auto group = std::make_shared(IOMMU_GROUP, true); + + auto vfioContainer = std::make_shared(); + vfioContainer->attachGroup(group); return 0; } - PlatformCard::PlatformCard( std::shared_ptr vfioContainer) { From 70f6aca20dcd734868e6d734c6db2a43d196371c Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Tue, 14 Mar 2023 14:08:17 +0100 Subject: [PATCH 17/93] add vfioDevice --- lib/platform_card.cpp | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 572a1505..fb9f9cfa 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -51,10 +51,14 @@ int PlatformCard::Test() // DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 - const int IOMMU_GROUP = 2; auto group = std::make_shared(IOMMU_GROUP, true); + auto device = std::make_shared( + "xilinx-vdma a0000000.dma", + group->getFileDescriptor()); + group->attachDevice(device); + auto vfioContainer = std::make_shared(); vfioContainer->attachGroup(group); From cf7624ee31b2ea9470dbb3948cfa668804ae44d8 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Tue, 14 Mar 2023 14:33:07 +0100 Subject: [PATCH 18/93] changed method to attachDevice --- lib/platform_card.cpp | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index fb9f9cfa..fd00637c 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -50,17 +50,19 @@ int PlatformCard::Test() */ // DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 - const int IOMMU_GROUP = 2; - auto group = std::make_shared(IOMMU_GROUP, true); + // auto group = std::make_shared(IOMMU_GROUP, true); + + // auto device = std::make_shared( + // "xilinx-vdma a0000000.dma", + // group->getFileDescriptor()); + // group->attachDevice(device); - auto device = std::make_shared( - "xilinx-vdma a0000000.dma", - group->getFileDescriptor()); - group->attachDevice(device); + // auto vfioContainer = std::make_shared(); + // vfioContainer->attachGroup(group); auto vfioContainer = std::make_shared(); - vfioContainer->attachGroup(group); + vfioContainer->attachDevice("a0000000.dma", IOMMU_GROUP); return 0; } From adb870e531af5be8c6aa0e79a22dc8d002554173 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Tue, 14 Mar 2023 16:16:03 +0100 Subject: [PATCH 19/93] manual approach --- lib/platform_card.cpp | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index fd00637c..56c46b6b 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -51,18 +51,16 @@ int PlatformCard::Test() // DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 const int IOMMU_GROUP = 2; - // auto group = std::make_shared(IOMMU_GROUP, true); - - // auto device = std::make_shared( - // "xilinx-vdma a0000000.dma", - // group->getFileDescriptor()); - // group->attachDevice(device); - - // auto vfioContainer = std::make_shared(); - // vfioContainer->attachGroup(group); + const char* DEV_NAME = "a0000000.dma"; + auto group = std::make_shared(IOMMU_GROUP, true); auto vfioContainer = std::make_shared(); - vfioContainer->attachDevice("a0000000.dma", IOMMU_GROUP); + vfioContainer->attachGroup(group); + + auto device = std::make_shared( + DEV_NAME, + group->getFileDescriptor()); + group->attachDevice(device); return 0; } From af56313438542d6bc3554771ca96d058a88dd9b3 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Thu, 23 Mar 2023 20:36:51 +0100 Subject: [PATCH 20/93] added platform factory --- include/villas/fpga/platform_card.hpp | 8 + lib/platform_card.cpp | 209 +++++++++++++++++++++++++- 2 files changed, 209 insertions(+), 8 deletions(-) diff --git a/include/villas/fpga/platform_card.hpp b/include/villas/fpga/platform_card.hpp index d507c39d..60649c82 100644 --- a/include/villas/fpga/platform_card.hpp +++ b/include/villas/fpga/platform_card.hpp @@ -19,10 +19,18 @@ class PlatformCard : public Card PlatformCard(std::shared_ptr vfioContainer); ~PlatformCard(){}; + void connect(); + static int Test(); private: }; +class PlatformCardFactory +{ +public: + static std::list> make(json_t *json, std::shared_ptr vc); +}; + } /* namespace fpga */ } /* namespace villas */ \ No newline at end of file diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 56c46b6b..a43500b3 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -9,6 +9,12 @@ #include +#include +#include +#include +#include +#include + using namespace villas; using namespace villas::fpga; @@ -50,25 +56,212 @@ int PlatformCard::Test() */ // DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 + + // Parse FPGA configuration + + const std::string CONFIG_FILE_PATH = "config.json"; + FILE *f = fopen(CONFIG_FILE_PATH.c_str(), "r"); + + if(!f) + throw RuntimeError("Cannot open config file: {}", + CONFIG_FILE_PATH); + + json_t *json = json_loadf(f, 0, nullptr); + if(!json) { + fclose(f); + throw RuntimeError("Cannot parse JSON config"); + } + + fclose(f); + + json_t *fpgas = json_object_get(json, "fpgas"); + if(fpgas == nullptr) { + exit(1); + } + + auto vc = std::make_shared(); + PlatformCardFactory::make(json, vc); + + return 0; +} + +PlatformCard::PlatformCard( + std::shared_ptr vfioContainer) +{ + this->vfioContainer = vfioContainer; + + logger = villas::logging.get("PlatformCard"); +} + +void PlatformCard::connect() +{ const int IOMMU_GROUP = 2; - const char* DEV_NAME = "a0000000.dma"; + const char *DEV_NAME = "a0000000.dma"; auto group = std::make_shared(IOMMU_GROUP, true); - auto vfioContainer = std::make_shared(); vfioContainer->attachGroup(group); auto device = std::make_shared( DEV_NAME, group->getFileDescriptor()); group->attachDevice(device); - - return 0; } -PlatformCard::PlatformCard( - std::shared_ptr vfioContainer) +std::list > +PlatformCardFactory::make(json_t *json, + std::shared_ptr vc) { - this->vfioContainer = vfioContainer; + std::list > cards; - logger = villas::logging.get("PlatformCard"); + const char *card_name; + json_t *json_card; + json_object_foreach(json, card_name, json_card) + { + json_t *json_ips = nullptr; + json_t *json_paths = nullptr; + const char *pci_slot = nullptr; + const char *pci_id = nullptr; + int do_reset = 0; + int affinity = 0; + int polling = 0; + + json_error_t err; + int ret = json_unpack_ex( + json_card, + &err, + 0, + "{ s: o, s?: i, s?: b, s?: s, s?: s, s?: b, s?: o }", + "ips", + &json_ips, + "affinity", + &affinity, + "do_reset", + &do_reset, + "slot", + &pci_slot, + "id", + &pci_id, + "polling", + &polling, + "paths", + &json_paths); + + if(ret != 0) { + throw ConfigError(json_card, + err, + "", + "Failed to parse card"); + } + + auto card = std::make_unique(vc); + card->polling = (polling != 0); + + card->connect(); + + // Load IPs from a separate json file + if(json_is_string(json_ips)) { + auto json_ips_fn = json_string_value(json_ips); + json_ips = json_load_file(json_ips_fn, 0, nullptr); + if(json_ips == nullptr) + throw ConfigError( + json_ips, + "node-config-fpga-ips", + "Failed to load FPGA IP cores from {}", + json_ips_fn); + } + + if(not json_is_object(json_ips)) + throw ConfigError( + json_ips, + "node-config-fpga-ips", + "FPGA IP core list must be an object!"); + + card->ips = ip::CoreFactory::make(card.get(), json_ips); + if(card->ips.empty()) + throw ConfigError( + json_ips, + "node-config-fpga-ips", + "Cannot initialize IPs of FPGA card {}", + card_name); + + // Additional static paths for AXI-Steram switch + if(json_paths != nullptr) { + if(not json_is_array(json_paths)) + throw ConfigError(json_paths, + err, + "", + "Switch path configuration " + "must be an array"); + + size_t i; + json_t *json_path; + json_array_foreach(json_paths, i, json_path) + { + const char *from, *to; + int reverse = 0; + + ret = json_unpack_ex(json_path, + &err, + 0, + "{ s: s, s: s, s?: b }", + "from", + &from, + "to", + &to, + "reverse", + &reverse); + if(ret != 0) + throw ConfigError( + json_path, + err, + "", + "Cannot parse switch path config"); + + auto masterIpCore = card->lookupIp(from); + if(!masterIpCore) + throw ConfigError(json_path, + "", + "Unknown IP {}", + from); + + auto slaveIpCore = card->lookupIp(to); + if(!slaveIpCore) + throw ConfigError(json_path, + "", + "Unknown IP {}", + to); + + auto masterIpNode + = std::dynamic_pointer_cast( + masterIpCore); + if(!masterIpNode) + throw ConfigError( + json_path, + "", + "IP {} is not a streaming node", + from); + + auto slaveIpNode + = std::dynamic_pointer_cast( + slaveIpCore); + if(!slaveIpNode) + throw ConfigError( + json_path, + "", + "IP {} is not a streaming node", + to); + + if(not masterIpNode->connect(*slaveIpNode, + reverse != 0)) + throw ConfigError( + json_path, + "", + "Failed to connect node {} to {}", + from, + to); + } + } + } + + return cards; } From 57a519a88d1845679ba5fbbc5c8d6929f55fa4db Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Fri, 31 Mar 2023 01:11:34 +0200 Subject: [PATCH 21/93] update gitignore --- .gitignore | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/.gitignore b/.gitignore index e9b540fe..be42f1fc 100644 --- a/.gitignore +++ b/.gitignore @@ -12,4 +12,5 @@ build/ *.user graph.dot -.clang-format \ No newline at end of file +.clang-format +miob/ \ No newline at end of file From 5adf891c075a8ceac1a8fd9dd9c27a6e98cbd133 Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Mon, 3 Apr 2023 00:40:07 +0200 Subject: [PATCH 22/93] moved platform test to target --- include/villas/fpga/platform_card.hpp | 2 - lib/platform_card.cpp | 96 +++++--------- src/platform.cpp | 182 +++++++++++++++++++++++++- 3 files changed, 213 insertions(+), 67 deletions(-) diff --git a/include/villas/fpga/platform_card.hpp b/include/villas/fpga/platform_card.hpp index 60649c82..19ca9d08 100644 --- a/include/villas/fpga/platform_card.hpp +++ b/include/villas/fpga/platform_card.hpp @@ -21,8 +21,6 @@ class PlatformCard : public Card void connect(); - static int Test(); - private: }; diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index a43500b3..20148b3a 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -10,80 +10,51 @@ #include #include -#include +#include #include #include #include +#include using namespace villas; using namespace villas::fpga; -int PlatformCard::Test() -{ - /* To investigate - -relation between vfio device and pci device - - vfio dev uses pci device as member - -> when is it accessed?? - - */ - - /* Report of dependencies to produce a minimal card example - - Factory in pcieCard: - card->name = std::string(card_name); - card->vfioContainer = vc; - card->affinity = affinity; - card->doReset = do_reset != 0; - card->polling = (polling != 0); - card->pdev - { - pciDevice* lookupPci - { - std::make_shared(id, slot) - } - } - card -> init() - { - vfioDevice = vfioContainer->attachDevice(pdev); - { IMPORTANT two implementations exist with overloaded - parameters, PCI dev and some generic - >>> investigation <<< - } - vfioDevice->pciEnable() - } - card->ips = ip::CoreFactory::make(card.get(), json_ips); - + some messing with cores through getIp func - */ - - // DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 +/* To investigate + -relation between vfio device and pci device + - vfio dev uses pci device as member + -> when is it accessed?? - // Parse FPGA configuration +*/ - const std::string CONFIG_FILE_PATH = "config.json"; - FILE *f = fopen(CONFIG_FILE_PATH.c_str(), "r"); +/* Report of dependencies to produce a minimal card example - if(!f) - throw RuntimeError("Cannot open config file: {}", - CONFIG_FILE_PATH); - - json_t *json = json_loadf(f, 0, nullptr); - if(!json) { - fclose(f); - throw RuntimeError("Cannot parse JSON config"); +Factory in pcieCard: + card->name = std::string(card_name); + card->vfioContainer = vc; + card->affinity = affinity; + card->doReset = do_reset != 0; + card->polling = (polling != 0); + card->pdev + { + pciDevice* lookupPci + { + std::make_shared(id, slot) } - - fclose(f); - - json_t *fpgas = json_object_get(json, "fpgas"); - if(fpgas == nullptr) { - exit(1); } + card -> init() + { + vfioDevice = vfioContainer->attachDevice(pdev); + { IMPORTANT two implementations exist with overloaded +parameters, PCI dev and some generic + >>> investigation <<< + } + vfioDevice->pciEnable() + } + card->ips = ip::CoreFactory::make(card.get(), json_ips); + + some messing with cores through getIp func +*/ - auto vc = std::make_shared(); - PlatformCardFactory::make(json, vc); - - return 0; -} +// DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 PlatformCard::PlatformCard( std::shared_ptr vfioContainer) @@ -263,5 +234,8 @@ PlatformCardFactory::make(json_t *json, } } + // Deallocate JSON config + json_decref(json); + return cards; } diff --git a/src/platform.cpp b/src/platform.cpp index 17a0303a..70c5c2db 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -1,12 +1,186 @@ +#include +#include +#include +#include +#include #include +#include +#include -using namespace villas::fpga; +#define SEC_IN_USEC 1000 * 1000 -int main() +using namespace villas; +using namespace fpga; + +static auto logger = villas::logging.get("PLATFORM CTRL"); + +void writeToDmaFromStdIn(std::shared_ptr dma) +{ + auto &alloc = villas::HostRam::getAllocator(); + const std::shared_ptr block + = alloc.allocateBlock(0x200 * sizeof(float)); + villas::MemoryAccessor mem = *block; + dma->makeAccesibleFromVA(block); + + logger->info( + "Please enter values to write to the device, separated by ';'"); + + while(true) { + // Read values from stdin + std::string line; + std::getline(std::cin, line); + auto values = villas::utils::tokenize(line, ";"); + + size_t i = 0; + for(auto &value : values) { + if(value.empty()) + continue; + + const float number = std::stof(value); + mem[i++] = number; + } + + // Initiate write transfer + bool state = dma->write(*block, i * sizeof(float)); + if(!state) + logger->error("Failed to write to device"); + + auto writeComp = dma->writeComplete(); + logger->debug("Wrote {} bytes", writeComp.bytes); + } + // auto &alloc = villas::HostRam::getAllocator(); + + // const std::shared_ptr block[] = { + // alloc.allocateBlock(0x200 * sizeof(uint32_t)), + // alloc.allocateBlock(0x200 * sizeof(uint32_t)) + // }; + // villas::MemoryAccessor mem[] = {*block[0], *block[1]}; + + // for (auto b : block) { + // dma->makeAccesibleFromVA(b); + // } + + // size_t cur = 0, next = 1; + // std::ios::sync_with_stdio(false); + // std::string line; + // bool firstXfer = true; + + // while(true) { + // // Read values from stdin + + // std::getline(std::cin, line); + // auto values = villas::utils::tokenize(line, ";"); + + // size_t i = 0; + // for (auto &value: values) { + // if (value.empty()) continue; + + // const float number = std::stof(value); + // mem[cur][i++] = number; + // } + + // // Initiate write transfer + // bool state = dma->write(*block[cur], i * sizeof(float)); + // if (!state) + // logger->error("Failed to write to device"); + + // if (!firstXfer) { + // auto bytesWritten = dma->writeComplete(); + // logger->debug("Wrote {} bytes", bytesWritten.bytes); + // } else { + // firstXfer = false; + // } + + // cur = next; + // next = (next + 1) % (sizeof(mem) / sizeof(mem[0])); + // } +} + +void readFromDmaToStdOut( + std::shared_ptr dma, + std::unique_ptr formatter) { - PlatformCard::Test(); + auto &alloc = villas::HostRam::getAllocator(); + + const std::shared_ptr block[] + = { alloc.allocateBlock(0x200 * sizeof(uint32_t)), + alloc.allocateBlock(0x200 * sizeof(uint32_t)) }; + villas::MemoryAccessor mem[] = { *block[0], *block[1] }; + + for(auto b : block) { + dma->makeAccesibleFromVA(b); + } + + size_t cur = 0, next = 1; + std::ios::sync_with_stdio(false); + + // Setup read transfer + dma->read(*block[0], block[0]->getSize()); + + while(true) { + logger->trace("Read from stream and write to address {}:{:p}", + block[next]->getAddrSpaceId(), + block[next]->getOffset()); + // We could use the number of interrupts to determine if we + // missed a chunk of data + dma->read(*block[next], block[next]->getSize()); + auto c = dma->readComplete(); + + if(c.interrupts > 1) { + logger->warn("Missed {} interrupts", c.interrupts - 1); + } + + logger->debug("bytes: {}, intrs: {}, bds: {}", + c.bytes, + c.interrupts, + c.bds); + try { + for(size_t i = 0; i * 4 < c.bytes; i++) { + int32_t ival = mem[cur][i]; + float fval = *( + (float *) (&ival)); // cppcheck-suppress + // invalidPointerCast + formatter->format(fval); + printf("%#x\n", ival); + } + formatter->output(std::cout); + } catch(const std::exception &e) { + logger->warn("Failed to output data: {}", e.what()); + } - return 0; + cur = next; + next = (next + 1) % (sizeof(mem) / sizeof(mem[0])); + } } +int main() +{ + // Parse FPGA configuration + const std::string CONFIG_FILE_PATH = "config.json"; + FILE *f = fopen(CONFIG_FILE_PATH.c_str(), "r"); + + if(!f) + throw RuntimeError("Cannot open config file: {}", + CONFIG_FILE_PATH); + + json_t *json = json_loadf(f, 0, nullptr); + if(!json) { + fclose(f); + throw RuntimeError("Cannot parse JSON config"); + } + + fclose(f); + + auto vc = std::make_shared(); + std::shared_ptr card + = PlatformCardFactory::make(json, vc).front(); + + auto dma = std::dynamic_pointer_cast( + card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:"))); + + writeToDmaFromStdIn(dma); + usleep(5 * SEC_IN_USEC); // some magic numbers + + return 0; +} \ No newline at end of file From 9d1a1c426331b58fa856a0ac115aa8e46fe30dad Mon Sep 17 00:00:00 2001 From: Pascal Henry Bauer Date: Tue, 11 Apr 2023 16:06:42 +0200 Subject: [PATCH 23/93] read write --- src/platform.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/platform.cpp b/src/platform.cpp index 70c5c2db..cca4362d 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -46,8 +46,10 @@ void writeToDmaFromStdIn(std::shared_ptr dma) if(!state) logger->error("Failed to write to device"); - auto writeComp = dma->writeComplete(); - logger->debug("Wrote {} bytes", writeComp.bytes); + // auto writeComp = dma->writeComplete(); + usleep(5 * SEC_IN_USEC); // some magic numbers + + // logger->debug("Wrote {} bytes", writeComp.bytes); } // auto &alloc = villas::HostRam::getAllocator(); @@ -180,7 +182,8 @@ int main() card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:"))); writeToDmaFromStdIn(dma); - usleep(5 * SEC_IN_USEC); // some magic numbers + auto formatter = fpga::getBufferedSampleFormatter("short", 16); + readFromDmaToStdOut(dma, std::move(formatter)); return 0; } \ No newline at end of file From 648b56dfa924c25365be27c862e2d16e7d38b8ba Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 20 Apr 2023 15:35:45 +0000 Subject: [PATCH 24/93] moved members back to parent class --- include/villas/fpga/card.hpp | 3 +++ include/villas/fpga/pcie_card.hpp | 13 +++++++------ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/include/villas/fpga/card.hpp b/include/villas/fpga/card.hpp index 2fbf6001..7977d485 100644 --- a/include/villas/fpga/card.hpp +++ b/include/villas/fpga/card.hpp @@ -22,6 +22,9 @@ class Card { public: bool polling; + bool doReset; // Reset VILLASfpga during startup? + int affinity; // Affinity for MSI interrupts + std::string name; // The name of the FPGA card std::shared_ptr vfioContainer; std::shared_ptr vfioDevice; //? Only used by intc diff --git a/include/villas/fpga/pcie_card.hpp b/include/villas/fpga/pcie_card.hpp index 1f3afa15..fd701589 100644 --- a/include/villas/fpga/pcie_card.hpp +++ b/include/villas/fpga/pcie_card.hpp @@ -61,13 +61,14 @@ class PCIeCard : public Card { { } public: // TODO: make this private - bool doReset; // Reset VILLASfpga during startup? - int affinity; // Affinity for MSI interrupts + std::shared_ptr pdev; // PCI device handle - std::shared_ptr pdev; // PCI device handle - - protected: - Logger getLogger() const { return villas::logging.get(name); } +protected: + Logger + getLogger() const + { + return villas::logging.get(name); + } }; class PCIeCardFactory : public plugin::Plugin { From be9ddc2d752bdb02e2697e3200527f84e5ac01e6 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Fri, 21 Apr 2023 12:57:14 +0000 Subject: [PATCH 25/93] fixe platform make --- include/villas/fpga/platform_card.hpp | 5 +- lib/platform_card.cpp | 275 +++++++++++--------------- src/platform.cpp | 75 +++++-- 3 files changed, 178 insertions(+), 177 deletions(-) diff --git a/include/villas/fpga/platform_card.hpp b/include/villas/fpga/platform_card.hpp index 19ca9d08..dff3e4fd 100644 --- a/include/villas/fpga/platform_card.hpp +++ b/include/villas/fpga/platform_card.hpp @@ -9,6 +9,7 @@ #pragma once #include +#include namespace villas { namespace fpga { @@ -27,7 +28,9 @@ class PlatformCard : public Card class PlatformCardFactory { public: - static std::list> make(json_t *json, std::shared_ptr vc); + static std::list> make(json_t *json, + std::shared_ptr vc, + const std::filesystem::path& searchPath); }; } /* namespace fpga */ diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 20148b3a..671e2ce8 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -80,162 +80,123 @@ void PlatformCard::connect() std::list > PlatformCardFactory::make(json_t *json, - std::shared_ptr vc) + std::shared_ptr vc, + const std::filesystem::path& searchPath) { - std::list > cards; - - const char *card_name; - json_t *json_card; - json_object_foreach(json, card_name, json_card) - { - json_t *json_ips = nullptr; - json_t *json_paths = nullptr; - const char *pci_slot = nullptr; - const char *pci_id = nullptr; - int do_reset = 0; - int affinity = 0; - int polling = 0; - - json_error_t err; - int ret = json_unpack_ex( - json_card, - &err, - 0, - "{ s: o, s?: i, s?: b, s?: s, s?: s, s?: b, s?: o }", - "ips", - &json_ips, - "affinity", - &affinity, - "do_reset", - &do_reset, - "slot", - &pci_slot, - "id", - &pci_id, - "polling", - &polling, - "paths", - &json_paths); - - if(ret != 0) { - throw ConfigError(json_card, - err, - "", - "Failed to parse card"); - } - - auto card = std::make_unique(vc); - card->polling = (polling != 0); - - card->connect(); - - // Load IPs from a separate json file - if(json_is_string(json_ips)) { - auto json_ips_fn = json_string_value(json_ips); - json_ips = json_load_file(json_ips_fn, 0, nullptr); - if(json_ips == nullptr) - throw ConfigError( - json_ips, - "node-config-fpga-ips", - "Failed to load FPGA IP cores from {}", - json_ips_fn); - } - - if(not json_is_object(json_ips)) - throw ConfigError( - json_ips, - "node-config-fpga-ips", - "FPGA IP core list must be an object!"); - - card->ips = ip::CoreFactory::make(card.get(), json_ips); - if(card->ips.empty()) - throw ConfigError( - json_ips, - "node-config-fpga-ips", - "Cannot initialize IPs of FPGA card {}", - card_name); - - // Additional static paths for AXI-Steram switch - if(json_paths != nullptr) { - if(not json_is_array(json_paths)) - throw ConfigError(json_paths, - err, - "", - "Switch path configuration " - "must be an array"); - - size_t i; - json_t *json_path; - json_array_foreach(json_paths, i, json_path) - { - const char *from, *to; - int reverse = 0; - - ret = json_unpack_ex(json_path, - &err, - 0, - "{ s: s, s: s, s?: b }", - "from", - &from, - "to", - &to, - "reverse", - &reverse); - if(ret != 0) - throw ConfigError( - json_path, - err, - "", - "Cannot parse switch path config"); - - auto masterIpCore = card->lookupIp(from); - if(!masterIpCore) - throw ConfigError(json_path, - "", - "Unknown IP {}", - from); - - auto slaveIpCore = card->lookupIp(to); - if(!slaveIpCore) - throw ConfigError(json_path, - "", - "Unknown IP {}", - to); - - auto masterIpNode - = std::dynamic_pointer_cast( - masterIpCore); - if(!masterIpNode) - throw ConfigError( - json_path, - "", - "IP {} is not a streaming node", - from); - - auto slaveIpNode - = std::dynamic_pointer_cast( - slaveIpCore); - if(!slaveIpNode) - throw ConfigError( - json_path, - "", - "IP {} is not a streaming node", - to); - - if(not masterIpNode->connect(*slaveIpNode, - reverse != 0)) - throw ConfigError( - json_path, - "", - "Failed to connect node {} to {}", - from, - to); - } - } - } - - // Deallocate JSON config - json_decref(json); - - return cards; + std::list> cards; + auto logger = villas::logging.get("PlatformCard"); + + const char *card_name; + json_t *json_card; + json_object_foreach(json, card_name, json_card) { + logger->info("Found config for FPGA card {}", card_name); + + json_t* json_ips = nullptr; + json_t* json_paths = nullptr; + const char* pci_slot = nullptr; + const char* pci_id = nullptr; + int do_reset = 0; + int affinity = 0; + int polling = 0; + + json_error_t err; + int ret = json_unpack_ex(json_card, &err, 0, "{ s: o, s?: i, s?: b, s?: s, s?: s, s?: b, s?: o }", + "ips", &json_ips, + "affinity", &affinity, + "do_reset", &do_reset, + "slot", &pci_slot, + "id", &pci_id, + "polling", &polling, + "paths", &json_paths); + + if (ret != 0) + throw ConfigError(json_card, err, "", "Failed to parse card"); + + auto card = std::make_unique(vc); + + // Populate generic properties + card->name = std::string(card_name); + card->vfioContainer = vc; + card->affinity = affinity; + card->doReset = do_reset != 0; + card->polling = (polling != 0); + + card->connect(); + + // if (not card->init()) { + // logger->warn("Cannot start FPGA card {}", card_name); + // continue; + // } + + // Load IPs from a separate json file + if (!json_is_string(json_ips)) { + logger->debug("FPGA IP cores config item is not a string."); + throw ConfigError(json_ips, "node-config-fpga-ips", "FPGA IP cores config item is not a string."); + } + if (!searchPath.empty()) { + std::filesystem::path json_ips_path = searchPath / json_string_value(json_ips); + logger->debug("searching for FPGA IP cors config at {}", json_ips_path); + json_ips = json_load_file(json_ips_path.c_str(), 0, nullptr); + } + if (json_ips == nullptr) { + json_ips = json_load_file(json_string_value(json_ips), 0, nullptr); + logger->debug("searching for FPGA IP cors config at {}", json_string_value(json_ips)); + if (json_ips == nullptr) { + throw ConfigError(json_ips, "node-config-fpga-ips", "Failed to find FPGA IP cores config"); + } + } + + if (not json_is_object(json_ips)) + throw ConfigError(json_ips, "node-config-fpga-ips", "FPGA IP core list must be an object!"); + + card->ips = ip::CoreFactory::make(card.get(), json_ips); + if (card->ips.empty()) + throw ConfigError(json_ips, "node-config-fpga-ips", "Cannot initialize IPs of FPGA card {}", card_name); + + // if (not card->check()) + // throw RuntimeError("Checking of FPGA card {} failed", card_name); + + // Additional static paths for AXI-Steram switch + if (json_paths != nullptr) { + if (not json_is_array(json_paths)) + throw ConfigError(json_paths, err, "", "Switch path configuration must be an array"); + + size_t i; + json_t *json_path; + json_array_foreach(json_paths, i, json_path) { + const char *from, *to; + int reverse = 0; + + ret = json_unpack_ex(json_path, &err, 0, "{ s: s, s: s, s?: b }", + "from", &from, + "to", &to, + "reverse", &reverse + ); + if (ret != 0) + throw ConfigError(json_path, err, "", "Cannot parse switch path config"); + + auto masterIpCore = card->lookupIp(from); + if (!masterIpCore) + throw ConfigError(json_path, "", "Unknown IP {}", from); + + auto slaveIpCore = card->lookupIp(to); + if (!slaveIpCore) + throw ConfigError(json_path, "", "Unknown IP {}", to); + + auto masterIpNode = std::dynamic_pointer_cast(masterIpCore); + if (!masterIpNode) + throw ConfigError(json_path, "", "IP {} is not a streaming node", from); + + auto slaveIpNode = std::dynamic_pointer_cast(slaveIpCore); + if (!slaveIpNode) + throw ConfigError(json_path, "", "IP {} is not a streaming node", to); + + if (not masterIpNode->connect(*slaveIpNode, reverse != 0)) + throw ConfigError(json_path, "", "Failed to connect node {} to {}", from, to); + } + } + + cards.push_back(std::move(card)); + } + return cards; } diff --git a/src/platform.cpp b/src/platform.cpp index cca4362d..2e155c61 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -156,31 +156,68 @@ void readFromDmaToStdOut( } } -int main() -{ - // Parse FPGA configuration - const std::string CONFIG_FILE_PATH = "config.json"; - FILE *f = fopen(CONFIG_FILE_PATH.c_str(), "r"); - - if(!f) - throw RuntimeError("Cannot open config file: {}", - CONFIG_FILE_PATH); - - json_t *json = json_loadf(f, 0, nullptr); - if(!json) { - fclose(f); - throw RuntimeError("Cannot parse JSON config"); - } - fclose(f); - auto vc = std::make_shared(); - std::shared_ptr card - = PlatformCardFactory::make(json, vc).front(); +std::shared_ptr +setupCard(const std::string &configFilePath, const std::string &fpgaName) +{ + auto configDir = std::filesystem::path(configFilePath).parent_path(); + auto vfioContainer = std::make_shared(); + + // Parse FPGA configuration + FILE* f = fopen(configFilePath.c_str(), "r"); + if (!f) + throw RuntimeError("Cannot open config file: {}", configFilePath); + + json_t* json = json_loadf(f, 0, nullptr); + if (!json) { + logger->error("Cannot parse JSON config"); + fclose(f); + throw RuntimeError("Cannot parse JSON config"); + } + + fclose(f); + + json_t* fpgas = json_object_get(json, "fpgas"); + if (fpgas == nullptr) { + logger->error("No section 'fpgas' found in config"); + exit(1); + } + + // // Get the FPGA card plugin + // auto fpgaCardFactory = plugin::registry->lookup("pcie"); + // if (fpgaCardFactory == nullptr) { + // logger->error("No FPGA plugin found"); + // exit(1); + // } + + // Create all FPGA card instances using the corresponding plugin + auto cards = PlatformCardFactory::make(fpgas, vfioContainer, configDir); + + std::shared_ptr card; + for (auto &fpgaCard : cards) { + if (fpgaCard->name == fpgaName) { + return fpgaCard; + } + } + + // Deallocate JSON config + json_decref(json); + + if (!card) + throw RuntimeError("FPGA card {} not found in config or not working", fpgaName); + + return card; +} + +int main() +{ + std::shared_ptr card = setupCard("/home/root/fpga/build/src/fpgas.json","PlatformCard"); auto dma = std::dynamic_pointer_cast( card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:"))); + // Write Test writeToDmaFromStdIn(dma); auto formatter = fpga::getBufferedSampleFormatter("short", 16); readFromDmaToStdOut(dma, std::move(formatter)); From 2179139d116e2651221545691f57bb0880574ed9 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 20 Jul 2023 14:37:13 +0000 Subject: [PATCH 26/93] add zynq ip --- include/villas/fpga/ips/zynq.hpp | 78 +++++++++++++++ lib/CMakeLists.txt | 1 + lib/ips/zynq.cpp | 158 +++++++++++++++++++++++++++++++ 3 files changed, 237 insertions(+) create mode 100644 include/villas/fpga/ips/zynq.hpp create mode 100644 lib/ips/zynq.cpp diff --git a/include/villas/fpga/ips/zynq.hpp b/include/villas/fpga/ips/zynq.hpp new file mode 100644 index 00000000..4a953a4d --- /dev/null +++ b/include/villas/fpga/ips/zynq.hpp @@ -0,0 +1,78 @@ +/** Zynq VFIO connector node + * + * Author: Pascal Bauer + * SPDX-FileCopyrightText: 2017 Steffen Vogel + * SPDX-License-Identifier: Apache-2.0 + *********************************************************************************/ + +#pragma once + +#include + +#include + +namespace villas { +namespace fpga { +namespace ip { + +class Zynq : public Core { +public: + friend class ZynqFactory; + + virtual + bool init() override; + +private: + static constexpr char axiInterface[] = "M_AXI"; + static constexpr char pcieMemory[] = "BAR0"; + + struct AxiBar { + uintptr_t base; + size_t size; + uintptr_t translation; + }; + + struct PciBar { + uintptr_t translation; + }; + + std::map axiToPcieTranslations; + std::map pcieToAxiTranslations; +}; + +class ZynqFactory : CoreFactory { + +public: + virtual + std::string getName() const + { + return "pcie"; + } + + virtual + std::string getDescription() const + { + return "Custom platform vfio connector"; + } + +private: + virtual + Vlnv getCompatibleVlnv() const + { + return Vlnv("xilinx.com:ip:zynq_ultra_ps_e:"); + } + + // Create a concrete IP instance + Core* make() const + { + return new Zynq; + }; + +protected: + virtual + void parse(Core &, json_t *) override; +}; + +} /* namespace ip */ +} /* namespace fpga */ +} /* namespace villas */ diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt index d8ac0637..4a1bf2d1 100644 --- a/lib/CMakeLists.txt +++ b/lib/CMakeLists.txt @@ -28,6 +28,7 @@ set(SOURCES ips/switch.cpp ips/timer.cpp ips/i2c.cpp + ips/zynq.cpp ips/rtds2gpu/rtds2gpu.cpp ips/rtds2gpu/xrtds2gpu.c diff --git a/lib/ips/zynq.cpp b/lib/ips/zynq.cpp new file mode 100644 index 00000000..47b71484 --- /dev/null +++ b/lib/ips/zynq.cpp @@ -0,0 +1,158 @@ +/** AXI PCIe bridge + * + * Author: Daniel Krebs + * SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, EONERC + * SPDX-License-Identifier: Apache-2.0 + *********************************************************************************/ + +#include +#include + +#include +#include + +#include +#include +#include + + +using namespace villas::fpga::ip; + + +bool +Zynq::init() +{ + auto &mm = MemoryManager::get(); + + // Throw an exception if the is no bus master interface and thus no + // address space we can use for translation -> error + + card->addrSpaceIdHostToDevice = mm.findAddressSpace("zynq_ultra_ps_e_0:M_AXI_HPM0_FPD"); + + // Map PCIe BAR0 via VFIO + const void* bar0_mapped = card->vfioDevice->regionMap(0); + if (bar0_mapped == MAP_FAILED) { + logger->error("Failed to mmap() BAR0"); + return false; + } + + const size_t mem_size = UINT64_MAX; + + // Create a mapping from process address space to the FPGA card via vfio + size_t srcVertexId = mm.getProcessAddressSpace(); + size_t targetVertexId = card->addrSpaceIdHostToDevice; + mm.createMapping(reinterpret_cast(bar0_mapped), + 0, mem_size, "vfio-h2d", srcVertexId, targetVertexId); + + + //! Dev + // Make PCIe (IOVA) address space available to FPGA via BAR0 + + // // IPs that can access this address space will know it via their memory view + // const auto addrSpaceNameDeviceToHost = + // mm.getSlaveAddrSpaceName(getInstanceName(), pcieMemory); + + // // Save ID in card so we can create mappings later when needed (e.g. when + // // allocating DMA memory in host RAM) + // card->addrSpaceIdDeviceToHost = + // mm.getOrCreateAddressSpace(addrSpaceNameDeviceToHost); + + // auto pciAddrSpaceId = mm.getPciAddressSpace(); + // auto region = card->vfioDevice->regions[0]; + // int region_num = 0 + + // auto pciBar = pcieToAxiTranslations.at("bar0"); + + // mm.createMapping(region.start, pciBar.translation, bar0_size, + // std::string("PCI-") + barName, + // pciAddrSpaceId, card->addrSpaceIdHostToDevice); + + + // for (auto& [barName, axiBar] : axiToPcieTranslations) { + // logger->info("AXI-{}: bus addr={:#x} size={:#x}", + // barName, axiBar.base, axiBar.size); + // logger->info("AXI-{}: PCI translation offset: {:#x}", + // barName, axiBar.translation); + + // auto barXAddrSpaceName = mm.getSlaveAddrSpaceName(getInstanceName(), barName); + // auto barXAddrSpaceId = mm.getOrCreateAddressSpace(barXAddrSpaceName); + + // // Base is already incorporated into mapping of each IP by Vivado, so + // // the mapping src has to be 0 + // mm.createMapping(0, axiBar.translation, axiBar.size, + // std::string("AXI-") + barName, + // barXAddrSpaceId, pciAddrSpaceId); + + // i++; + // } + + // auto const baseaddr = 2684354560; + // auto const size = 65536; + // srcVertexId = mm.getProcessAddressSpace(); + // targetVertexId = mm.findAddressSpace("zynq_ultra_ps_e_0/HPC1_DDR_LOW"); + // mm.createMapping(baseaddr, 0, size, + // std::string("AXI-") + "BAR0", + // targetVertexId, srcVertexId); + + // auto const highaddr = 2684420095; + // srcVertexId = mm.getProcessAddressSpace(); + // targetVertexId = mm.findAddressSpace("zynq_ultra_ps_e_0/HPC1_DDR_HIGH"); + // mm.createMapping(highaddr, 0, size, + // std::string("AXI-") + "BAR0", + // targetVertexId, srcVertexId); + + return true; +} + +void +ZynqFactory::parse(Core &ip, json_t *cfg) +{ + CoreFactory::parse(ip, cfg); + + auto logger = getLogger(); + //auto &zynq = dynamic_cast(ip); + + // for (auto barType : std::list{ + // "axi_bars", + // "pcie_bars" + // }) { + // json_t *json_bars = json_object_get(cfg, barType.c_str()); + // if (not json_is_object(json_bars)) + // throw ConfigError(cfg, "", "Missing BAR config: {}", barType); + + // json_t* json_bar; + // const char* bar_name; + // json_object_foreach(json_bars, bar_name, json_bar) { + // unsigned int translation; + + // json_error_t err; + // int ret = json_unpack_ex(json_bar, &err, 0, "{ s: i }", + // "translation", &translation + // ); + // if (ret != 0) + // throw ConfigError(json_bar, err, "", "Cannot parse {}/{}", barType, bar_name); + + // if (barType == "axi_bars") { + // json_int_t base, high, size; + // int ret = json_unpack_ex(json_bar, &err, 0, "{ s: I, s: I, s: I }", + // "baseaddr", &base, + // "highaddr", &high, + // "size", &size + // ); + // if (ret != 0) + // throw ConfigError(json_bar, err, "", "Cannot parse {}/{}", barType, bar_name); + + // pcie.axiToPcieTranslations[bar_name] = { + // .base = static_cast(base), + // .size = static_cast(size), + // .translation = translation + // }; + // } else + // pcie.pcieToAxiTranslations[bar_name] = { + // .translation = translation + // }; + // } + // } +} + +static ZynqFactory p; From 0a082de70393fc766a8e80c5e0fff3f716a22ef6 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 20 Jul 2023 14:38:00 +0000 Subject: [PATCH 27/93] add zynq to init order --- lib/core.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/core.cpp b/lib/core.cpp index 2af5a175..7a21e67c 100644 --- a/lib/core.cpp +++ b/lib/core.cpp @@ -30,6 +30,7 @@ using namespace villas::fpga::ip; // same order as they appear in this list, i.e. first here will be initialized // first. static std::list vlnvInitializationOrder = { + Vlnv("xilinx.com:ip:zynq_ultra_ps_e:"), Vlnv("xilinx.com:ip:axi_pcie:"), Vlnv("xilinx.com:module_ref:axi_pcie_intc:"), Vlnv("xilinx.com:ip:axis_switch:"), From 28f7133dfe0e17ecd23c1ab98b36a57cd9a2fc9f Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 20 Jul 2023 14:38:56 +0000 Subject: [PATCH 28/93] set local var --- lib/platform_card.cpp | 82 +++++++++++++++++++++---------------------- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 671e2ce8..218e56e8 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -72,10 +72,10 @@ void PlatformCard::connect() vfioContainer->attachGroup(group); - auto device = std::make_shared( + this->vfioDevice = std::make_shared( DEV_NAME, group->getFileDescriptor()); - group->attachDevice(device); + group->attachDevice(this->vfioDevice); } std::list > @@ -156,45 +156,45 @@ PlatformCardFactory::make(json_t *json, // if (not card->check()) // throw RuntimeError("Checking of FPGA card {} failed", card_name); - // Additional static paths for AXI-Steram switch - if (json_paths != nullptr) { - if (not json_is_array(json_paths)) - throw ConfigError(json_paths, err, "", "Switch path configuration must be an array"); - - size_t i; - json_t *json_path; - json_array_foreach(json_paths, i, json_path) { - const char *from, *to; - int reverse = 0; - - ret = json_unpack_ex(json_path, &err, 0, "{ s: s, s: s, s?: b }", - "from", &from, - "to", &to, - "reverse", &reverse - ); - if (ret != 0) - throw ConfigError(json_path, err, "", "Cannot parse switch path config"); - - auto masterIpCore = card->lookupIp(from); - if (!masterIpCore) - throw ConfigError(json_path, "", "Unknown IP {}", from); - - auto slaveIpCore = card->lookupIp(to); - if (!slaveIpCore) - throw ConfigError(json_path, "", "Unknown IP {}", to); - - auto masterIpNode = std::dynamic_pointer_cast(masterIpCore); - if (!masterIpNode) - throw ConfigError(json_path, "", "IP {} is not a streaming node", from); - - auto slaveIpNode = std::dynamic_pointer_cast(slaveIpCore); - if (!slaveIpNode) - throw ConfigError(json_path, "", "IP {} is not a streaming node", to); - - if (not masterIpNode->connect(*slaveIpNode, reverse != 0)) - throw ConfigError(json_path, "", "Failed to connect node {} to {}", from, to); - } - } + // // Additional static paths for AXI-Steram switch + // if (json_paths != nullptr) { + // if (not json_is_array(json_paths)) + // throw ConfigError(json_paths, err, "", "Switch path configuration must be an array"); + + // size_t i; + // json_t *json_path; + // json_array_foreach(json_paths, i, json_path) { + // const char *from, *to; + // int reverse = 0; + + // ret = json_unpack_ex(json_path, &err, 0, "{ s: s, s: s, s?: b }", + // "from", &from, + // "to", &to, + // "reverse", &reverse + // ); + // if (ret != 0) + // throw ConfigError(json_path, err, "", "Cannot parse switch path config"); + + // auto masterIpCore = card->lookupIp(from); + // if (!masterIpCore) + // throw ConfigError(json_path, "", "Unknown IP {}", from); + + // auto slaveIpCore = card->lookupIp(to); + // if (!slaveIpCore) + // throw ConfigError(json_path, "", "Unknown IP {}", to); + + // auto masterIpNode = std::dynamic_pointer_cast(masterIpCore); + // if (!masterIpNode) + // throw ConfigError(json_path, "", "IP {} is not a streaming node", from); + + // auto slaveIpNode = std::dynamic_pointer_cast(slaveIpCore); + // if (!slaveIpNode) + // throw ConfigError(json_path, "", "IP {} is not a streaming node", to); + + // if (not masterIpNode->connect(*slaveIpNode, reverse != 0)) + // throw ConfigError(json_path, "", "Failed to connect node {} to {}", from, to); + // } + // } cards.push_back(std::move(card)); } From d90c9832ccf1cf09df089876f7e198032c4a28e4 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 20 Jul 2023 14:39:34 +0000 Subject: [PATCH 29/93] set log level --- src/platform.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/platform.cpp b/src/platform.cpp index 2e155c61..09b24028 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -212,6 +212,8 @@ setupCard(const std::string &configFilePath, const std::string &fpgaName) int main() { + logging.setLevel(spdlog::level::debug); + std::shared_ptr card = setupCard("/home/root/fpga/build/src/fpgas.json","PlatformCard"); auto dma = std::dynamic_pointer_cast( From 78741d6de454a72f0f880a3c6454aada5b39597d Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 9 Aug 2023 14:52:30 +0000 Subject: [PATCH 30/93] move connect to constructor --- include/villas/fpga/platform_card.hpp | 5 +++-- lib/platform_card.cpp | 27 ++++++++++++++------------- 2 files changed, 17 insertions(+), 15 deletions(-) diff --git a/include/villas/fpga/platform_card.hpp b/include/villas/fpga/platform_card.hpp index dff3e4fd..623ffba7 100644 --- a/include/villas/fpga/platform_card.hpp +++ b/include/villas/fpga/platform_card.hpp @@ -10,6 +10,7 @@ #include #include +#include namespace villas { namespace fpga { @@ -20,9 +21,9 @@ class PlatformCard : public Card PlatformCard(std::shared_ptr vfioContainer); ~PlatformCard(){}; - void connect(); - private: + std::list> devices; + }; class PlatformCardFactory diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 218e56e8..338ef786 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -60,22 +60,25 @@ PlatformCard::PlatformCard( std::shared_ptr vfioContainer) { this->vfioContainer = vfioContainer; + this->logger = villas::logging.get("PlatformCard"); - logger = villas::logging.get("PlatformCard"); -} - -void PlatformCard::connect() -{ + // VFIO Group const int IOMMU_GROUP = 2; - const char *DEV_NAME = "a0000000.dma"; auto group = std::make_shared(IOMMU_GROUP, true); - vfioContainer->attachGroup(group); - this->vfioDevice = std::make_shared( - DEV_NAME, - group->getFileDescriptor()); - group->attachDevice(this->vfioDevice); + // VFIO Devices + const char* DEVICES[] = {"a0000000.dma", "a0010000.axis_switch"}; + for(const char* DEVICE : DEVICES){ + auto vfioDevice = std::make_shared( + DEVICE, + group->getFileDescriptor()); + this->devices.push_back(vfioDevice); + group->attachDevice(vfioDevice); + } + + + this->vfioDevice = nullptr; //TODO: refactor } std::list > @@ -121,8 +124,6 @@ PlatformCardFactory::make(json_t *json, card->doReset = do_reset != 0; card->polling = (polling != 0); - card->connect(); - // if (not card->init()) { // logger->warn("Cannot start FPGA card {}", card_name); // continue; From 1e16011bb71bc9179c4ea99ba540ad3415111143 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Tue, 5 Sep 2023 17:00:36 +0000 Subject: [PATCH 31/93] replace list with vec --- include/villas/fpga/platform_card.hpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/villas/fpga/platform_card.hpp b/include/villas/fpga/platform_card.hpp index 623ffba7..1b7178d3 100644 --- a/include/villas/fpga/platform_card.hpp +++ b/include/villas/fpga/platform_card.hpp @@ -10,7 +10,7 @@ #include #include -#include +#include namespace villas { namespace fpga { @@ -21,8 +21,8 @@ class PlatformCard : public Card PlatformCard(std::shared_ptr vfioContainer); ~PlatformCard(){}; -private: - std::list> devices; + std::vector> devices; +private: }; From b6c9ad1e7e7dbe4bc53a87ddd2ade8e074e75bc1 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Tue, 5 Sep 2023 17:01:11 +0000 Subject: [PATCH 32/93] fix debug print message --- .../clangd/index/CLI11.hpp.09D07ACB0DB90588.idx | Bin 0 -> 59988 bytes .../aurora_xilinx.hpp.847BB99CDA8A9AF4.idx | Bin 0 -> 556 bytes .../index/base64.cpp.8C334833F6F9F0F7.idx | Bin 0 -> 1662 bytes .../index/buffer.cpp.70F54B3855DB302B.idx | Bin 0 -> 984 bytes .../index/buffer.hpp.6F28A3D47DA84886.idx | Bin 0 -> 798 bytes .../clangd/index/card.cpp.C6B47D038017ED78.idx | Bin 0 -> 2030 bytes .../clangd/index/card.hpp.E962885EB82E5B91.idx | Bin 0 -> 1504 bytes .../index/colors.hpp.7F2D1FF1B9D16010.idx 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zkwE_feF60E69sM66S4<9fqKKl!en`rvL&+Ri&AqEfl Date: Tue, 5 Sep 2023 17:01:41 +0000 Subject: [PATCH 33/93] remove comments and refactor --- lib/platform_card.cpp | 38 +------------------------------------- 1 file changed, 1 insertion(+), 37 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 338ef786..6e66527c 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -19,42 +19,6 @@ using namespace villas; using namespace villas::fpga; -/* To investigate - -relation between vfio device and pci device - - vfio dev uses pci device as member - -> when is it accessed?? - -*/ - -/* Report of dependencies to produce a minimal card example - -Factory in pcieCard: - card->name = std::string(card_name); - card->vfioContainer = vc; - card->affinity = affinity; - card->doReset = do_reset != 0; - card->polling = (polling != 0); - card->pdev - { - pciDevice* lookupPci - { - std::make_shared(id, slot) - } - } - card -> init() - { - vfioDevice = vfioContainer->attachDevice(pdev); - { IMPORTANT two implementations exist with overloaded -parameters, PCI dev and some generic - >>> investigation <<< - } - vfioDevice->pciEnable() - } - card->ips = ip::CoreFactory::make(card.get(), json_ips); - + some messing with cores through getIp func -*/ - -// DMESG: xilinx-vdma a0000000.dma: Adding to iommu group 2 PlatformCard::PlatformCard( std::shared_ptr vfioContainer) @@ -73,8 +37,8 @@ PlatformCard::PlatformCard( auto vfioDevice = std::make_shared( DEVICE, group->getFileDescriptor()); - this->devices.push_back(vfioDevice); group->attachDevice(vfioDevice); + this->devices.push_back(vfioDevice); } From e5226e200d937ceacb14dcf871471a57c371e0bc Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Tue, 5 Sep 2023 17:02:14 +0000 Subject: [PATCH 34/93] new mapping strategy per vfio device --- lib/ips/zynq.cpp | 66 ++++++++++++++++++++++++++++++++++++------------ 1 file changed, 50 insertions(+), 16 deletions(-) diff --git a/lib/ips/zynq.cpp b/lib/ips/zynq.cpp index 47b71484..fc7f23c3 100644 --- a/lib/ips/zynq.cpp +++ b/lib/ips/zynq.cpp @@ -15,6 +15,8 @@ #include #include +#include + using namespace villas::fpga::ip; @@ -23,26 +25,58 @@ bool Zynq::init() { auto &mm = MemoryManager::get(); - - // Throw an exception if the is no bus master interface and thus no - // address space we can use for translation -> error - - card->addrSpaceIdHostToDevice = mm.findAddressSpace("zynq_ultra_ps_e_0:M_AXI_HPM0_FPD"); - - // Map PCIe BAR0 via VFIO - const void* bar0_mapped = card->vfioDevice->regionMap(0); - if (bar0_mapped == MAP_FAILED) { - logger->error("Failed to mmap() BAR0"); - return false; + auto platform_card = dynamic_cast(card); + + // Map all vfio devices in card + std::map, const void*> device_map; + for (auto device : platform_card->devices) + { + const void* mapping = device->regionMap(0); + if (mapping == MAP_FAILED) { + logger->error("Failed to mmap() device"); + return false; + } + logger->debug("memory mapped: {}", device->get_name()); + device_map.insert({device, mapping}); } + // Create mappings from process space to vfio devices const size_t mem_size = UINT64_MAX; - - // Create a mapping from process address space to the FPGA card via vfio size_t srcVertexId = mm.getProcessAddressSpace(); - size_t targetVertexId = card->addrSpaceIdHostToDevice; - mm.createMapping(reinterpret_cast(bar0_mapped), - 0, mem_size, "vfio-h2d", srcVertexId, targetVertexId); + for (auto pair : device_map) + { + size_t targetVertexId = mm.getOrCreateAddressSpace(pair.first->get_name()); + mm.createMapping(reinterpret_cast(pair.second), + 0, mem_size, "vfio-h2d", srcVertexId, targetVertexId); + logger->debug("create edge from process to {}", pair.first->get_name()); + } + + //! Hardcoded edges vfios to ips + //? Solve Strat: search for name + // DMA + srcVertexId = mm.getOrCreateAddressSpace("a0000000.dma"); + size_t targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0/Reg"); + mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[0])), + 0, mem_size, "vfio to ip", srcVertexId, targetVertexId); + + targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0:M_AXI_SG"); + mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[0])), + 0, mem_size, "vfio to ip", srcVertexId, targetVertexId); + + // Switch + srcVertexId = mm.getOrCreateAddressSpace("a0010000.axis_switch"); + targetVertexId = mm.getOrCreateAddressSpace("axis_interconnect_0_xbar/Reg"); + mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[1])), + 0, mem_size, "vfio to ip", srcVertexId, targetVertexId); + + + // // Create a mapping from process address space to the FPGA card via vfio + // size_t srcVertexId = mm.getProcessAddressSpace(); + // card->addrSpaceIdHostToDevice = mm.findAddressSpace("zynq_ultra_ps_e_0:M_AXI_HPM0_FPD"); + // size_t targetVertexId = card->addrSpaceIdHostToDevice; + // const size_t mem_size = UINT64_MAX; + // mm.createMapping(reinterpret_cast(bar0_mapped), + // 0, mem_size, "vfio-h2d", srcVertexId, targetVertexId); //! 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lib/ips/intc.cpp | 2 ++ lib/ips/pcie.cpp | 2 ++ 4 files changed, 5 insertions(+), 1 deletion(-) diff --git a/include/villas/fpga/card.hpp b/include/villas/fpga/card.hpp index 7977d485..dedac077 100644 --- a/include/villas/fpga/card.hpp +++ b/include/villas/fpga/card.hpp @@ -26,7 +26,6 @@ class Card int affinity; // Affinity for MSI interrupts std::string name; // The name of the FPGA card std::shared_ptr vfioContainer; - std::shared_ptr vfioDevice; //? Only used by intc // Slave address space ID to access the PCIe address space from the // FPGA diff --git a/include/villas/fpga/pcie_card.hpp b/include/villas/fpga/pcie_card.hpp index fd701589..96b50e12 100644 --- a/include/villas/fpga/pcie_card.hpp +++ b/include/villas/fpga/pcie_card.hpp @@ -62,6 +62,7 @@ class PCIeCard : public Card { public: // TODO: make this private std::shared_ptr pdev; // PCI device handle + std::shared_ptr vfioDevice; //? Only used by intc protected: Logger diff --git a/lib/ips/intc.cpp b/lib/ips/intc.cpp index f1cefc94..56bd2284 100644 --- a/lib/ips/intc.cpp +++ b/lib/ips/intc.cpp @@ -21,6 +21,7 @@ using namespace villas::fpga::ip; InterruptController::~InterruptController() { + PCIeCard* card = dynamic_cast(card); card->vfioDevice->pciMsiDeinit(this->efds); } @@ -29,6 +30,7 @@ InterruptController::init() { const uintptr_t base = getBaseAddr(registerMemory); + PCIeCard* card = dynamic_cast(card); num_irqs = card->vfioDevice->pciMsiInit(efds); if (num_irqs < 0) return false; diff --git a/lib/ips/pcie.cpp b/lib/ips/pcie.cpp index c7861db5..67d5252b 100644 --- a/lib/ips/pcie.cpp +++ b/lib/ips/pcie.cpp @@ -22,6 +22,8 @@ AxiPciExpressBridge::init() { auto &mm = MemoryManager::get(); + PCIeCard* card = dynamic_cast(card); + // Throw an exception if the is no bus master interface and thus no // address space we can use for translation -> error card->addrSpaceIdHostToDevice = busMasterInterfaces.at(axiInterface); From 8a4601fbef148fa250fefa2a099ebaed004f8aba Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 13 Sep 2023 12:24:17 +0000 Subject: [PATCH 38/93] move edge production from ip zynwq to platform card --- lib/ips/zynq.cpp | 97 ++++++++++++++----------------------------- lib/platform_card.cpp | 30 +++++++++++-- 2 files changed, 57 insertions(+), 70 deletions(-) diff --git a/lib/ips/zynq.cpp b/lib/ips/zynq.cpp index fc7f23c3..3bd119d4 100644 --- a/lib/ips/zynq.cpp +++ b/lib/ips/zynq.cpp @@ -27,56 +27,25 @@ Zynq::init() auto &mm = MemoryManager::get(); auto platform_card = dynamic_cast(card); - // Map all vfio devices in card - std::map, const void*> device_map; - for (auto device : platform_card->devices) - { - const void* mapping = device->regionMap(0); - if (mapping == MAP_FAILED) { - logger->error("Failed to mmap() device"); - return false; - } - logger->debug("memory mapped: {}", device->get_name()); - device_map.insert({device, mapping}); - } - - // Create mappings from process space to vfio devices - const size_t mem_size = UINT64_MAX; - size_t srcVertexId = mm.getProcessAddressSpace(); - for (auto pair : device_map) - { - size_t targetVertexId = mm.getOrCreateAddressSpace(pair.first->get_name()); - mm.createMapping(reinterpret_cast(pair.second), - 0, mem_size, "vfio-h2d", srcVertexId, targetVertexId); - logger->debug("create edge from process to {}", pair.first->get_name()); - } - //! Hardcoded edges vfios to ips //? Solve Strat: search for name // DMA - srcVertexId = mm.getOrCreateAddressSpace("a0000000.dma"); - size_t targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0/Reg"); - mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[0])), - 0, mem_size, "vfio to ip", srcVertexId, targetVertexId); - - targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0:M_AXI_SG"); - mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[0])), - 0, mem_size, "vfio to ip", srcVertexId, targetVertexId); - - // Switch - srcVertexId = mm.getOrCreateAddressSpace("a0010000.axis_switch"); - targetVertexId = mm.getOrCreateAddressSpace("axis_interconnect_0_xbar/Reg"); - mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[1])), - 0, mem_size, "vfio to ip", srcVertexId, targetVertexId); + // const size_t ip_mem_size = 65535; + // srcVertexId = mm.getOrCreateAddressSpace("a0000000.dma"); + // size_t targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0/Reg"); + // mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[0])), + // 0, ip_mem_size, "vfio to ip", srcVertexId, targetVertexId); + // targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0:M_AXI_SG"); + // mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[0])), + // 0, ip_mem_size, "vfio to ip", srcVertexId, targetVertexId); - // // Create a mapping from process address space to the FPGA card via vfio - // size_t srcVertexId = mm.getProcessAddressSpace(); - // card->addrSpaceIdHostToDevice = mm.findAddressSpace("zynq_ultra_ps_e_0:M_AXI_HPM0_FPD"); - // size_t targetVertexId = card->addrSpaceIdHostToDevice; - // const size_t mem_size = UINT64_MAX; - // mm.createMapping(reinterpret_cast(bar0_mapped), - // 0, mem_size, "vfio-h2d", srcVertexId, targetVertexId); + // // Switch + // srcVertexId = mm.getOrCreateAddressSpace("a0010000.axis_switch"); + // targetVertexId = mm.getOrCreateAddressSpace("axis_interconnect_0_xbar/Reg"); + // mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[1])), + // 0, ip_mem_size, "vfio to ip", srcVertexId, targetVertexId); + //! Hardcoded end //! Dev @@ -92,15 +61,26 @@ Zynq::init() // mm.getOrCreateAddressSpace(addrSpaceNameDeviceToHost); // auto pciAddrSpaceId = mm.getPciAddressSpace(); - // auto region = card->vfioDevice->regions[0]; - // int region_num = 0 - // auto pciBar = pcieToAxiTranslations.at("bar0"); + // auto regions = dynamic_cast(card)->pdev->getRegions(); - // mm.createMapping(region.start, pciBar.translation, bar0_size, - // std::string("PCI-") + barName, - // pciAddrSpaceId, card->addrSpaceIdHostToDevice); + // int i = 0; + // for (auto region : regions) { + // const size_t region_size = region.end - region.start + 1; + // char barName[] = "BARx"; + // barName[3] = '0' + region.num; + // auto pciBar = pcieToAxiTranslations.at(barName); + + // logger->info("PCI-BAR{}: bus addr={:#x} size={:#x}", + // region.num, region.start, region_size); + // logger->info("PCI-BAR{}: AXI translation offset {:#x}", + // i, pciBar.translation); + + // mm.createMapping(region.start, pciBar.translation, region_size, + // std::string("PCI-") + barName, + // pciAddrSpaceId, card->addrSpaceIdHostToDevice); + // } // for (auto& [barName, axiBar] : axiToPcieTranslations) { // logger->info("AXI-{}: bus addr={:#x} size={:#x}", @@ -119,21 +99,6 @@ Zynq::init() // i++; // } - - // auto const baseaddr = 2684354560; - // auto const size = 65536; - // srcVertexId = mm.getProcessAddressSpace(); - // targetVertexId = mm.findAddressSpace("zynq_ultra_ps_e_0/HPC1_DDR_LOW"); - // mm.createMapping(baseaddr, 0, size, - // std::string("AXI-") + "BAR0", - // targetVertexId, srcVertexId); - - // auto const highaddr = 2684420095; - // srcVertexId = mm.getProcessAddressSpace(); - // targetVertexId = mm.findAddressSpace("zynq_ultra_ps_e_0/HPC1_DDR_HIGH"); - // mm.createMapping(highaddr, 0, size, - // std::string("AXI-") + "BAR0", - // targetVertexId, srcVertexId); return true; } diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 6e66527c..52e9d940 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -26,12 +26,12 @@ PlatformCard::PlatformCard( this->vfioContainer = vfioContainer; this->logger = villas::logging.get("PlatformCard"); - // VFIO Group + // Create VFIO Group const int IOMMU_GROUP = 2; auto group = std::make_shared(IOMMU_GROUP, true); vfioContainer->attachGroup(group); - // VFIO Devices + // Open VFIO Devices const char* DEVICES[] = {"a0000000.dma", "a0010000.axis_switch"}; for(const char* DEVICE : DEVICES){ auto vfioDevice = std::make_shared( @@ -41,8 +41,30 @@ PlatformCard::PlatformCard( this->devices.push_back(vfioDevice); } - - this->vfioDevice = nullptr; //TODO: refactor + // Map all vfio devices in card to process + std::map, const void*> mapped_memory; + for (auto device : devices) + { + const void* mapping = device->regionMap(0); + if (mapping == MAP_FAILED) { + logger->error("Failed to mmap() device"); + } + logger->debug("memory mapped: {}", device->getName()); + mapped_memory.insert({device, mapping}); + } + + // Create mappings from process space to vfio devices + auto &mm = MemoryManager::get(); + size_t srcVertexId = mm.getProcessAddressSpace(); + for (auto pair : mapped_memory) + { + const size_t mem_size = pair.first->regionGetSize(0); + size_t targetVertexId = mm.getOrCreateAddressSpace(pair.first->getName()); + mm.createMapping(reinterpret_cast(pair.second), + 0, mem_size, "vfio-h2d", srcVertexId, targetVertexId); + logger->debug("create edge from process to {}", pair.first->getName()); + } + } std::list > From fc934375f34959e5e2e7072b63c25c4b50a8f2ae Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 13 Sep 2023 13:08:23 +0000 Subject: [PATCH 39/93] move print to graph --- .../index/boxes.hpp.87DB8D32D818C95F.idx | Bin 0 -> 292 bytes .../index/card.hpp.E962885EB82E5B91.idx | Bin 1504 -> 1432 bytes .../index/cpuset.hpp.29C967F0FFB2AA26.idx | Bin 0 -> 2870 bytes .../index/dino.hpp.F2200527AAB1A68C.idx | Bin 0 -> 4204 bytes .../clangd/index/i2c.cpp.ECE985B0CA67710A.idx | Bin 0 -> 5176 bytes .../clangd/index/i2c.hpp.A62DE7AD68346A0C.idx | Bin 0 -> 3956 bytes .../index/pcie_card.hpp.1EB46B7D807A9494.idx | Bin 1610 -> 1672 bytes .../clangd/index/rt.cpp.1799054D3BACE7A2.idx | Bin 0 -> 2028 bytes .../clangd/index/rt.hpp.D7800500AE5BCBE0.idx | Bin 0 -> 678 bytes .../clangd/index/sleep.h.B7D8E0B37E986C1E.idx | Bin 0 -> 186 bytes .../index/table.cpp.E88255E40EB4E742.idx | Bin 0 -> 2106 bytes .../index/table.hpp.17299A6AE15D0962.idx | Bin 0 -> 1584 bytes .../index/tool.cpp.9100FAD8FDC38E70.idx | Bin 0 -> 1656 bytes .../index/tool.hpp.89BA022D452C9E50.idx | Bin 0 -> 1192 bytes .../vfio_container.cpp.99D6A218F83BA167.idx | Bin 0 -> 4710 bytes .../villas-fpga-ctrl.cpp.17F6F3767A1DB26F.idx | Bin 0 -> 3626 bytes .../xaxis_switch_g.c.DB2D3CA8309D872C.idx | Bin 0 -> 530 bytes .../index/xiic_l.c.7A0693F6506DFD09.idx | Bin 0 -> 5402 bytes .../index/xilflash_amd.c.7E596DF8420727FC.idx | Bin 0 -> 422 bytes .../xllfifo_sinit.c.6224EA51EBD44161.idx | Bin 0 -> 836 bytes 20 files changed, 0 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13:14:04 +0000 Subject: [PATCH 40/93] warnings treated as warnings --- CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 0f5dbba0..3af4874d 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -15,7 +15,7 @@ set(CMAKE_MODULE_PATH ${CMAKE_CURRENT_LIST_DIR}/cmake) # Several CMake settings/defaults set(CMAKE_CXX_STANDARD 17) -set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -Wextra -Werror") +set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -Wextra") if(CMAKE_PROJECT_NAME STREQUAL PROJECT_NAME) set(TOPLEVEL_PROJECT ON) From 99615cc4d7f3b8331ca975047da090beeccacee4 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 20 Sep 2023 13:26:28 +0000 Subject: [PATCH 41/93] change submodule branch --- .gitmodules | 1 - lib/ips/zynq.cpp | 4 ++-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/.gitmodules b/.gitmodules index 65586052..c12e2121 100644 --- a/.gitmodules +++ b/.gitmodules @@ -6,7 +6,6 @@ [submodule "common"] path = common url = https://github.com/VILLASframework/common.git - branch = feature/vfioPlatform [submodule "thirdparty/libxil"] path = thirdparty/libxil url = https://github.com/VILLASframework/libxil.git diff --git a/lib/ips/zynq.cpp b/lib/ips/zynq.cpp index 3bd119d4..5ec02f59 100644 --- a/lib/ips/zynq.cpp +++ b/lib/ips/zynq.cpp @@ -24,8 +24,8 @@ using namespace villas::fpga::ip; bool Zynq::init() { - auto &mm = MemoryManager::get(); - auto platform_card = dynamic_cast(card); + // auto &mm = MemoryManager::get(); + // auto platform_card = dynamic_cast(card); //! Hardcoded edges vfios to ips //? Solve Strat: search for name From 367438cbd012f8fa43ca75db4ab4fb5c2a38f3ff Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 27 Sep 2023 11:36:48 +0000 Subject: [PATCH 42/93] load module --- src/platform.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/platform.cpp b/src/platform.cpp index 09b24028..f0d3da2b 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -162,7 +162,8 @@ std::shared_ptr setupCard(const std::string &configFilePath, const std::string &fpgaName) { auto configDir = std::filesystem::path(configFilePath).parent_path(); - auto vfioContainer = std::make_shared(); + std::vector modules {"vfio"}; + auto vfioContainer = std::make_shared(modules); // Parse FPGA configuration FILE* f = fopen(configFilePath.c_str(), "r"); From afd7c139b6c51935bd25881da111fd27212ac3fe Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Tue, 10 Oct 2023 10:29:22 +0000 Subject: [PATCH 43/93] change edge name --- lib/platform_card.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 52e9d940..6ba23b2b 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -61,7 +61,7 @@ PlatformCard::PlatformCard( const size_t mem_size = pair.first->regionGetSize(0); size_t targetVertexId = mm.getOrCreateAddressSpace(pair.first->getName()); mm.createMapping(reinterpret_cast(pair.second), - 0, mem_size, "vfio-h2d", srcVertexId, targetVertexId); + 0, mem_size, "vfio", srcVertexId, targetVertexId); logger->debug("create edge from process to {}", pair.first->getName()); } From a3f9f967870fbdbcbbc375aab3f0e361fe1b22b3 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 12 Oct 2023 14:37:18 +0000 Subject: [PATCH 44/93] hardcoded edges --- lib/ips/zynq.cpp | 152 +++++++++++++++++++++++------------------------ 1 file changed, 75 insertions(+), 77 deletions(-) diff --git a/lib/ips/zynq.cpp b/lib/ips/zynq.cpp index 5ec02f59..d6cb8e6d 100644 --- a/lib/ips/zynq.cpp +++ b/lib/ips/zynq.cpp @@ -24,83 +24,81 @@ using namespace villas::fpga::ip; bool Zynq::init() { - // auto &mm = MemoryManager::get(); - // auto platform_card = dynamic_cast(card); - - //! Hardcoded edges vfios to ips - //? Solve Strat: search for name - // DMA - // const size_t ip_mem_size = 65535; - // srcVertexId = mm.getOrCreateAddressSpace("a0000000.dma"); - // size_t targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0/Reg"); - // mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[0])), - // 0, ip_mem_size, "vfio to ip", srcVertexId, targetVertexId); - - // targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0:M_AXI_SG"); - // mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[0])), - // 0, ip_mem_size, "vfio to ip", srcVertexId, targetVertexId); - - // // Switch - // srcVertexId = mm.getOrCreateAddressSpace("a0010000.axis_switch"); - // targetVertexId = mm.getOrCreateAddressSpace("axis_interconnect_0_xbar/Reg"); - // mm.createMapping(reinterpret_cast(device_map.at(platform_card->devices[1])), - // 0, ip_mem_size, "vfio to ip", srcVertexId, targetVertexId); - //! Hardcoded end - - - //! Dev - // Make PCIe (IOVA) address space available to FPGA via BAR0 - - // // IPs that can access this address space will know it via their memory view - // const auto addrSpaceNameDeviceToHost = - // mm.getSlaveAddrSpaceName(getInstanceName(), pcieMemory); - - // // Save ID in card so we can create mappings later when needed (e.g. when - // // allocating DMA memory in host RAM) - // card->addrSpaceIdDeviceToHost = - // mm.getOrCreateAddressSpace(addrSpaceNameDeviceToHost); - - // auto pciAddrSpaceId = mm.getPciAddressSpace(); - - // auto regions = dynamic_cast(card)->pdev->getRegions(); - - // int i = 0; - // for (auto region : regions) { - // const size_t region_size = region.end - region.start + 1; - - // char barName[] = "BARx"; - // barName[3] = '0' + region.num; - // auto pciBar = pcieToAxiTranslations.at(barName); - - // logger->info("PCI-BAR{}: bus addr={:#x} size={:#x}", - // region.num, region.start, region_size); - // logger->info("PCI-BAR{}: AXI translation offset {:#x}", - // i, pciBar.translation); - - // mm.createMapping(region.start, pciBar.translation, region_size, - // std::string("PCI-") + barName, - // pciAddrSpaceId, card->addrSpaceIdHostToDevice); - // } - - // for (auto& [barName, axiBar] : axiToPcieTranslations) { - // logger->info("AXI-{}: bus addr={:#x} size={:#x}", - // barName, axiBar.base, axiBar.size); - // logger->info("AXI-{}: PCI translation offset: {:#x}", - // barName, axiBar.translation); - - // auto barXAddrSpaceName = mm.getSlaveAddrSpaceName(getInstanceName(), barName); - // auto barXAddrSpaceId = mm.getOrCreateAddressSpace(barXAddrSpaceName); - - // // Base is already incorporated into mapping of each IP by Vivado, so - // // the mapping src has to be 0 - // mm.createMapping(0, axiBar.translation, axiBar.size, - // std::string("AXI-") + barName, - // barXAddrSpaceId, pciAddrSpaceId); - - // i++; - // } - - return true; + auto &mm = MemoryManager::get(); + // auto platform_card = dynamic_cast(card); + + //! Hardcoded edges vfios to ips + //? Solve Strat: search for name + // DMA + const size_t ip_mem_size = 65535; + size_t srcVertexId = mm.getOrCreateAddressSpace("a0000000.dma"); + size_t targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0/Reg"); + mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, + targetVertexId); + + // Switch + srcVertexId = mm.getOrCreateAddressSpace("a0010000.axis_switch"); + targetVertexId = mm.getOrCreateAddressSpace("axis_interconnect_0_xbar/Reg"); + mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, + targetVertexId); + //! Hardcoded end + + //mm.getGraph().removeVertex(mm.getOrCreateAddressSpace("axis_interconnect_0_xbar/Reg")); + + //! Dev + // Make PCIe (IOVA) address space available to FPGA via BAR0 + + // // IPs that can access this address space will know it via their memory + // view const auto addrSpaceNameDeviceToHost = + // mm.getSlaveAddrSpaceName(getInstanceName(), pcieMemory); + + // // Save ID in card so we can create mappings later when needed (e.g. when + // // allocating DMA memory in host RAM) + // card->addrSpaceIdDeviceToHost = + // mm.getOrCreateAddressSpace(addrSpaceNameDeviceToHost); + + // auto pciAddrSpaceId = mm.getPciAddressSpace(); + + // auto regions = dynamic_cast(card)->pdev->getRegions(); + + // int i = 0; + // for (auto region : regions) { + // const size_t region_size = region.end - region.start + 1; + + // char barName[] = "BARx"; + // barName[3] = '0' + region.num; + // auto pciBar = pcieToAxiTranslations.at(barName); + + // logger->info("PCI-BAR{}: bus addr={:#x} size={:#x}", + // region.num, region.start, region_size); + // logger->info("PCI-BAR{}: AXI translation offset {:#x}", + // i, pciBar.translation); + + // mm.createMapping(region.start, pciBar.translation, region_size, + // std::string("PCI-") + barName, + // pciAddrSpaceId, card->addrSpaceIdHostToDevice); + // } + + // for (auto& [barName, axiBar] : axiToPcieTranslations) { + // logger->info("AXI-{}: bus addr={:#x} size={:#x}", + // barName, axiBar.base, axiBar.size); + // logger->info("AXI-{}: PCI translation offset: {:#x}", + // barName, axiBar.translation); + + // auto barXAddrSpaceName = mm.getSlaveAddrSpaceName(getInstanceName(), + // barName); auto barXAddrSpaceId = + // mm.getOrCreateAddressSpace(barXAddrSpaceName); + + // // Base is already incorporated into mapping of each IP by Vivado, so + // // the mapping src has to be 0 + // mm.createMapping(0, axiBar.translation, axiBar.size, + // std::string("AXI-") + barName, + // barXAddrSpaceId, pciAddrSpaceId); + + // i++; + // } + + return true; } void From 1dc821c0cbdd6c4d5952437d352b7de88112386f Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 12 Oct 2023 14:56:45 +0000 Subject: [PATCH 45/93] fix mem size --- lib/ips/zynq.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/ips/zynq.cpp b/lib/ips/zynq.cpp index d6cb8e6d..43692b81 100644 --- a/lib/ips/zynq.cpp +++ b/lib/ips/zynq.cpp @@ -30,7 +30,7 @@ Zynq::init() //! Hardcoded edges vfios to ips //? Solve Strat: search for name // DMA - const size_t ip_mem_size = 65535; + const size_t ip_mem_size = 65536; size_t srcVertexId = mm.getOrCreateAddressSpace("a0000000.dma"); size_t targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0/Reg"); mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, From 9b66879222bfbcc2a66a55cbcf56da2016dd3d6a Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 26 Oct 2023 14:12:32 +0000 Subject: [PATCH 46/93] add addrSpace Name Dev to host --- lib/ips/zynq.cpp | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/lib/ips/zynq.cpp b/lib/ips/zynq.cpp index 43692b81..ce1f9019 100644 --- a/lib/ips/zynq.cpp +++ b/lib/ips/zynq.cpp @@ -28,6 +28,16 @@ Zynq::init() // auto platform_card = dynamic_cast(card); //! Hardcoded edges vfios to ips + + // IPs that can access this address space will know it via their memory view + const auto addrSpaceNameDeviceToHost = + mm.getMasterAddrSpaceName("axi_dma_0", "M_AXI_SG"); + + // Save ID in card so we can create mappings later when needed (e.g. when + // allocating DMA memory in host RAM) + card->addrSpaceIdDeviceToHost = + mm.getOrCreateAddressSpace(addrSpaceNameDeviceToHost); + //? Solve Strat: search for name // DMA const size_t ip_mem_size = 65536; @@ -41,6 +51,7 @@ Zynq::init() targetVertexId = mm.getOrCreateAddressSpace("axis_interconnect_0_xbar/Reg"); mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, targetVertexId); + //! Hardcoded end //mm.getGraph().removeVertex(mm.getOrCreateAddressSpace("axis_interconnect_0_xbar/Reg")); From 5effd1b42b0ef83915883c15e104479acbf6a7e1 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Tue, 7 Nov 2023 11:07:16 +0000 Subject: [PATCH 47/93] script to bind devices --- scripts/bind_platform_vfio.sh | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/scripts/bind_platform_vfio.sh b/scripts/bind_platform_vfio.sh index 9bcee4cb..7e5599fa 100644 --- a/scripts/bind_platform_vfio.sh +++ b/scripts/bind_platform_vfio.sh @@ -7,8 +7,13 @@ # SPDX-License-Identifier: Apache-2.0 ################################################################################## +modprobe vfio_platform reset_required=0 + # Unbind Device from driver echo a0000000.dma > /sys/bus/platform/drivers/xilinx-vdma/unbind # Bind device echo vfio-platform > /sys/bus/platform/devices/a0000000.dma/driver_override echo a0000000.dma > /sys/bus/platform/drivers/vfio-platform/bind + +# Other vfio devices without driver override +echo a0010000.axis_switch > /sys/bus/platform/drivers_probe From 28551f6fdfad65e0ad933578038469e7836c6440 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Tue, 7 Nov 2023 11:07:45 +0000 Subject: [PATCH 48/93] remove debug message --- .cache/clangd/index/emc.cpp.C52CCA3C8742D3D3.idx | Bin 0 -> 1698 bytes .cache/clangd/index/emc.hpp.A647DBA5F70F2D79.idx | Bin 0 -> 810 bytes .../index/platform.cpp.BB57FFA3632D49E1.idx | Bin 0 -> 2832 bytes .../clangd/index/popen.cpp.9A914BC65BAEB222.idx | Bin 0 -> 1966 bytes .../clangd/index/popen.hpp.4802FA0F7F079FC2.idx | Bin 0 -> 2302 bytes .../clangd/index/xaxidma.c.C858AA2C7F861043.idx | Bin 0 -> 7508 bytes .../clangd/index/xtmrctr.c.D06958DD9C715760.idx | Bin 0 -> 4910 bytes .../index/xtmrctr_i.h.2A28AB99E7BBFC53.idx | Bin 0 -> 228 bytes 8 files changed, 0 insertions(+), 0 deletions(-) create mode 100644 .cache/clangd/index/emc.cpp.C52CCA3C8742D3D3.idx create mode 100644 .cache/clangd/index/emc.hpp.A647DBA5F70F2D79.idx create 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0000000000000000000000000000000000000000..59e75cd366fc6919b4d468302b0c310fa84d24dd GIT binary patch literal 228 zcmWIYbaT7Iz`)>~;#rZKT9U{DWb*=XaY<2T9FXn-;)*#_&sg&{C Date: Tue, 7 Nov 2023 11:07:59 +0000 Subject: [PATCH 49/93] change fpga id --- etc/fpgas.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/etc/fpgas.json b/etc/fpgas.json index cdaa9bfb..c8409e3a 100644 --- a/etc/fpgas.json +++ b/etc/fpgas.json @@ -1,6 +1,6 @@ { "fpgas": { - "vc707": { + "zcu106": { "id": "10ee:7021", "slot": "0000:88:00.0", "do_reset": true, From f4f07b151fb97e868f331f408f43289adf0400c0 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Tue, 7 Nov 2023 11:08:15 +0000 Subject: [PATCH 50/93] change card name --- src/platform.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/platform.cpp b/src/platform.cpp index f0d3da2b..695d1a5a 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -215,7 +215,7 @@ int main() { logging.setLevel(spdlog::level::debug); - std::shared_ptr card = setupCard("/home/root/fpga/build/src/fpgas.json","PlatformCard"); + std::shared_ptr card = setupCard("/home/root/fpga/build/src/fpgas.json","zcu106"); auto dma = std::dynamic_pointer_cast( card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:"))); From 48d9368ccda27476c09173188ac8c48588f47d3a Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Tue, 7 Nov 2023 12:15:26 +0000 Subject: [PATCH 51/93] module loading as parameter --- include/villas/fpga/platform_card.hpp | 8 +++++--- lib/platform_card.cpp | 14 +++++++++----- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/include/villas/fpga/platform_card.hpp b/include/villas/fpga/platform_card.hpp index 1b7178d3..21c0c015 100644 --- a/include/villas/fpga/platform_card.hpp +++ b/include/villas/fpga/platform_card.hpp @@ -18,10 +18,12 @@ namespace fpga { class PlatformCard : public Card { public: - PlatformCard(std::shared_ptr vfioContainer); - ~PlatformCard(){}; + PlatformCard(std::shared_ptr vfioContainer, + std::vector device_names); - std::vector> devices; + ~PlatformCard(){}; + + std::vector> devices; private: }; diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 6ba23b2b..6490d428 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -21,7 +21,9 @@ using namespace villas::fpga; PlatformCard::PlatformCard( - std::shared_ptr vfioContainer) + std::shared_ptr vfioContainer, + std::vector device_names + ) { this->vfioContainer = vfioContainer; this->logger = villas::logging.get("PlatformCard"); @@ -32,10 +34,9 @@ PlatformCard::PlatformCard( vfioContainer->attachGroup(group); // Open VFIO Devices - const char* DEVICES[] = {"a0000000.dma", "a0010000.axis_switch"}; - for(const char* DEVICE : DEVICES){ + for(std::string device_name : device_names){ auto vfioDevice = std::make_shared( - DEVICE, + device_name, group->getFileDescriptor()); group->attachDevice(vfioDevice); this->devices.push_back(vfioDevice); @@ -101,7 +102,10 @@ PlatformCardFactory::make(json_t *json, if (ret != 0) throw ConfigError(json_card, err, "", "Failed to parse card"); - auto card = std::make_unique(vc); + //TODO: parse from json + std::vector device_names{"a0000000.dma", "a0010000.axis_switch"}; + + auto card = std::make_unique(vc, device_names); // Populate generic properties card->name = std::string(card_name); From af20f7951f95cf6e2e7509e380be3b9df9dd0841 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 9 Nov 2023 12:55:55 +0000 Subject: [PATCH 52/93] draft: auto generate edges --- lib/ips/zynq.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/lib/ips/zynq.cpp b/lib/ips/zynq.cpp index ce1f9019..902c2988 100644 --- a/lib/ips/zynq.cpp +++ b/lib/ips/zynq.cpp @@ -38,6 +38,18 @@ Zynq::init() card->addrSpaceIdDeviceToHost = mm.getOrCreateAddressSpace(addrSpaceNameDeviceToHost); + /* + auto platform_card = dynamic_cast(card); + for(auto vfio_device : platform_card->devices) + { + const size_t ip_mem_size = 65536; + size_t srcVertexId = mm.getOrCreateAddressSpace(DEVICE_TREE_NAME); + size_t targetVertexId = mm.getOrCreateAddressSpace(MEMORY_GRAPH_NAME/Reg); + mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, + targetVertexId); + } + */ + //? Solve Strat: search for name // DMA const size_t ip_mem_size = 65536; From 00b9cfd253b83b53f9d425e805519581c2732bce Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 9 Nov 2023 12:59:17 +0000 Subject: [PATCH 53/93] add copyright --- src/platform.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/platform.cpp b/src/platform.cpp index 695d1a5a..1075ed2d 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -1,3 +1,7 @@ +/** + * SPDX-FileCopyrightText: 2018 Institute for Automation of Complex Power Systems, EONERC + * SPDX-License-Identifier: Apache-2.0 + *********************************************************************************/ #include #include From 33a1f211f5c7e49d19231b35b863b3a7551eed05 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 9 Nov 2023 15:26:31 +0000 Subject: [PATCH 54/93] change edge name --- lib/platform_card.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 6490d428..08d0d018 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -62,7 +62,7 @@ PlatformCard::PlatformCard( const size_t mem_size = pair.first->regionGetSize(0); size_t targetVertexId = mm.getOrCreateAddressSpace(pair.first->getName()); mm.createMapping(reinterpret_cast(pair.second), - 0, mem_size, "vfio", srcVertexId, targetVertexId); + 0, mem_size, "process to vfio", srcVertexId, targetVertexId); logger->debug("create edge from process to {}", pair.first->getName()); } From 6bdc22fe41a0dd113a88176ae604ca8bc1ce2a90 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 15 Nov 2023 22:12:17 +0000 Subject: [PATCH 55/93] override mapMemoryBlock --- include/villas/fpga/platform_card.hpp | 3 +++ lib/platform_card.cpp | 36 +++++++++++++++++++++++++++ 2 files changed, 39 insertions(+) diff --git a/include/villas/fpga/platform_card.hpp b/include/villas/fpga/platform_card.hpp index 21c0c015..7aafde9f 100644 --- a/include/villas/fpga/platform_card.hpp +++ b/include/villas/fpga/platform_card.hpp @@ -24,6 +24,9 @@ class PlatformCard : public Card ~PlatformCard(){}; std::vector> devices; + + bool mapMemoryBlock(const std::shared_ptr block) override; + private: }; diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 08d0d018..0c957c77 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -65,7 +65,43 @@ PlatformCard::PlatformCard( 0, mem_size, "process to vfio", srcVertexId, targetVertexId); logger->debug("create edge from process to {}", pair.first->getName()); } +} + +bool PlatformCard::mapMemoryBlock(const std::shared_ptr block) { + //! VFIO CONTAINER REPLACED BY DEVICES + + if (not vfioContainer->isIommuEnabled()) { + logger->warn("VFIO mapping not supported without IOMMU"); + return false; + } + + auto &mm = MemoryManager::get(); + const auto &addrSpaceId = block->getAddrSpaceId(); + + if (memoryBlocksMapped.find(addrSpaceId) != memoryBlocksMapped.end()) + // Block already mapped + return true; + else + logger->debug("Create VFIO-Platform mapping for {}", addrSpaceId); + + auto translationFromProcess = mm.getTranslationFromProcess(addrSpaceId); + uintptr_t processBaseAddr = translationFromProcess.getLocalAddr(0); + uintptr_t iovaAddr = + vfioContainer->memoryMap(processBaseAddr, UINTPTR_MAX, block->getSize()); + + if (iovaAddr == UINTPTR_MAX) { + logger->error("Cannot map memory at {:#x} of size {:#x}", processBaseAddr, + block->getSize()); + return false; + } + + mm.createMapping(iovaAddr, 0, block->getSize(), "VFIO-D2H", + this->addrSpaceIdDeviceToHost, addrSpaceId); + + // Remember that this block has already been mapped for later + memoryBlocksMapped.insert({addrSpaceId, block}); + return true; } std::list > From b83f5efb042f79f0126c5ee3cd221dbf32cef0f4 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Tue, 21 Nov 2023 14:23:52 +0000 Subject: [PATCH 56/93] update gitignore --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index be42f1fc..c6f11fb0 100644 --- a/.gitignore +++ b/.gitignore @@ -13,4 +13,5 @@ build/ graph.dot .clang-format +.cache miob/ \ No newline at end of file From 93d9203702a311a6c5171e2368b031692fb8d73c Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Tue, 21 Nov 2023 15:10:53 +0000 Subject: [PATCH 57/93] remove comment --- lib/platform_card.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 0c957c77..d058312f 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -68,8 +68,6 @@ PlatformCard::PlatformCard( } bool PlatformCard::mapMemoryBlock(const std::shared_ptr block) { - //! VFIO CONTAINER REPLACED BY DEVICES - if (not vfioContainer->isIommuEnabled()) { logger->warn("VFIO mapping not supported without IOMMU"); return false; From 4e10e2f176554e3792a8eadf64e16ffb2e5d0e66 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 6 Dec 2023 14:44:58 +0000 Subject: [PATCH 58/93] make facotry use card class --- include/villas/fpga/platform_card.hpp | 2 +- src/platform.cpp | 48 +++++++++++++-------------- 2 files changed, 25 insertions(+), 25 deletions(-) diff --git a/include/villas/fpga/platform_card.hpp b/include/villas/fpga/platform_card.hpp index 7aafde9f..eb09b67e 100644 --- a/include/villas/fpga/platform_card.hpp +++ b/include/villas/fpga/platform_card.hpp @@ -34,7 +34,7 @@ class PlatformCard : public Card class PlatformCardFactory { public: - static std::list> make(json_t *json, + static std::list> make(json_t *json, std::shared_ptr vc, const std::filesystem::path& searchPath); }; diff --git a/src/platform.cpp b/src/platform.cpp index 1075ed2d..d3e8cf70 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -30,31 +30,31 @@ void writeToDmaFromStdIn(std::shared_ptr dma) logger->info( "Please enter values to write to the device, separated by ';'"); - while(true) { - // Read values from stdin - std::string line; - std::getline(std::cin, line); - auto values = villas::utils::tokenize(line, ";"); - - size_t i = 0; - for(auto &value : values) { - if(value.empty()) - continue; - - const float number = std::stof(value); - mem[i++] = number; - } - // Initiate write transfer - bool state = dma->write(*block, i * sizeof(float)); - if(!state) - logger->error("Failed to write to device"); + // Read values from stdin + std::string line; + std::getline(std::cin, line); + auto values = villas::utils::tokenize(line, ";"); - // auto writeComp = dma->writeComplete(); - usleep(5 * SEC_IN_USEC); // some magic numbers + size_t i = 0; + for(auto &value : values) { + if(value.empty()) + continue; - // logger->debug("Wrote {} bytes", writeComp.bytes); + const float number = std::stof(value); + mem[i++] = number; } + + // Initiate write transfer + bool state = dma->write(*block, i * sizeof(float)); + if(!state) + logger->error("Failed to write to device"); + + // auto writeComp = dma->writeComplete(); + usleep(5 * SEC_IN_USEC); // some magic numbers + + // logger->debug("Wrote {} bytes", writeComp.bytes); + // auto &alloc = villas::HostRam::getAllocator(); // const std::shared_ptr block[] = { @@ -162,7 +162,7 @@ void readFromDmaToStdOut( -std::shared_ptr +std::shared_ptr setupCard(const std::string &configFilePath, const std::string &fpgaName) { auto configDir = std::filesystem::path(configFilePath).parent_path(); @@ -199,7 +199,7 @@ setupCard(const std::string &configFilePath, const std::string &fpgaName) // Create all FPGA card instances using the corresponding plugin auto cards = PlatformCardFactory::make(fpgas, vfioContainer, configDir); - std::shared_ptr card; + std::shared_ptr card; for (auto &fpgaCard : cards) { if (fpgaCard->name == fpgaName) { return fpgaCard; @@ -219,7 +219,7 @@ int main() { logging.setLevel(spdlog::level::debug); - std::shared_ptr card = setupCard("/home/root/fpga/build/src/fpgas.json","zcu106"); + std::shared_ptr card = setupCard("/home/root/fpga/build/src/fpgas.json","zcu106"); auto dma = std::dynamic_pointer_cast( card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:"))); From 49350f80548bc7eae53f2c2765bffd69d084b77f Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 6 Dec 2023 14:45:30 +0000 Subject: [PATCH 59/93] add parser class --- include/villas/fpga/cardParser.hpp | 40 +++++++ lib/platform_card.cpp | 166 +++++++++-------------------- 2 files changed, 90 insertions(+), 116 deletions(-) create mode 100644 include/villas/fpga/cardParser.hpp diff --git a/include/villas/fpga/cardParser.hpp b/include/villas/fpga/cardParser.hpp new file mode 100644 index 00000000..efd679b0 --- /dev/null +++ b/include/villas/fpga/cardParser.hpp @@ -0,0 +1,40 @@ +#include "villas/exceptions.hpp" +#include "villas/log.hpp" +#include +#include + +class CardParser { +public: + std::shared_ptr logger; + + json_t *json_ips = nullptr; + json_t *json_paths = nullptr; + const char *pci_slot = nullptr; + const char *pci_id = nullptr; + int do_reset = 0; + int affinity = 0; + int polling = 0; + json_t *devices = nullptr; + std::vector device_names; + + CardParser(json_t *json_card) : logger(villas::logging.get("CardParser")) { + json_error_t err; + int ret = json_unpack_ex( + json_card, &err, 0, + "{ s: o, s?: i, s?: b, s?: s, s?: s, s?: b, s?: o, s?: o }", "ips", + &json_ips, "affinity", &affinity, "do_reset", &do_reset, "slot", + &pci_slot, "id", &pci_id, "polling", &polling, "paths", &json_paths, + "devices", &devices); + + if (ret != 0) + throw villas::ConfigError(json_card, err, "", "Failed to parse card"); + + // devices array parsing + size_t index; + json_t *value; + json_array_foreach(devices, index, value) { + auto str = json_string_value(value); + device_names.push_back(str); + } + } +}; diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index d058312f..3b1d7881 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -6,7 +6,7 @@ * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power *Systems, EONERC SPDX-License-Identifier: Apache-2.0 *********************************************************************************/ - +#include #include #include @@ -15,6 +15,7 @@ #include #include #include +#include using namespace villas; using namespace villas::fpga; @@ -102,126 +103,59 @@ bool PlatformCard::mapMemoryBlock(const std::shared_ptr block) { return true; } -std::list > +std::list> PlatformCardFactory::make(json_t *json, std::shared_ptr vc, const std::filesystem::path& searchPath) { - std::list> cards; - auto logger = villas::logging.get("PlatformCard"); - - const char *card_name; - json_t *json_card; - json_object_foreach(json, card_name, json_card) { - logger->info("Found config for FPGA card {}", card_name); - - json_t* json_ips = nullptr; - json_t* json_paths = nullptr; - const char* pci_slot = nullptr; - const char* pci_id = nullptr; - int do_reset = 0; - int affinity = 0; - int polling = 0; - - json_error_t err; - int ret = json_unpack_ex(json_card, &err, 0, "{ s: o, s?: i, s?: b, s?: s, s?: s, s?: b, s?: o }", - "ips", &json_ips, - "affinity", &affinity, - "do_reset", &do_reset, - "slot", &pci_slot, - "id", &pci_id, - "polling", &polling, - "paths", &json_paths); - - if (ret != 0) - throw ConfigError(json_card, err, "", "Failed to parse card"); - - //TODO: parse from json - std::vector device_names{"a0000000.dma", "a0010000.axis_switch"}; - - auto card = std::make_unique(vc, device_names); - - // Populate generic properties - card->name = std::string(card_name); - card->vfioContainer = vc; - card->affinity = affinity; - card->doReset = do_reset != 0; - card->polling = (polling != 0); - - // if (not card->init()) { - // logger->warn("Cannot start FPGA card {}", card_name); - // continue; - // } - - // Load IPs from a separate json file - if (!json_is_string(json_ips)) { - logger->debug("FPGA IP cores config item is not a string."); - throw ConfigError(json_ips, "node-config-fpga-ips", "FPGA IP cores config item is not a string."); - } - if (!searchPath.empty()) { - std::filesystem::path json_ips_path = searchPath / json_string_value(json_ips); - logger->debug("searching for FPGA IP cors config at {}", json_ips_path); - json_ips = json_load_file(json_ips_path.c_str(), 0, nullptr); - } - if (json_ips == nullptr) { - json_ips = json_load_file(json_string_value(json_ips), 0, nullptr); - logger->debug("searching for FPGA IP cors config at {}", json_string_value(json_ips)); - if (json_ips == nullptr) { - throw ConfigError(json_ips, "node-config-fpga-ips", "Failed to find FPGA IP cores config"); + std::list> cards; + auto logger = villas::logging.get("PlatformCard"); + + const char *card_name; + json_t *json_card; + json_object_foreach(json, card_name, json_card) { + logger->info("Found config for FPGA card {}", card_name); + + // Parse and create card + CardParser parser(json_card); + + auto card = std::make_unique(vc, parser.device_names); + card->name = std::string(card_name); + card->affinity = parser.affinity; + card->doReset = parser.do_reset != 0; + card->polling = (parser.polling != 0); + + // if (not card->init()) { + // logger->warn("Cannot start FPGA card {}", card_name); + // continue; + // } + + // Load IPs from a separate json file + if (!json_is_string(parser.json_ips)) { + logger->debug("FPGA IP cores config item is not a string."); + throw ConfigError(parser.json_ips, "node-config-fpga-ips", "FPGA IP cores config item is not a string."); } - } + if (!searchPath.empty()) { + std::filesystem::path json_ips_path = searchPath / json_string_value(parser.json_ips); + logger->debug("searching for FPGA IP cors config at {}", json_ips_path); + parser.json_ips = json_load_file(json_ips_path.c_str(), 0, nullptr); + } + if (parser.json_ips == nullptr) { + parser.json_ips = json_load_file(json_string_value(parser.json_ips), 0, nullptr); + logger->debug("searching for FPGA IP cors config at {}", json_string_value(parser.json_ips)); + if (parser.json_ips == nullptr) { + throw ConfigError(parser.json_ips, "node-config-fpga-ips", "Failed to find FPGA IP cores config"); + } + } + + if (not json_is_object(parser.json_ips)) + throw ConfigError(parser.json_ips, "node-config-fpga-ips", "FPGA IP core list must be an object!"); - if (not json_is_object(json_ips)) - throw ConfigError(json_ips, "node-config-fpga-ips", "FPGA IP core list must be an object!"); - - card->ips = ip::CoreFactory::make(card.get(), json_ips); - if (card->ips.empty()) - throw ConfigError(json_ips, "node-config-fpga-ips", "Cannot initialize IPs of FPGA card {}", card_name); - - // if (not card->check()) - // throw RuntimeError("Checking of FPGA card {} failed", card_name); - - // // Additional static paths for AXI-Steram switch - // if (json_paths != nullptr) { - // if (not json_is_array(json_paths)) - // throw ConfigError(json_paths, err, "", "Switch path configuration must be an array"); - - // size_t i; - // json_t *json_path; - // json_array_foreach(json_paths, i, json_path) { - // const char *from, *to; - // int reverse = 0; - - // ret = json_unpack_ex(json_path, &err, 0, "{ s: s, s: s, s?: b }", - // "from", &from, - // "to", &to, - // "reverse", &reverse - // ); - // if (ret != 0) - // throw ConfigError(json_path, err, "", "Cannot parse switch path config"); - - // auto masterIpCore = card->lookupIp(from); - // if (!masterIpCore) - // throw ConfigError(json_path, "", "Unknown IP {}", from); - - // auto slaveIpCore = card->lookupIp(to); - // if (!slaveIpCore) - // throw ConfigError(json_path, "", "Unknown IP {}", to); - - // auto masterIpNode = std::dynamic_pointer_cast(masterIpCore); - // if (!masterIpNode) - // throw ConfigError(json_path, "", "IP {} is not a streaming node", from); - - // auto slaveIpNode = std::dynamic_pointer_cast(slaveIpCore); - // if (!slaveIpNode) - // throw ConfigError(json_path, "", "IP {} is not a streaming node", to); - - // if (not masterIpNode->connect(*slaveIpNode, reverse != 0)) - // throw ConfigError(json_path, "", "Failed to connect node {} to {}", from, to); - // } - // } - - cards.push_back(std::move(card)); - } + card->ips = ip::CoreFactory::make(card.get(), parser.json_ips); + if (card->ips.empty()) + throw ConfigError(parser.json_ips, "node-config-fpga-ips", "Cannot initialize IPs of FPGA card {}", card_name); + + cards.push_back(std::move(card)); + } return cards; } From 5d110c466a3a1b7222d880b2e2ef04029276c00b Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 6 Dec 2023 14:52:44 +0000 Subject: [PATCH 60/93] fix missing include guard --- include/villas/fpga/cardParser.hpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/villas/fpga/cardParser.hpp b/include/villas/fpga/cardParser.hpp index efd679b0..4ba86dd3 100644 --- a/include/villas/fpga/cardParser.hpp +++ b/include/villas/fpga/cardParser.hpp @@ -1,3 +1,5 @@ +#pragma once + #include "villas/exceptions.hpp" #include "villas/log.hpp" #include From dbab8c9194245367846a8181a2582591f116f877 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 6 Dec 2023 15:03:59 +0000 Subject: [PATCH 61/93] rename card parser --- include/villas/fpga/{cardParser.hpp => card_parser.hpp} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename include/villas/fpga/{cardParser.hpp => card_parser.hpp} (100%) diff --git a/include/villas/fpga/cardParser.hpp b/include/villas/fpga/card_parser.hpp similarity index 100% rename from include/villas/fpga/cardParser.hpp rename to include/villas/fpga/card_parser.hpp From f1861eff0dead537236b1761f36915b79429a941 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 6 Dec 2023 15:04:29 +0000 Subject: [PATCH 62/93] add ip loader class --- include/villas/fpga/ip_loader.hpp | 44 +++++++++++++++++++++++++++++++ lib/platform_card.cpp | 22 ++-------------- 2 files changed, 46 insertions(+), 20 deletions(-) create mode 100644 include/villas/fpga/ip_loader.hpp diff --git a/include/villas/fpga/ip_loader.hpp b/include/villas/fpga/ip_loader.hpp new file mode 100644 index 00000000..2d88b64b --- /dev/null +++ b/include/villas/fpga/ip_loader.hpp @@ -0,0 +1,44 @@ +#pragma once + +#include "villas/exceptions.hpp" +#include "villas/log.hpp" +#include +#include +#include + +using villas::ConfigError; + +class IpLoader { +public: + std::shared_ptr logger; + + + IpLoader(json_t* json_ips, const std::filesystem::path& searchPath): logger(villas::logging.get("IpParser")) { + // Load IPs from a separate json file + if (!json_is_string(json_ips)) { + logger->debug("FPGA IP cores config item is not a string."); + throw ConfigError(json_ips, "node-config-fpga-ips", + "FPGA IP cores config item is not a string."); + } + if (!searchPath.empty()) { + std::filesystem::path json_ips_path = + searchPath / json_string_value(json_ips); + logger->debug("searching for FPGA IP cors config at {}", json_ips_path); + json_ips = json_load_file(json_ips_path.c_str(), 0, nullptr); + } + if (json_ips == nullptr) { + json_ips = + json_load_file(json_string_value(json_ips), 0, nullptr); + logger->debug("searching for FPGA IP cors config at {}", + json_string_value(json_ips)); + if (json_ips == nullptr) { + throw ConfigError(json_ips, "node-config-fpga-ips", + "Failed to find FPGA IP cores config"); + } + } + + if (not json_is_object(json_ips)) + throw ConfigError(json_ips, "node-config-fpga-ips", + "FPGA IP core list must be an object!"); + } +}; diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 3b1d7881..bc296c65 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -16,6 +16,7 @@ #include #include #include +#include using namespace villas; using namespace villas::fpga; @@ -130,26 +131,7 @@ PlatformCardFactory::make(json_t *json, // continue; // } - // Load IPs from a separate json file - if (!json_is_string(parser.json_ips)) { - logger->debug("FPGA IP cores config item is not a string."); - throw ConfigError(parser.json_ips, "node-config-fpga-ips", "FPGA IP cores config item is not a string."); - } - if (!searchPath.empty()) { - std::filesystem::path json_ips_path = searchPath / json_string_value(parser.json_ips); - logger->debug("searching for FPGA IP cors config at {}", json_ips_path); - parser.json_ips = json_load_file(json_ips_path.c_str(), 0, nullptr); - } - if (parser.json_ips == nullptr) { - parser.json_ips = json_load_file(json_string_value(parser.json_ips), 0, nullptr); - logger->debug("searching for FPGA IP cors config at {}", json_string_value(parser.json_ips)); - if (parser.json_ips == nullptr) { - throw ConfigError(parser.json_ips, "node-config-fpga-ips", "Failed to find FPGA IP cores config"); - } - } - - if (not json_is_object(parser.json_ips)) - throw ConfigError(parser.json_ips, "node-config-fpga-ips", "FPGA IP core list must be an object!"); + IpLoader ipLoader(parser.json_ips, searchPath); card->ips = ip::CoreFactory::make(card.get(), parser.json_ips); if (card->ips.empty()) From d3521756f914ca68d5c7bbb5db84f9ecb2660e58 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 6 Dec 2023 15:05:09 +0000 Subject: [PATCH 63/93] rename imports --- lib/platform_card.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index bc296c65..1e049916 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -15,8 +15,8 @@ #include #include #include -#include -#include +#include +#include using namespace villas; using namespace villas::fpga; From febbbb0f33c17d3f0df77612ca641fa0a207933b Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 7 Dec 2023 12:39:07 +0000 Subject: [PATCH 64/93] move vfio ip connection to method --- include/villas/fpga/platform_card.hpp | 1 + lib/ips/zynq.cpp | 27 ++------------------------- lib/platform_card.cpp | 25 +++++++++++++++++++++++++ 3 files changed, 28 insertions(+), 25 deletions(-) diff --git a/include/villas/fpga/platform_card.hpp b/include/villas/fpga/platform_card.hpp index eb09b67e..28052052 100644 --- a/include/villas/fpga/platform_card.hpp +++ b/include/villas/fpga/platform_card.hpp @@ -25,6 +25,7 @@ class PlatformCard : public Card std::vector> devices; + void connectVFIOtoIPS(); bool mapMemoryBlock(const std::shared_ptr block) override; private: diff --git a/lib/ips/zynq.cpp b/lib/ips/zynq.cpp index 902c2988..486cf6d3 100644 --- a/lib/ips/zynq.cpp +++ b/lib/ips/zynq.cpp @@ -37,32 +37,9 @@ Zynq::init() // allocating DMA memory in host RAM) card->addrSpaceIdDeviceToHost = mm.getOrCreateAddressSpace(addrSpaceNameDeviceToHost); + + dynamic_cast(card)->connectVFIOtoIPS(); - /* - auto platform_card = dynamic_cast(card); - for(auto vfio_device : platform_card->devices) - { - const size_t ip_mem_size = 65536; - size_t srcVertexId = mm.getOrCreateAddressSpace(DEVICE_TREE_NAME); - size_t targetVertexId = mm.getOrCreateAddressSpace(MEMORY_GRAPH_NAME/Reg); - mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, - targetVertexId); - } - */ - - //? Solve Strat: search for name - // DMA - const size_t ip_mem_size = 65536; - size_t srcVertexId = mm.getOrCreateAddressSpace("a0000000.dma"); - size_t targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0/Reg"); - mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, - targetVertexId); - - // Switch - srcVertexId = mm.getOrCreateAddressSpace("a0010000.axis_switch"); - targetVertexId = mm.getOrCreateAddressSpace("axis_interconnect_0_xbar/Reg"); - mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, - targetVertexId); //! Hardcoded end diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 1e049916..cbcc30e9 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -69,6 +69,31 @@ PlatformCard::PlatformCard( } } +void PlatformCard::connectVFIOtoIPS() +{ + auto &mm = MemoryManager::get(); + const size_t ip_mem_size = 65536; + size_t srcVertexId = mm.getOrCreateAddressSpace("a0000000.dma"); + size_t targetVertexId = mm.getOrCreateAddressSpace("axi_dma_0/Reg"); + mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, + targetVertexId); + + // Switch + srcVertexId = mm.getOrCreateAddressSpace("a0010000.axis_switch"); + targetVertexId = mm.getOrCreateAddressSpace("axis_interconnect_0_xbar/Reg"); + mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, + targetVertexId); + + for(auto device : devices) + { + const size_t ip_mem_size = 65536; + size_t srcVertexId = mm.getOrCreateAddressSpace(device->getName()); + size_t targetVertexId = mm.getOrCreateAddressSpace("MEMORY_GRAPH_NAME/Reg"); + mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, + targetVertexId); + } +} + bool PlatformCard::mapMemoryBlock(const std::shared_ptr block) { if (not vfioContainer->isIommuEnabled()) { logger->warn("VFIO mapping not supported without IOMMU"); From 2161839dbf5cca44a488ae3f75d2c317d268ecf9 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 7 Dec 2023 12:54:17 +0000 Subject: [PATCH 65/93] keep hardcoded connections --- lib/platform_card.cpp | 49 ++++++++++++++++++++++++++++++++++--------- 1 file changed, 39 insertions(+), 10 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index cbcc30e9..386922a4 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -6,6 +6,7 @@ * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power *Systems, EONERC SPDX-License-Identifier: Apache-2.0 *********************************************************************************/ +#include "villas/fpga/ips/dma.hpp" #include #include @@ -84,14 +85,14 @@ void PlatformCard::connectVFIOtoIPS() mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, targetVertexId); - for(auto device : devices) - { - const size_t ip_mem_size = 65536; - size_t srcVertexId = mm.getOrCreateAddressSpace(device->getName()); - size_t targetVertexId = mm.getOrCreateAddressSpace("MEMORY_GRAPH_NAME/Reg"); - mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, - targetVertexId); - } + // for(auto device : devices) + // { + // const size_t ip_mem_size = 65536; + // size_t srcVertexId = mm.getOrCreateAddressSpace(device->getName()); + // size_t targetVertexId = mm.getOrCreateAddressSpace("MEMORY_GRAPH_NAME/Reg"); + // mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, + // targetVertexId); + // } } bool PlatformCard::mapMemoryBlock(const std::shared_ptr block) { @@ -132,7 +133,7 @@ bool PlatformCard::mapMemoryBlock(const std::shared_ptr block) { std::list> PlatformCardFactory::make(json_t *json, std::shared_ptr vc, - const std::filesystem::path& searchPath) + const std::filesystem::path& searchPath) { std::list> cards; auto logger = villas::logging.get("PlatformCard"); @@ -156,7 +157,35 @@ PlatformCardFactory::make(json_t *json, // continue; // } - IpLoader ipLoader(parser.json_ips, searchPath); + // json_incref(parser.json_ips); + // IpLoader ipLoader(parser.json_ips, searchPath); + + // Load IPs from a separate json file + if (!json_is_string(parser.json_ips)) { + logger->debug("FPGA IP cores config item is not a string."); + throw ConfigError(parser.json_ips, "node-config-fpga-ips", + "FPGA IP cores config item is not a string."); + } + if (!searchPath.empty()) { + std::filesystem::path json_ips_path = + searchPath / json_string_value(parser.json_ips); + logger->debug("searching for FPGA IP cors config at {}", json_ips_path); + parser.json_ips = json_load_file(json_ips_path.c_str(), 0, nullptr); + } + if (parser.json_ips == nullptr) { + parser.json_ips = + json_load_file(json_string_value(parser.json_ips), 0, nullptr); + logger->debug("searching for FPGA IP cors config at {}", + json_string_value(parser.json_ips)); + if (parser.json_ips == nullptr) { + throw ConfigError(parser.json_ips, "node-config-fpga-ips", + "Failed to find FPGA IP cores config"); + } + } + + if (not json_is_object(parser.json_ips)) + throw ConfigError(parser.json_ips, "node-config-fpga-ips", + "FPGA IP core list must be an object!"); card->ips = ip::CoreFactory::make(card.get(), parser.json_ips); if (card->ips.empty()) From b2207192382a4de02f685b498f7430fbaa515c15 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Mon, 11 Dec 2023 14:28:59 +0000 Subject: [PATCH 66/93] device tree name to value --- lib/platform_card.cpp | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 386922a4..8d5c84e9 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -8,6 +8,7 @@ *********************************************************************************/ #include "villas/fpga/ips/dma.hpp" #include +#include #include #include @@ -32,7 +33,7 @@ PlatformCard::PlatformCard( this->logger = villas::logging.get("PlatformCard"); // Create VFIO Group - const int IOMMU_GROUP = 2; + const int IOMMU_GROUP = 2; //TODO: find Group auto group = std::make_shared(IOMMU_GROUP, true); vfioContainer->attachGroup(group); @@ -85,14 +86,22 @@ void PlatformCard::connectVFIOtoIPS() mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, targetVertexId); - // for(auto device : devices) - // { + for(auto device : devices) + { + std::string s = device->getName(); + std::string delimiter = "."; + std::string address_string = s.substr(0, s.find(delimiter)); + u64 address = std::stoll(address_string, 0, 16); + logger->info(address); + + + // const size_t ip_mem_size = 65536; // size_t srcVertexId = mm.getOrCreateAddressSpace(device->getName()); // size_t targetVertexId = mm.getOrCreateAddressSpace("MEMORY_GRAPH_NAME/Reg"); // mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, // targetVertexId); - // } + } } bool PlatformCard::mapMemoryBlock(const std::shared_ptr block) { @@ -157,10 +166,9 @@ PlatformCardFactory::make(json_t *json, // continue; // } - // json_incref(parser.json_ips); - // IpLoader ipLoader(parser.json_ips, searchPath); + //IpLoader ipLoader(parser.json_ips, searchPath); - // Load IPs from a separate json file + //Load IPs from a separate json file if (!json_is_string(parser.json_ips)) { logger->debug("FPGA IP cores config item is not a string."); throw ConfigError(parser.json_ips, "node-config-fpga-ips", From 38eba77d38c133c86b441d311219c42b0452a1a2 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Tue, 12 Dec 2023 13:25:55 +0000 Subject: [PATCH 67/93] launch platform bin --- .vscode/launch.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.vscode/launch.json b/.vscode/launch.json index 1bce5a80..b1864afa 100644 --- a/.vscode/launch.json +++ b/.vscode/launch.json @@ -8,7 +8,7 @@ "name": "(gdb) Launch", "type": "cppdbg", "request": "launch", - "program": "${workspaceFolder}/build/src/villas-fpga-ctrl", + "program": "${workspaceFolder}/build/src/platform", "args": [ "-c", "${workspaceFolder}/etc/fpgas.json", "--connect", "\"2<->stdout\"" ], From fa0fe31961c7552a76ed23efa57ce28858facb92 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 13 Dec 2023 15:43:24 +0000 Subject: [PATCH 68/93] fix binding script --- scripts/bind_platform_vfio.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/bind_platform_vfio.sh b/scripts/bind_platform_vfio.sh index 7e5599fa..593e1386 100644 --- a/scripts/bind_platform_vfio.sh +++ b/scripts/bind_platform_vfio.sh @@ -16,4 +16,5 @@ echo vfio-platform > /sys/bus/platform/devices/a0000000.dma/driver_override echo a0000000.dma > /sys/bus/platform/drivers/vfio-platform/bind # Other vfio devices without driver override +echo vfio-platform > /sys/bus/platform/devices/a0010000.axis_switch/driver_override echo a0010000.axis_switch > /sys/bus/platform/drivers_probe From fd6402de620ae2e4881f49b8b1a942490922ac6c Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 13 Dec 2023 15:43:59 +0000 Subject: [PATCH 69/93] new write test --- src/platform.cpp | 73 ++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 65 insertions(+), 8 deletions(-) diff --git a/src/platform.cpp b/src/platform.cpp index d3e8cf70..87f58c54 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -3,6 +3,7 @@ * SPDX-License-Identifier: Apache-2.0 *********************************************************************************/ +#include "villas/fpga/ips/switch.hpp" #include #include #include @@ -12,8 +13,6 @@ #include #include -#define SEC_IN_USEC 1000 * 1000 - using namespace villas; using namespace fpga; @@ -50,8 +49,7 @@ void writeToDmaFromStdIn(std::shared_ptr dma) if(!state) logger->error("Failed to write to device"); - // auto writeComp = dma->writeComplete(); - usleep(5 * SEC_IN_USEC); // some magic numbers + auto writeComp = dma->writeComplete(); // logger->debug("Wrote {} bytes", writeComp.bytes); @@ -215,6 +213,62 @@ setupCard(const std::string &configFilePath, const std::string &fpgaName) return card; } +int writeTest(std::shared_ptr dma){ + auto &alloc = villas::HostRam::getAllocator(); + const std::shared_ptr block + = alloc.allocateBlock(0x200 * sizeof(float)); + villas::MemoryAccessor mem = *block; + dma->makeAccesibleFromVA(block); + + logger->info("Trying to write Values"); + + mem[0] = 1337; + + // Itiate write transfer + bool state = dma->write(*block, 1 * sizeof(float)); + if(!state) + logger->error("Failed to write to device"); + + volatile auto writeComp = dma->writeComplete(); +} + +int readTest(std::shared_ptr dma){ + auto &alloc = villas::HostRam::getAllocator(); + + const std::shared_ptr block[] + = { alloc.allocateBlock(0x200 * sizeof(uint32_t)), + alloc.allocateBlock(0x200 * sizeof(uint32_t)) }; + + villas::MemoryAccessor mem[] = { *block[0], *block[1] }; + + for(auto b : block) { + dma->makeAccesibleFromVA(b); + } + + // Setup read transfer + dma->read(*block[0], block[0]->getSize()); + + size_t cur = 0, next = 1; + while(true) { + logger->trace("Read from stream and write to address {}:{:p}", + block[next]->getAddrSpaceId(), + block[next]->getOffset()); + + dma->read(*block[next], block[next]->getSize()); + + auto c = dma->readComplete(); + + logger->debug("bytes: {}, intrs: {}, bds: {}", + c.bytes, + c.interrupts, + c.bds); + + cur = next; + next = (next + 1) % (sizeof(mem) / sizeof(mem[0])); + } + +} + int main() { logging.setLevel(spdlog::level::debug); @@ -224,10 +278,13 @@ int main() auto dma = std::dynamic_pointer_cast( card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:"))); - // Write Test - writeToDmaFromStdIn(dma); - auto formatter = fpga::getBufferedSampleFormatter("short", 16); - readFromDmaToStdOut(dma, std::move(formatter)); + auto axi_switch = std::dynamic_pointer_cast( + card->lookupIp(fpga::Vlnv("xilinx.com:ip:axis_switch:"))); + + axi_switch->connectInternal("S00_AXIS", "M00_AXIS"); + + writeTest(dma); + //readTest(dma); return 0; } \ No newline at end of file From 898c0f2780e8e37d7ed53661ebcdb737a188cbe1 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 11 Jan 2024 14:11:43 +0000 Subject: [PATCH 70/93] split device tree name --- lib/platform_card.cpp | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 8d5c84e9..3ae7b601 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -88,20 +88,13 @@ void PlatformCard::connectVFIOtoIPS() for(auto device : devices) { - std::string s = device->getName(); - std::string delimiter = "."; - std::string address_string = s.substr(0, s.find(delimiter)); - u64 address = std::stoll(address_string, 0, 16); - logger->info(address); + std::string addr; + std::string name; - - - // const size_t ip_mem_size = 65536; - // size_t srcVertexId = mm.getOrCreateAddressSpace(device->getName()); - // size_t targetVertexId = mm.getOrCreateAddressSpace("MEMORY_GRAPH_NAME/Reg"); - // mm.createMapping(0, 0, ip_mem_size, "vfio to ip", srcVertexId, - // targetVertexId); - } + std::istringstream iss(device->getName()); + std::getline(iss, addr, '.'); + std::getline(iss, name, '.'); + } } bool PlatformCard::mapMemoryBlock(const std::shared_ptr block) { From dff94e2102225b396e1819b69f4ff9fe86e0b646 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 11 Jan 2024 14:12:29 +0000 Subject: [PATCH 71/93] fix memsize --- src/platform.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/platform.cpp b/src/platform.cpp index 87f58c54..7e8795aa 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -222,10 +222,10 @@ int writeTest(std::shared_ptr dma){ logger->info("Trying to write Values"); - mem[0] = 1337; + mem[0] = (float)1337; // Itiate write transfer - bool state = dma->write(*block, 1 * sizeof(float)); + bool state = dma->write(*block, 0x200 * sizeof(float)); if(!state) logger->error("Failed to write to device"); From 991d88ac7652a3fec97609107e8aa59c39bb3f4a Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 11 Jan 2024 16:14:20 +0000 Subject: [PATCH 72/93] git ignore: fix cache folder --- .gitignore | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitignore b/.gitignore index c6f11fb0..5ad088d0 100644 --- a/.gitignore +++ b/.gitignore @@ -13,5 +13,5 @@ build/ graph.dot .clang-format -.cache +.cache/ miob/ \ No newline at end of file From 957378eb9fe68341809cc1e0caef9e37a57e908e Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 24 Jan 2024 13:30:54 +0000 Subject: [PATCH 73/93] fix rebase --- src/villas-fpga-ctrl.cpp | 206 ++++++++++++++++++++------------------- 1 file changed, 108 insertions(+), 98 deletions(-) diff --git a/src/villas-fpga-ctrl.cpp b/src/villas-fpga-ctrl.cpp index 6f979a4a..25c60751 100644 --- a/src/villas-fpga-ctrl.cpp +++ b/src/villas-fpga-ctrl.cpp @@ -172,101 +172,111 @@ void readFromDmaToStdOut( } } -int main(int argc, char* argv[]) -{ - // Command Line Parser - CLI::App app{"VILLASfpga data output"}; - - try { - std::string configFile; - app.add_option("-c,--config", configFile, "Configuration file") - ->check(CLI::ExistingFile); - - std::string fpgaName = "vc707"; - app.add_option("--fpga", fpgaName, "Which FPGA to use"); - std::string connectStr = ""; - app.add_option("-x,--connect", connectStr, "Connect a FPGA port with another or stdin/stdout"); - bool noDma = false; - app.add_flag("--no-dma", noDma, "Do not setup DMA, only setup FPGA and Crossbar links"); - std::string outputFormat = "short"; - app.add_option("--output-format", outputFormat, "Output format (short, long)"); - bool dumpGraph = false; - app.add_flag("--dump-graph", dumpGraph, "Dumps the graph of memory regions into \"graph.dot\""); - bool dumpAuroraChannels = true; - app.add_flag("--dump-aurora", dumpAuroraChannels, "Dumps the detected Aurora channels."); - app.parse(argc, argv); - - // Logging setup - - logging.setLevel(spdlog::level::debug); - fpga::setupColorHandling(); - - if (configFile.empty()) { - logger->error("No configuration file provided/ Please use -c/--config argument"); - return 1; - } - - auto card = fpga::setupFpgaCard(configFile, fpgaName); - - std::vector> aurora_channels; - for (int i = 0; i < 4; i++) { - auto name = fmt::format("aurora_8b10b_ch{}", i); - auto id = fpga::ip::IpIdentifier("xilinx.com:ip:aurora_8b10b:", name); - auto aurora = std::dynamic_pointer_cast(card->lookupIp(id)); - if (aurora == nullptr) { - logger->error("No Aurora interface found on FPGA"); - return 1; - } - - aurora_channels.push_back(aurora); - } - - auto dma = std::dynamic_pointer_cast - (card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:"))); - if (dma == nullptr) { - logger->error("No DMA found on FPGA "); - return 1; - } - - if (dumpGraph) { - auto &mm = MemoryManager::get(); - mm.getGraph().dump("graph.dot"); - } - - if (dumpAuroraChannels) { - for (auto aurora : aurora_channels) - aurora->dump(); - } - // Configure Crossbar switch - const fpga::ConnectString parsedConnectString(connectStr); - parsedConnectString.configCrossBar(dma, aurora_channels); - - std::unique_ptr stdInThread = nullptr; - if (!noDma && parsedConnectString.isDstStdout()) { - auto formatter = fpga::getBufferedSampleFormatter(outputFormat, 16); - // We copy the dma shared ptr but move the fomatter unqiue ptr as we don't need it - // in this thread anymore - stdInThread = std::make_unique(readFromDmaToStdOut, dma, std::move(formatter)); - } - if (!noDma && parsedConnectString.isSrcStdin()) { - writeToDmaFromStdIn(dma); - } - - if (stdInThread) { - stdInThread->join(); - } - } catch (const RuntimeError &e) { - logger->error("Error: {}", e.what()); - return -1; - } catch (const CLI::ParseError &e) { - return app.exit(e); - } catch (const std::exception &e) { - logger->error("Error: {}", e.what()); - return -1; - } catch (...) { - logger->error("Unknown error"); - return -1; - } - - return 0; -} +int main(int argc, char *argv[]) { + // Command Line Parser + CLI::App app{"VILLASfpga data output"}; + + try { + std::string configFile; + app.add_option("-c,--config", configFile, "Configuration file") + ->check(CLI::ExistingFile); + + std::string fpgaName = "vc707"; + app.add_option("--fpga", fpgaName, "Which FPGA to use"); + std::vector connectStr; + app.add_option("-x,--connect", connectStr, + "Connect a FPGA port with another or stdin/stdout"); + bool noDma = false; + app.add_flag("--no-dma", noDma, + "Do not setup DMA, only setup FPGA and Crossbar links"); + std::string outputFormat = "short"; + app.add_option("--output-format", outputFormat, + "Output format (short, long)"); + bool dumpGraph = false; + app.add_flag("--dump-graph", dumpGraph, + "Dumps the graph of memory regions into \"graph.dot\""); + bool dumpAuroraChannels = true; + app.add_flag("--dump-aurora", dumpAuroraChannels, + "Dumps the detected Aurora channels."); + app.parse(argc, argv); + + // Logging setup + + logging.setLevel(spdlog::level::debug); + fpga::setupColorHandling(); + + if (configFile.empty()) { + logger->error( + "No configuration file provided/ Please use -c/--config argument"); + return 1; + } + + auto card = fpga::setupFpgaCard(configFile, fpgaName); + + if (dumpGraph) { + auto &mm = MemoryManager::get(); + mm.getGraph().dump("graph.dot"); + } + + if (dumpAuroraChannels) { + auto aurora_channels = getAuroraChannels(card); + for (auto aurora : *aurora_channels) + aurora->dump(); + } + bool writeToStdout = false; + bool readFromStdin = false; + // Configure Crossbar switch + for (std::string str : connectStr) { + const fpga::ConnectString parsedConnectString(str); + parsedConnectString.configCrossBar(card); + if (parsedConnectString.isSrcStdin()) { + readFromStdin = true; + if (parsedConnectString.isBidirectional()) { + writeToStdout = true; + } + } + if (parsedConnectString.isDstStdout()) { + writeToStdout = true; + if (parsedConnectString.isBidirectional()) { + readFromStdin = true; + } + } + } + if (writeToStdout || readFromStdin) { + auto dma = std::dynamic_pointer_cast( + card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:"))); + if (dma == nullptr) { + logger->error("No DMA found on FPGA "); + throw std::runtime_error("No DMA found on FPGA"); + } + std::unique_ptr stdInThread = nullptr; + if (!noDma && writeToStdout) { + auto formatter = fpga::getBufferedSampleFormatter(outputFormat, 16); + // We copy the dma shared ptr but move the fomatter unqiue ptr as we don't need it + // in this thread anymore + stdInThread = std::make_unique(readFromDmaToStdOut, dma, + std::move(formatter)); + } + if (!noDma && readFromStdin) { + writeToDmaFromStdIn(dma); + } + + if (stdInThread) { + stdInThread->join(); + } + } + } catch (const RuntimeError &e) { + logger->error("Error: {}", e.what()); + return -1; + } catch (const CLI::ParseError &e) { + return app.exit(e); + } catch (const std::exception &e) { + logger->error("Error: {}", e.what()); + return -1; + } catch (...) { + logger->error("Unknown error"); + return -1; + } + + return 0; +} \ No newline at end of file From 67605ecc40f247b820ff97c28241cca784e7e77c Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 1 Feb 2024 12:59:19 +0000 Subject: [PATCH 74/93] add virtual to IntrerruptController methods --- include/villas/fpga/ips/intc.hpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/include/villas/fpga/ips/intc.hpp b/include/villas/fpga/ips/intc.hpp index 7bbe31db..6414e871 100644 --- a/include/villas/fpga/ips/intc.hpp +++ b/include/villas/fpga/ips/intc.hpp @@ -27,20 +27,20 @@ class InterruptController : public Core { virtual bool init() override; - bool enableInterrupt(IrqMaskType mask, bool polling); - bool enableInterrupt(IrqPort irq, bool polling) + virtual bool enableInterrupt(IrqMaskType mask, bool polling); + virtual bool enableInterrupt(IrqPort irq, bool polling) { return enableInterrupt(1 << irq.num, polling); } - bool disableInterrupt(IrqMaskType mask); - bool disableInterrupt(IrqPort irq) + virtual bool disableInterrupt(IrqMaskType mask); + virtual bool disableInterrupt(IrqPort irq) { return disableInterrupt(1 << irq.num); } - int waitForInterrupt(int irq); - int waitForInterrupt(IrqPort irq) + virtual int waitForInterrupt(int irq); + virtual int waitForInterrupt(IrqPort irq) { return waitForInterrupt(irq.num); } From 0fbf5a06227e1641783315903295bba6b58b8064 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 1 Feb 2024 13:00:32 +0000 Subject: [PATCH 75/93] add Interrupt Controller for Platform --- include/villas/fpga/ips/platform_intc.hpp | 11 +++++++++++ lib/CMakeLists.txt | 1 + lib/ips/platform_intc.cpp | 10 ++++++++++ 3 files changed, 22 insertions(+) create mode 100644 include/villas/fpga/ips/platform_intc.hpp create mode 100644 lib/ips/platform_intc.cpp diff --git a/include/villas/fpga/ips/platform_intc.hpp b/include/villas/fpga/ips/platform_intc.hpp new file mode 100644 index 00000000..c96e6c4a --- /dev/null +++ b/include/villas/fpga/ips/platform_intc.hpp @@ -0,0 +1,11 @@ +#pragma once + +#include + +class PlatformInterruptController + : public villas::fpga::ip::InterruptController { +public: + bool enableInterrupt(InterruptController::IrqMaskType mask, + bool polling) override; + bool enableInterrupt(IrqPort irq, bool polling) override; +}; diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt index 4a1bf2d1..3fa1ffec 100644 --- a/lib/CMakeLists.txt +++ b/lib/CMakeLists.txt @@ -24,6 +24,7 @@ set(SOURCES ips/gpio.cpp ips/intc.cpp ips/pcie.cpp + ips/platform_intc.cpp ips/rtds.cpp ips/switch.cpp ips/timer.cpp diff --git a/lib/ips/platform_intc.cpp b/lib/ips/platform_intc.cpp new file mode 100644 index 00000000..6cd24e62 --- /dev/null +++ b/lib/ips/platform_intc.cpp @@ -0,0 +1,10 @@ +#include + +bool PlatformInterruptController::enableInterrupt( + InterruptController::IrqMaskType mask, bool polling) { + logger->debug("Enabling Platform Interrupt"); +}; + +bool PlatformInterruptController::enableInterrupt(IrqPort irq, bool polling) { + logger->debug("Enabling Platform Interrupt"); +}; From e0c147c87ca904074b0c9344079d0bf68743ed20 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 1 Feb 2024 13:03:28 +0000 Subject: [PATCH 76/93] add default Interrupt Controller to dma --- lib/core.cpp | 36 ++++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/lib/core.cpp b/lib/core.cpp index 7a21e67c..1873a7df 100644 --- a/lib/core.cpp +++ b/lib/core.cpp @@ -1,26 +1,29 @@ /* FPGA IP component. * * Author: Steffen Vogel - * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power Systems, RWTH Aachen University - * SPDX-License-Identifier: Apache-2.0 + * SPDX-FileCopyrightText: 2017 Institute for Automation of Complex Power + * Systems, RWTH Aachen University SPDX-License-Identifier: Apache-2.0 */ #include #include #include +#include #include #include #include #include #include +#include #include #include #include #include #include +#include #include using namespace villas::fpga; @@ -169,6 +172,35 @@ std::list> CoreFactory::make(Card *card, logger->debug("IRQ: {} -> {}:{}", irqName, irqControllerName, num); ip->irqs[irqName] = {num, intc, ""}; } + } else if (!json_is_object(json_irqs) && + ip->getInstanceName().find("axi_dma_") != std::string::npos) { + logger->warn("Dma json does not contain an interrupt Controller. A " + "Platform Interrupt controller will be added"); + + // auto devices = dynamic_cast(ip->card)->devices; + // std::string nameToFind = "dma"; + // auto it = std::find_if(devices.begin(), devices.end(), [&](const + // villas::kernel::vfio::Device& device) { + // return device.get_name() == nameToFind; + // }); + + std::vector intc_names = {"mm2s_introut", "s2mm_introut"}; + + int num = 0; + for (auto name : intc_names) + { + auto intc = new PlatformInterruptController(); + intc->id = id; + intc->logger = villas::logging.get(id.getName()); + + const char *irqName = name; + std::string irqControllerName = "PlatformInterruptController"; + + logger->debug("IRQ: {} -> {}:{}", irqName, irqControllerName, num); + ip->irqs[irqName] = {num, intc, ""}; + + num++; + } } json_t *json_memory_view = json_object_get(json_ip, "memory-view"); From 877fd5f5e344aa96c32579ceecd147ecd90620da Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 1 Feb 2024 13:47:53 +0000 Subject: [PATCH 77/93] fix interrupt number --- lib/core.cpp | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/lib/core.cpp b/lib/core.cpp index 1873a7df..5fc43205 100644 --- a/lib/core.cpp +++ b/lib/core.cpp @@ -185,8 +185,6 @@ std::list> CoreFactory::make(Card *card, // }); std::vector intc_names = {"mm2s_introut", "s2mm_introut"}; - - int num = 0; for (auto name : intc_names) { auto intc = new PlatformInterruptController(); @@ -195,11 +193,11 @@ std::list> CoreFactory::make(Card *card, const char *irqName = name; std::string irqControllerName = "PlatformInterruptController"; + int num = 0; logger->debug("IRQ: {} -> {}:{}", irqName, irqControllerName, num); ip->irqs[irqName] = {num, intc, ""}; - num++; } } From 835928e4b7221970adb1e718c7202e696cbc1246 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 1 Feb 2024 14:56:41 +0000 Subject: [PATCH 78/93] fix interrupts --- lib/core.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/core.cpp b/lib/core.cpp index 5fc43205..4b9eb617 100644 --- a/lib/core.cpp +++ b/lib/core.cpp @@ -184,7 +184,9 @@ std::list> CoreFactory::make(Card *card, // return device.get_name() == nameToFind; // }); + //! TODO: Order of interrupts is hardcoded and not tested (may be reversed). Aviable in vfio device irq.id . std::vector intc_names = {"mm2s_introut", "s2mm_introut"}; + int num = 0; for (auto name : intc_names) { auto intc = new PlatformInterruptController(); @@ -193,11 +195,11 @@ std::list> CoreFactory::make(Card *card, const char *irqName = name; std::string irqControllerName = "PlatformInterruptController"; - int num = 0; logger->debug("IRQ: {} -> {}:{}", irqName, irqControllerName, num); ip->irqs[irqName] = {num, intc, ""}; + num++; } } From 32db7d9577a95e175a97f541b9a4c7ce043aaffe Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 1 Feb 2024 14:58:43 +0000 Subject: [PATCH 79/93] move var to branch where it is needed --- lib/ips/intc.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/lib/ips/intc.cpp b/lib/ips/intc.cpp index 56bd2284..07469483 100644 --- a/lib/ips/intc.cpp +++ b/lib/ips/intc.cpp @@ -124,9 +124,8 @@ InterruptController::waitForInterrupt(int irq) { assert(irq < maxIrqs); - const uintptr_t base = getBaseAddr(registerMemory); - if (this->polling[irq]) { + const uintptr_t base = getBaseAddr(registerMemory); uint32_t isr, mask = 1 << irq; do { From 7cfeaadf5081a424427933fe48b089d93b398046 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 1 Feb 2024 15:48:53 +0000 Subject: [PATCH 80/93] update read and write from std --- src/platform.cpp | 218 ++++++++++++++++++----------------------------- 1 file changed, 83 insertions(+), 135 deletions(-) diff --git a/src/platform.cpp b/src/platform.cpp index 7e8795aa..18e6c0b7 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -18,144 +18,92 @@ using namespace fpga; static auto logger = villas::logging.get("PLATFORM CTRL"); -void writeToDmaFromStdIn(std::shared_ptr dma) -{ - auto &alloc = villas::HostRam::getAllocator(); - const std::shared_ptr block - = alloc.allocateBlock(0x200 * sizeof(float)); - villas::MemoryAccessor mem = *block; - dma->makeAccesibleFromVA(block); - - logger->info( - "Please enter values to write to the device, separated by ';'"); - - - // Read values from stdin - std::string line; - std::getline(std::cin, line); - auto values = villas::utils::tokenize(line, ";"); - - size_t i = 0; - for(auto &value : values) { - if(value.empty()) - continue; - - const float number = std::stof(value); - mem[i++] = number; - } - - // Initiate write transfer - bool state = dma->write(*block, i * sizeof(float)); - if(!state) - logger->error("Failed to write to device"); - - auto writeComp = dma->writeComplete(); - - // logger->debug("Wrote {} bytes", writeComp.bytes); - - // auto &alloc = villas::HostRam::getAllocator(); - - // const std::shared_ptr block[] = { - // alloc.allocateBlock(0x200 * sizeof(uint32_t)), - // alloc.allocateBlock(0x200 * sizeof(uint32_t)) - // }; - // villas::MemoryAccessor mem[] = {*block[0], *block[1]}; - - // for (auto b : block) { - // dma->makeAccesibleFromVA(b); - // } - - // size_t cur = 0, next = 1; - // std::ios::sync_with_stdio(false); - // std::string line; - // bool firstXfer = true; - - // while(true) { - // // Read values from stdin - - // std::getline(std::cin, line); - // auto values = villas::utils::tokenize(line, ";"); - - // size_t i = 0; - // for (auto &value: values) { - // if (value.empty()) continue; - - // const float number = std::stof(value); - // mem[cur][i++] = number; - // } - - // // Initiate write transfer - // bool state = dma->write(*block[cur], i * sizeof(float)); - // if (!state) - // logger->error("Failed to write to device"); - - // if (!firstXfer) { - // auto bytesWritten = dma->writeComplete(); - // logger->debug("Wrote {} bytes", bytesWritten.bytes); - // } else { - // firstXfer = false; - // } - - // cur = next; - // next = (next + 1) % (sizeof(mem) / sizeof(mem[0])); - // } +void writeToDmaFromStdIn(std::shared_ptr dma) { + auto &alloc = villas::HostRam::getAllocator(); + const std::shared_ptr block = + alloc.allocateBlock(0x200 * sizeof(float)); + villas::MemoryAccessor mem = *block; + dma->makeAccesibleFromVA(block); + + logger->info("Please enter values to write to the device, separated by ';'"); + + while (true) { + // Read values from stdin + std::string line; + std::getline(std::cin, line); + auto values = villas::utils::tokenize(line, ";"); + + size_t i = 0; + for (auto &value : values) { + if (value.empty()) + continue; + + const float number = std::stof(value); + mem[i++] = number; + } + + // Initiate write transfer + bool state = dma->write(*block, i * sizeof(float)); + if (!state) + logger->error("Failed to write to device"); + + auto writeComp = dma->writeComplete(); + logger->debug("Wrote {} bytes", writeComp.bytes); + } } void readFromDmaToStdOut( std::shared_ptr dma, - std::unique_ptr formatter) -{ - auto &alloc = villas::HostRam::getAllocator(); - - const std::shared_ptr block[] - = { alloc.allocateBlock(0x200 * sizeof(uint32_t)), - alloc.allocateBlock(0x200 * sizeof(uint32_t)) }; - villas::MemoryAccessor mem[] = { *block[0], *block[1] }; - - for(auto b : block) { - dma->makeAccesibleFromVA(b); - } - - size_t cur = 0, next = 1; - std::ios::sync_with_stdio(false); - - // Setup read transfer - dma->read(*block[0], block[0]->getSize()); - - while(true) { - logger->trace("Read from stream and write to address {}:{:p}", - block[next]->getAddrSpaceId(), - block[next]->getOffset()); - // We could use the number of interrupts to determine if we - // missed a chunk of data - dma->read(*block[next], block[next]->getSize()); - auto c = dma->readComplete(); - - if(c.interrupts > 1) { - logger->warn("Missed {} interrupts", c.interrupts - 1); - } - - logger->debug("bytes: {}, intrs: {}, bds: {}", - c.bytes, - c.interrupts, - c.bds); - try { - for(size_t i = 0; i * 4 < c.bytes; i++) { - int32_t ival = mem[cur][i]; - float fval = *( - (float *) (&ival)); // cppcheck-suppress - // invalidPointerCast - formatter->format(fval); - printf("%#x\n", ival); - } - formatter->output(std::cout); - } catch(const std::exception &e) { - logger->warn("Failed to output data: {}", e.what()); - } - - cur = next; - next = (next + 1) % (sizeof(mem) / sizeof(mem[0])); - } + std::unique_ptr formatter) { + auto &alloc = villas::HostRam::getAllocator(); + + const std::shared_ptr block[] = { + alloc.allocateBlock(0x200 * sizeof(uint32_t)), + alloc.allocateBlock(0x200 * sizeof(uint32_t))}; + villas::MemoryAccessor mem[] = {*block[0], *block[1]}; + + for (auto b : block) { + dma->makeAccesibleFromVA(b); + } + + size_t cur = 0, next = 1; + std::ios::sync_with_stdio(false); + + // Setup read transfer + dma->read(*block[0], block[0]->getSize()); + + while (true) { + logger->trace("Read from stream and write to address {}:{:p}", + block[next]->getAddrSpaceId(), block[next]->getOffset()); + // We could use the number of interrupts to determine if we missed a chunk of data + dma->read(*block[next], block[next]->getSize()); + auto c = dma->readComplete(); + + if (c.interrupts > 1) { + logger->warn("Missed {} interrupts", c.interrupts - 1); + } + + logger->debug("bytes: {}, intrs: {}, bds: {}", c.bytes, c.interrupts, + c.bds); + try { + for (size_t i = 0; i * 4 < c.bytes; i++) { + int32_t ival = mem[cur][i]; +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wstrict-aliasing" + float fval = + *((float *)(&ival)); // cppcheck-suppress invalidPointerCast +#pragma GCC diagnostic pop + formatter->format(fval); + printf("%#x\n", ival); + } + formatter->output(std::cout); + } catch (const std::exception &e) { + logger->warn("Failed to output data: {}", e.what()); + } + + cur = next; + next = (next + 1) % (sizeof(mem) / sizeof(mem[0])); + } } @@ -284,7 +232,7 @@ int main() axi_switch->connectInternal("S00_AXIS", "M00_AXIS"); writeTest(dma); - //readTest(dma); + readTest(dma); return 0; } \ No newline at end of file From 1e218d13d565ec8d3686ae29f190f497ab0f0b1e Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 15 Feb 2024 13:23:40 +0000 Subject: [PATCH 81/93] make interrupt controller properties protected --- include/villas/fpga/ips/intc.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/villas/fpga/ips/intc.hpp b/include/villas/fpga/ips/intc.hpp index 6414e871..2ec4cf10 100644 --- a/include/villas/fpga/ips/intc.hpp +++ b/include/villas/fpga/ips/intc.hpp @@ -45,7 +45,7 @@ class InterruptController : public Core { return waitForInterrupt(irq.num); } -private: +protected: static constexpr char registerMemory[] = "reg0"; From dcd4b333dc0037f45ce349456e4da47386581918 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 15 Feb 2024 13:24:02 +0000 Subject: [PATCH 82/93] override intc init --- include/villas/fpga/ips/platform_intc.hpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/villas/fpga/ips/platform_intc.hpp b/include/villas/fpga/ips/platform_intc.hpp index c96e6c4a..36a25fb4 100644 --- a/include/villas/fpga/ips/platform_intc.hpp +++ b/include/villas/fpga/ips/platform_intc.hpp @@ -5,6 +5,8 @@ class PlatformInterruptController : public villas::fpga::ip::InterruptController { public: + bool init() override; + bool enableInterrupt(InterruptController::IrqMaskType mask, bool polling) override; bool enableInterrupt(IrqPort irq, bool polling) override; From bd8d45807b7bc20fef8723c9618d94e93e8bb626 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 15 Feb 2024 13:24:22 +0000 Subject: [PATCH 83/93] fix init intc --- lib/core.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/core.cpp b/lib/core.cpp index 4b9eb617..c5c51b23 100644 --- a/lib/core.cpp +++ b/lib/core.cpp @@ -192,6 +192,8 @@ std::list> CoreFactory::make(Card *card, auto intc = new PlatformInterruptController(); intc->id = id; intc->logger = villas::logging.get(id.getName()); + intc->card = card; + intc->init(); const char *irqName = name; std::string irqControllerName = "PlatformInterruptController"; From fd9c8d1357038494053e0fbd490fbdc15822ad74 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 15 Feb 2024 13:24:58 +0000 Subject: [PATCH 84/93] implement efds in platform_intc --- lib/ips/platform_intc.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/lib/ips/platform_intc.cpp b/lib/ips/platform_intc.cpp index 6cd24e62..6b76c6a9 100644 --- a/lib/ips/platform_intc.cpp +++ b/lib/ips/platform_intc.cpp @@ -1,4 +1,10 @@ #include +#include + +bool PlatformInterruptController::init(){ + auto platform_card = dynamic_cast(card); + platform_card->devices[0]->platformInit(efds); +} bool PlatformInterruptController::enableInterrupt( InterruptController::IrqMaskType mask, bool polling) { From 49b98ad6341b719484d5c081fe1675f7ff85a804 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 15 Feb 2024 13:25:22 +0000 Subject: [PATCH 85/93] fix main --- src/platform.cpp | 61 ++++-------------------------------------------- 1 file changed, 4 insertions(+), 57 deletions(-) diff --git a/src/platform.cpp b/src/platform.cpp index 18e6c0b7..701538b9 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -161,61 +161,6 @@ setupCard(const std::string &configFilePath, const std::string &fpgaName) return card; } -int writeTest(std::shared_ptr dma){ - auto &alloc = villas::HostRam::getAllocator(); - const std::shared_ptr block - = alloc.allocateBlock(0x200 * sizeof(float)); - villas::MemoryAccessor mem = *block; - dma->makeAccesibleFromVA(block); - - logger->info("Trying to write Values"); - - mem[0] = (float)1337; - - // Itiate write transfer - bool state = dma->write(*block, 0x200 * sizeof(float)); - if(!state) - logger->error("Failed to write to device"); - - volatile auto writeComp = dma->writeComplete(); -} - -int readTest(std::shared_ptr dma){ - auto &alloc = villas::HostRam::getAllocator(); - - const std::shared_ptr block[] - = { alloc.allocateBlock(0x200 * sizeof(uint32_t)), - alloc.allocateBlock(0x200 * sizeof(uint32_t)) }; - - villas::MemoryAccessor mem[] = { *block[0], *block[1] }; - - for(auto b : block) { - dma->makeAccesibleFromVA(b); - } - - // Setup read transfer - dma->read(*block[0], block[0]->getSize()); - - size_t cur = 0, next = 1; - while(true) { - logger->trace("Read from stream and write to address {}:{:p}", - block[next]->getAddrSpaceId(), - block[next]->getOffset()); - - dma->read(*block[next], block[next]->getSize()); - - auto c = dma->readComplete(); - - logger->debug("bytes: {}, intrs: {}, bds: {}", - c.bytes, - c.interrupts, - c.bds); - - cur = next; - next = (next + 1) % (sizeof(mem) / sizeof(mem[0])); - } - -} int main() { @@ -231,8 +176,10 @@ int main() axi_switch->connectInternal("S00_AXIS", "M00_AXIS"); - writeTest(dma); - readTest(dma); + // std::string outputFormat = "short"; + // auto formatter = fpga::getBufferedSampleFormatter(outputFormat, 16); + // readFromDmaToStdOut(dma, std::move(formatter)); + writeToDmaFromStdIn(dma); return 0; } \ No newline at end of file From 5dfe9b44c44442098d82f898fef42ec33a4cff3e Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 15 Feb 2024 15:53:45 +0000 Subject: [PATCH 86/93] fix double init --- lib/core.cpp | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/lib/core.cpp b/lib/core.cpp index c5c51b23..65babd4e 100644 --- a/lib/core.cpp +++ b/lib/core.cpp @@ -185,24 +185,22 @@ std::list> CoreFactory::make(Card *card, // }); //! TODO: Order of interrupts is hardcoded and not tested (may be reversed). Aviable in vfio device irq.id . + auto intc = new PlatformInterruptController(); + intc->id = id; + intc->logger = villas::logging.get(id.getName()); + intc->card = card; + std::vector intc_names = {"mm2s_introut", "s2mm_introut"}; int num = 0; for (auto name : intc_names) { - auto intc = new PlatformInterruptController(); - intc->id = id; - intc->logger = villas::logging.get(id.getName()); - intc->card = card; - intc->init(); - - const char *irqName = name; std::string irqControllerName = "PlatformInterruptController"; - - logger->debug("IRQ: {} -> {}:{}", irqName, irqControllerName, num); - ip->irqs[irqName] = {num, intc, ""}; - + logger->debug("IRQ: {} -> {}:{}", std::string(name), irqControllerName, num); + ip->irqs[std::string(name)] = {num, intc, ""}; num++; } + + intc->init(); } json_t *json_memory_view = json_object_get(json_ip, "memory-view"); From c2822f7f56b39c5c2e5158c8064a77b6de9a0c9b Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 15 Feb 2024 16:05:57 +0000 Subject: [PATCH 87/93] change loglevel trace --- src/platform.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/platform.cpp b/src/platform.cpp index 701538b9..5e59b149 100644 --- a/src/platform.cpp +++ b/src/platform.cpp @@ -6,6 +6,7 @@ #include "villas/fpga/ips/switch.hpp" #include #include +#include #include #include #include @@ -164,7 +165,8 @@ setupCard(const std::string &configFilePath, const std::string &fpgaName) int main() { - logging.setLevel(spdlog::level::debug); + logging.setLevel(spdlog::level::trace); + logger->set_level(spdlog::level::trace); std::shared_ptr card = setupCard("/home/root/fpga/build/src/fpgas.json","zcu106"); From 27ada7f84e0be7cb3b0f82f31f0571e0ec4f69ea Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 21 Feb 2024 12:56:47 +0000 Subject: [PATCH 88/93] git: remove tracked cache files --- .../clangd/index/CLI11.hpp.09D07ACB0DB90588.idx | Bin 59988 -> 0 bytes .../aurora_xilinx.cpp.B193FCC7AA46AE58.idx | Bin 746 -> 0 bytes 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NxK1uSsiTm?{|9k*1k(Tj diff --git a/.cache/clangd/index/zynq.hpp.CC9F05813EBA445E.idx b/.cache/clangd/index/zynq.hpp.CC9F05813EBA445E.idx deleted file mode 100644 index a30e70f48edc4ba1f5ef4e768c3f636bb4c2c407..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1450 zcmYk64NMbf7{}jxDc85{U1>|<%13EOrByT?VI8Pgvkn8r#f1?NG6tD^$jBx`z7$b1 zXTpL32S#GZ+{V|wA|lJcfjB-C+}x~~vN<<&b8JjQVm69wiU#)Fk-O}Y`{#Z0zvp@0 z=egfqT1rwo)-`Q> zYh!x&KzhmCx!_{m@$SCI2aZ>IpUZ0*STny+v-e5(zI1wo3{`V^tI4#m|!d3xJf4c3MtWh2El zQaa+M-6|iO+yLs91HAneZ}62gU81d;rVOjlZE_m{AglvFlnZ@I5Xo;_%1(A3s{c`gHIUyWcc}!C{66!(hORT`M$||SQ#LY2 zjUbXg!X)I}dDj=O!2ujn8fb%(1k=Gv$-m)v*2^X>ZB=6$>RU}#hai$ad%1VL=}zRo zG@`%{C*f*AB;WV@x<|2|-dpgNLlChr7ETb!FDu+#z6{@$NE4+LC=%g;El-Zf3T$~$ zw0@)4wCq$EW{8!xDi~s;ZHf((r`u9 Date: Thu, 22 Feb 2024 13:33:41 +0000 Subject: [PATCH 89/93] removed dma hardcoded position --- lib/ips/platform_intc.cpp | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/lib/ips/platform_intc.cpp b/lib/ips/platform_intc.cpp index 6b76c6a9..f72044db 100644 --- a/lib/ips/platform_intc.cpp +++ b/lib/ips/platform_intc.cpp @@ -1,9 +1,24 @@ +#include +#include +#include #include #include bool PlatformInterruptController::init(){ auto platform_card = dynamic_cast(card); - platform_card->devices[0]->platformInit(efds); + + std::shared_ptr dma_vfio_device; + for (auto device : platform_card->devices) + { + if (device->getName().find("dma") != std::string::npos){ + dma_vfio_device = device; + break; + } + } + + if(dma_vfio_device == nullptr) throw std::logic_error("No vfio device with name containing dma found."); + + dma_vfio_device->platformInit(efds); } bool PlatformInterruptController::enableInterrupt( From 7c7cc00279b468853aff779898dcb9c9cfeb9be3 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 22 Feb 2024 13:33:58 +0000 Subject: [PATCH 90/93] remove unused code --- lib/core.cpp | 7 ------- 1 file changed, 7 deletions(-) diff --git a/lib/core.cpp b/lib/core.cpp index 65babd4e..122543e6 100644 --- a/lib/core.cpp +++ b/lib/core.cpp @@ -177,13 +177,6 @@ std::list> CoreFactory::make(Card *card, logger->warn("Dma json does not contain an interrupt Controller. A " "Platform Interrupt controller will be added"); - // auto devices = dynamic_cast(ip->card)->devices; - // std::string nameToFind = "dma"; - // auto it = std::find_if(devices.begin(), devices.end(), [&](const - // villas::kernel::vfio::Device& device) { - // return device.get_name() == nameToFind; - // }); - //! TODO: Order of interrupts is hardcoded and not tested (may be reversed). Aviable in vfio device irq.id . auto intc = new PlatformInterruptController(); intc->id = id; From 5063fe3eeb97672ab39c26cd05d82e9042db7177 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 28 Feb 2024 14:05:34 +0000 Subject: [PATCH 91/93] fix addrSpaceIdToHost --- lib/ips/zynq.cpp | 70 ++++-------------------------------------------- 1 file changed, 5 insertions(+), 65 deletions(-) diff --git a/lib/ips/zynq.cpp b/lib/ips/zynq.cpp index 486cf6d3..9fa17c27 100644 --- a/lib/ips/zynq.cpp +++ b/lib/ips/zynq.cpp @@ -25,79 +25,19 @@ bool Zynq::init() { auto &mm = MemoryManager::get(); - // auto platform_card = dynamic_cast(card); - //! Hardcoded edges vfios to ips - - // IPs that can access this address space will know it via their memory view - const auto addrSpaceNameDeviceToHost = - mm.getMasterAddrSpaceName("axi_dma_0", "M_AXI_SG"); + // IPs that can access this address space will know it via their memory view + // const auto addrSpaceNameDeviceToHost = + // mm.getMasterAddrSpaceName("zynq_ultra_ps_e_0", "HPC1_DDR_LOW"); + //mm.getSlaveAddrSpaceName(getInstanceName(), pcieMemory); // Save ID in card so we can create mappings later when needed (e.g. when // allocating DMA memory in host RAM) card->addrSpaceIdDeviceToHost = - mm.getOrCreateAddressSpace(addrSpaceNameDeviceToHost); + mm.getOrCreateAddressSpace("zynq_ultra_ps_e_0/HPC0_DDR_LOW"); dynamic_cast(card)->connectVFIOtoIPS(); - - //! Hardcoded end - - //mm.getGraph().removeVertex(mm.getOrCreateAddressSpace("axis_interconnect_0_xbar/Reg")); - - //! Dev - // Make PCIe (IOVA) address space available to FPGA via BAR0 - - // // IPs that can access this address space will know it via their memory - // view const auto addrSpaceNameDeviceToHost = - // mm.getSlaveAddrSpaceName(getInstanceName(), pcieMemory); - - // // Save ID in card so we can create mappings later when needed (e.g. when - // // allocating DMA memory in host RAM) - // card->addrSpaceIdDeviceToHost = - // mm.getOrCreateAddressSpace(addrSpaceNameDeviceToHost); - - // auto pciAddrSpaceId = mm.getPciAddressSpace(); - - // auto regions = dynamic_cast(card)->pdev->getRegions(); - - // int i = 0; - // for (auto region : regions) { - // const size_t region_size = region.end - region.start + 1; - - // char barName[] = "BARx"; - // barName[3] = '0' + region.num; - // auto pciBar = pcieToAxiTranslations.at(barName); - - // logger->info("PCI-BAR{}: bus addr={:#x} size={:#x}", - // region.num, region.start, region_size); - // logger->info("PCI-BAR{}: AXI translation offset {:#x}", - // i, pciBar.translation); - - // mm.createMapping(region.start, pciBar.translation, region_size, - // std::string("PCI-") + barName, - // pciAddrSpaceId, card->addrSpaceIdHostToDevice); - // } - - // for (auto& [barName, axiBar] : axiToPcieTranslations) { - // logger->info("AXI-{}: bus addr={:#x} size={:#x}", - // barName, axiBar.base, axiBar.size); - // logger->info("AXI-{}: PCI translation offset: {:#x}", - // barName, axiBar.translation); - - // auto barXAddrSpaceName = mm.getSlaveAddrSpaceName(getInstanceName(), - // barName); auto barXAddrSpaceId = - // mm.getOrCreateAddressSpace(barXAddrSpaceName); - - // // Base is already incorporated into mapping of each IP by Vivado, so - // // the mapping src has to be 0 - // mm.createMapping(0, axiBar.translation, axiBar.size, - // std::string("AXI-") + barName, - // barXAddrSpaceId, pciAddrSpaceId); - - // i++; - // } - return true; } From a34814b8bed2aee9ee01cf82ef4ec59410a814e7 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Wed, 28 Feb 2024 15:27:36 +0000 Subject: [PATCH 92/93] optimize condition --- lib/core.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/lib/core.cpp b/lib/core.cpp index 122543e6..43872b7a 100644 --- a/lib/core.cpp +++ b/lib/core.cpp @@ -172,8 +172,7 @@ std::list> CoreFactory::make(Card *card, logger->debug("IRQ: {} -> {}:{}", irqName, irqControllerName, num); ip->irqs[irqName] = {num, intc, ""}; } - } else if (!json_is_object(json_irqs) && - ip->getInstanceName().find("axi_dma_") != std::string::npos) { + } else if (ip->getInstanceName().find("axi_dma_") != std::string::npos) { logger->warn("Dma json does not contain an interrupt Controller. A " "Platform Interrupt controller will be added"); From 3a7f670988cfdcc9f2029870c2e5bd8538312255 Mon Sep 17 00:00:00 2001 From: IgnoreWarnings Date: Thu, 29 Feb 2024 14:15:18 +0000 Subject: [PATCH 93/93] add translation from SG --- lib/platform_card.cpp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/lib/platform_card.cpp b/lib/platform_card.cpp index 3ae7b601..75e75e95 100644 --- a/lib/platform_card.cpp +++ b/lib/platform_card.cpp @@ -126,6 +126,11 @@ bool PlatformCard::mapMemoryBlock(const std::shared_ptr block) { mm.createMapping(iovaAddr, 0, block->getSize(), "VFIO-D2H", this->addrSpaceIdDeviceToHost, addrSpaceId); + auto space = mm.findAddressSpace("zynq_ultra_ps_e_0/HPC1_DDR_LOW"); + mm.createMapping(iovaAddr, 0, block->getSize(), "VFIO-D2H", + space, addrSpaceId); + + // Remember that this block has already been mapped for later memoryBlocksMapped.insert({addrSpaceId, block});