From 6f5c5de2b2b4bbc0ee12f9889e1f540f632c07e5 Mon Sep 17 00:00:00 2001 From: Uri Shaked Date: Thu, 5 Sep 2024 13:43:28 +0300 Subject: [PATCH] fix(precheck): power pins should be on met2 for micro tiles --- precheck/pin_check.py | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/precheck/pin_check.py b/precheck/pin_check.py index 9c2ba31..b99b395 100644 --- a/precheck/pin_check.py +++ b/precheck/pin_check.py @@ -183,6 +183,9 @@ def pin_check(gds: str, lef: str, template_def: str, toplevel: str, uses_3v3: bo if uses_3v3: power_pins.append("VAPWR") compat_pins = {"VPWR": "VDPWR"} + power_pins_layer = "met4" + if "tt_block_micro" in template_def: + power_pins_layer = "met2" macro_active = False pins_expected = set(def_pins).union(power_pins).union(compat_pins) @@ -307,9 +310,9 @@ def pin_check(gds: str, lef: str, template_def: str, toplevel: str, uses_3v3: bo else: for layer, lx, by, rx, ty in lef_ports[current_pin]: width = rx - lx - if layer != "met4": + if layer != power_pins_layer: logging.error( - f"Port {current_pin} has wrong layer in {lef}: {layer} != met4" + f"Port {current_pin} has wrong layer in {lef}: {layer} != {power_pins_layer}" ) lef_errors += 1 if width < 1200: