diff --git a/src/perf_event/event/hardware.rs b/src/perf_event/event/hardware.rs index 2e130e6..e6de5d2 100644 --- a/src/perf_event/event/hardware.rs +++ b/src/perf_event/event/hardware.rs @@ -11,12 +11,13 @@ pub enum CacheOp { impl CacheOp { const fn as_u64(&self) -> u64 { use CacheOp::*; - let id = match self { - Read => PERF_COUNT_HW_CACHE_OP_READ, - Write => PERF_COUNT_HW_CACHE_OP_WRITE, - Prefetch => PERF_COUNT_HW_CACHE_OP_WRITE, + #[rustfmt::skip] + let val = match self { + Read => PERF_COUNT_HW_CACHE_OP_READ, + Write => PERF_COUNT_HW_CACHE_OP_WRITE, + Prefetch => PERF_COUNT_HW_CACHE_OP_PREFETCH, }; - id as _ + val as _ } } @@ -29,14 +30,16 @@ pub enum CacheOpResult { impl CacheOpResult { const fn as_u64(&self) -> u64 { use CacheOpResult::*; - let id = match self { + #[rustfmt::skip] + let val = match self { Access => PERF_COUNT_HW_CACHE_RESULT_ACCESS, - Miss => PERF_COUNT_HW_CACHE_RESULT_MISS, + Miss => PERF_COUNT_HW_CACHE_RESULT_MISS, }; - id as _ + val as _ } } +#[rustfmt::skip] #[derive(Clone, Debug)] pub enum HardwareEvent { CpuCycles, @@ -49,12 +52,12 @@ pub enum HardwareEvent { StalledCyclesFrontend, StalledCyclesBackend, RefCpuCycles, - CacheL1d(CacheOp, CacheOpResult), - CacheL1i(CacheOp, CacheOpResult), - CacheLl(CacheOp, CacheOpResult), + CacheL1d (CacheOp, CacheOpResult), + CacheL1i (CacheOp, CacheOpResult), + CacheLl (CacheOp, CacheOpResult), CacheDtlb(CacheOp, CacheOpResult), CacheItlb(CacheOp, CacheOpResult), - CacheBpu(CacheOp, CacheOpResult), + CacheBpu (CacheOp, CacheOpResult), CacheNode(CacheOp, CacheOpResult), } @@ -77,40 +80,28 @@ impl HardwareEvent { const fn calc_cache_config(id: perf_hw_id, op: u64, op_result: u64) -> perf_hw_id { (id as u64 | (op << 8) | (op_result << 16)) as _ } - let config = match self { - CpuCycles => PERF_COUNT_HW_CPU_CYCLES, - Instructions => PERF_COUNT_HW_INSTRUCTIONS, - CacheReferences => PERF_COUNT_HW_CACHE_REFERENCES, - CacheMisses => PERF_COUNT_HW_CACHE_MISSES, - BranchInstructions => PERF_COUNT_HW_BRANCH_INSTRUCTIONS, - BranchMisses => PERF_COUNT_HW_BRANCH_MISSES, - BusCycles => PERF_COUNT_HW_BUS_CYCLES, + + #[rustfmt::skip] + let val = match self { + CpuCycles => PERF_COUNT_HW_CPU_CYCLES, + Instructions => PERF_COUNT_HW_INSTRUCTIONS, + CacheReferences => PERF_COUNT_HW_CACHE_REFERENCES, + CacheMisses => PERF_COUNT_HW_CACHE_MISSES, + BranchInstructions => PERF_COUNT_HW_BRANCH_INSTRUCTIONS, + BranchMisses => PERF_COUNT_HW_BRANCH_MISSES, + BusCycles => PERF_COUNT_HW_BUS_CYCLES, StalledCyclesFrontend => PERF_COUNT_HW_STALLED_CYCLES_FRONTEND, - StalledCyclesBackend => PERF_COUNT_HW_STALLED_CYCLES_BACKEND, - RefCpuCycles => PERF_COUNT_HW_REF_CPU_CYCLES, - CacheL1d(op, op_result) => { - calc_cache_config(PERF_COUNT_HW_CACHE_L1D, op.as_u64(), op_result.as_u64()) - } - CacheL1i(op, op_result) => { - calc_cache_config(PERF_COUNT_HW_CACHE_L1I, op.as_u64(), op_result.as_u64()) - } - CacheLl(op, op_result) => { - calc_cache_config(PERF_COUNT_HW_CACHE_LL, op.as_u64(), op_result.as_u64()) - } - CacheDtlb(op, op_result) => { - calc_cache_config(PERF_COUNT_HW_CACHE_DTLB, op.as_u64(), op_result.as_u64()) - } - CacheItlb(op, op_result) => { - calc_cache_config(PERF_COUNT_HW_CACHE_ITLB, op.as_u64(), op_result.as_u64()) - } - CacheBpu(op, op_result) => { - calc_cache_config(PERF_COUNT_HW_CACHE_BPU, op.as_u64(), op_result.as_u64()) - } - CacheNode(op, op_result) => { - calc_cache_config(PERF_COUNT_HW_CACHE_NODE, op.as_u64(), op_result.as_u64()) - } + StalledCyclesBackend => PERF_COUNT_HW_STALLED_CYCLES_BACKEND, + RefCpuCycles => PERF_COUNT_HW_REF_CPU_CYCLES, + CacheL1d (o, r) => calc_cache_config(PERF_COUNT_HW_CACHE_L1D, o.as_u64(), r.as_u64()), + CacheL1i (o, r) => calc_cache_config(PERF_COUNT_HW_CACHE_L1I, o.as_u64(), r.as_u64()), + CacheLl (o, r) => calc_cache_config(PERF_COUNT_HW_CACHE_LL, o.as_u64(), r.as_u64()), + CacheDtlb(o, r) => calc_cache_config(PERF_COUNT_HW_CACHE_DTLB, o.as_u64(), r.as_u64()), + CacheItlb(o, r) => calc_cache_config(PERF_COUNT_HW_CACHE_ITLB, o.as_u64(), r.as_u64()), + CacheBpu (o, r) => calc_cache_config(PERF_COUNT_HW_CACHE_BPU, o.as_u64(), r.as_u64()), + CacheNode(o, r) => calc_cache_config(PERF_COUNT_HW_CACHE_NODE, o.as_u64(), r.as_u64()), }; - config as _ + val as _ } } diff --git a/src/perf_event/event/scope.rs b/src/perf_event/event/scope.rs index 9640bd8..683db19 100644 --- a/src/perf_event/event/scope.rs +++ b/src/perf_event/event/scope.rs @@ -37,15 +37,16 @@ impl EventScope { } pub(crate) fn enable_in_raw_attr(&self, raw_attr: &mut RawAttr) { + #[rustfmt::skip] match self { - Self::User => raw_attr.set_exclude_user(0), - Self::Kernel => raw_attr.set_exclude_kernel(0), - Self::Hv => raw_attr.set_exclude_hv(0), - Self::Idle => raw_attr.set_exclude_idle(0), - Self::Host => raw_attr.set_exclude_host(0), - Self::Guest => raw_attr.set_exclude_guest(0), + Self::User => raw_attr.set_exclude_user(0), + Self::Kernel => raw_attr.set_exclude_kernel(0), + Self::Hv => raw_attr.set_exclude_hv(0), + Self::Idle => raw_attr.set_exclude_idle(0), + Self::Host => raw_attr.set_exclude_host(0), + Self::Guest => raw_attr.set_exclude_guest(0), Self::CallchainKernel => raw_attr.set_exclude_callchain_kernel(0), - Self::CallchainUser => raw_attr.set_exclude_callchain_user(0), + Self::CallchainUser => raw_attr.set_exclude_callchain_user(0), }; } } diff --git a/src/perf_event/event/software.rs b/src/perf_event/event/software.rs index 3e285fe..a8921e0 100644 --- a/src/perf_event/event/software.rs +++ b/src/perf_event/event/software.rs @@ -23,22 +23,23 @@ pub enum SoftwareEvent { impl SoftwareEvent { pub(crate) const fn as_u64(&self) -> u64 { use SoftwareEvent::*; + #[rustfmt::skip] let config = match self { - CpuClock => PERF_COUNT_SW_CPU_CLOCK, - TaskClock => PERF_COUNT_SW_TASK_CLOCK, - PageFaults => PERF_COUNT_SW_PAGE_FAULTS, + CpuClock => PERF_COUNT_SW_CPU_CLOCK, + TaskClock => PERF_COUNT_SW_TASK_CLOCK, + PageFaults => PERF_COUNT_SW_PAGE_FAULTS, ContextSwitches => PERF_COUNT_SW_CONTEXT_SWITCHES, - CpuMigrations => PERF_COUNT_SW_CPU_MIGRATIONS, - PageFaultsMin => PERF_COUNT_SW_PAGE_FAULTS_MIN, - PageFaultsMaj => PERF_COUNT_SW_PAGE_FAULTS_MAJ, + CpuMigrations => PERF_COUNT_SW_CPU_MIGRATIONS, + PageFaultsMin => PERF_COUNT_SW_PAGE_FAULTS_MIN, + PageFaultsMaj => PERF_COUNT_SW_PAGE_FAULTS_MAJ, AlignmentFaults => PERF_COUNT_SW_ALIGNMENT_FAULTS, EmulationFaults => PERF_COUNT_SW_EMULATION_FAULTS, #[cfg(feature = "linux-3.12")] - Dummy => PERF_COUNT_SW_DUMMY, + Dummy => PERF_COUNT_SW_DUMMY, #[cfg(feature = "linux-4.4")] - BpfOutput => PERF_COUNT_SW_BPF_OUTPUT, + BpfOutput => PERF_COUNT_SW_BPF_OUTPUT, #[cfg(feature = "linux-5.13")] - CgroupSwitches => PERF_COUNT_SW_CGROUP_SWITCHES, + CgroupSwitches => PERF_COUNT_SW_CGROUP_SWITCHES, }; config as _ } diff --git a/src/perf_event/sampling/config/extra_record.rs b/src/perf_event/sampling/config/extra_record.rs index 13f90a7..4c0a7f0 100644 --- a/src/perf_event/sampling/config/extra_record.rs +++ b/src/perf_event/sampling/config/extra_record.rs @@ -76,23 +76,25 @@ impl ExtraRecord { } pub(crate) fn enable_in_raw_attr(&self, raw_attr: &mut RawAttr) { - match self { - Self::Mmap => raw_attr.set_mmap(1), + #[rustfmt::skip] + let val = match self { + Self::Mmap => raw_attr.set_mmap(1), #[cfg(feature = "linux-3.12")] - Self::Mmap2 => raw_attr.set_mmap2(1), + Self::Mmap2 => raw_attr.set_mmap2(1), #[cfg(feature = "linux-4.3")] Self::ContextSwitch => raw_attr.set_context_switch(1), #[cfg(feature = "linux-4.12")] - Self::Namespaces => raw_attr.set_namespaces(1), + Self::Namespaces => raw_attr.set_namespaces(1), #[cfg(feature = "linux-5.1")] - Self::Ksymbol => raw_attr.set_ksymbol(1), + Self::Ksymbol => raw_attr.set_ksymbol(1), #[cfg(feature = "linux-5.1")] - Self::BpfEvent => raw_attr.set_bpf_event(1), + Self::BpfEvent => raw_attr.set_bpf_event(1), #[cfg(feature = "linux-5.7")] - Self::Cgroup => raw_attr.set_cgroup(1), + Self::Cgroup => raw_attr.set_cgroup(1), #[cfg(feature = "linux-5.9")] - Self::TextPoke => raw_attr.set_text_poke(1), - Self::ForkAndExit => raw_attr.set_task(1), - } + Self::TextPoke => raw_attr.set_text_poke(1), + Self::ForkAndExit => raw_attr.set_task(1), + }; + val } } diff --git a/src/perf_event/sampling/config/new.rs b/src/perf_event/sampling/config/new.rs index 104f40b..8a790c2 100644 --- a/src/perf_event/sampling/config/new.rs +++ b/src/perf_event/sampling/config/new.rs @@ -65,13 +65,14 @@ pub fn new<'t>( branch_sample_type: 0, // TODO: Not all hardware supports this feature sample_regs_user: sample_record_fields.abi_and_regs_user.unwrap_or(0), sample_stack_user: sample_record_fields.data_stack_user.unwrap_or(0) as _, + #[rustfmt::skip] #[cfg(feature = "linux-4.1")] clockid: extra_config.clockid.as_ref().map_or(0, |id| match id { - ClockId::Monotonic => CLOCK_MONOTONIC, + ClockId::Monotonic => CLOCK_MONOTONIC, ClockId::MonotonicRaw => CLOCK_MONOTONIC_RAW, - ClockId::RealTime => CLOCK_REALTIME, - ClockId::BootTime => CLOCK_BOOTTIME, - ClockId::Tai => CLOCK_TAI, + ClockId::RealTime => CLOCK_REALTIME, + ClockId::BootTime => CLOCK_BOOTTIME, + ClockId::Tai => CLOCK_TAI, }) as _, #[cfg(feature = "linux-3.19")] sample_regs_intr: sample_record_fields.abi_and_regs_intr.unwrap_or(0), diff --git a/src/perf_event/sampling/record/body/sample/abi_and_regs.rs b/src/perf_event/sampling/record/body/sample/abi_and_regs.rs index 69d1269..da0873b 100644 --- a/src/perf_event/sampling/record/body/sample/abi_and_regs.rs +++ b/src/perf_event/sampling/record/body/sample/abi_and_regs.rs @@ -10,12 +10,14 @@ pub enum Abi { impl Abi { pub(crate) fn from_raw(abi: u64) -> Self { - match abi as _ { + #[rustfmt::skip] + let val = match abi as _ { PERF_SAMPLE_REGS_ABI_NONE => Self::AbiNone, - PERF_SAMPLE_REGS_ABI_32 => Self::Abi32, - PERF_SAMPLE_REGS_ABI_64 => Self::Abi64, + PERF_SAMPLE_REGS_ABI_32 => Self::Abi32, + PERF_SAMPLE_REGS_ABI_64 => Self::Abi64, abi => unreachable!("ABI: {}", abi), - } + }; + val } } diff --git a/src/perf_event/sampling/record/body/sample/data_src.rs b/src/perf_event/sampling/record/body/sample/data_src.rs index 8d281c9..2e0acfb 100644 --- a/src/perf_event/sampling/record/body/sample/data_src.rs +++ b/src/perf_event/sampling/record/body/sample/data_src.rs @@ -64,85 +64,97 @@ pub struct DataSrc { impl MemOp { pub(crate) fn from_raw(raw: u64) -> Self { - match (raw >> PERF_MEM_OP_SHIFT) as u32 { - bits if bits & PERF_MEM_OP_NA > 0 => Self::Na, - bits if bits & PERF_MEM_OP_LOAD > 0 => Self::Load, - bits if bits & PERF_MEM_OP_STORE > 0 => Self::Store, + #[rustfmt::skip] + let val = match (raw >> PERF_MEM_OP_SHIFT) as u32 { + bits if bits & PERF_MEM_OP_NA > 0 => Self::Na, + bits if bits & PERF_MEM_OP_LOAD > 0 => Self::Load, + bits if bits & PERF_MEM_OP_STORE > 0 => Self::Store, bits if bits & PERF_MEM_OP_PFETCH > 0 => Self::Pfetch, - bits if bits & PERF_MEM_OP_EXEC > 0 => Self::Exec, + bits if bits & PERF_MEM_OP_EXEC > 0 => Self::Exec, bits => unreachable!("mem_op bits: {}", bits), - } + }; + val } } impl MemLvl { pub(crate) fn from_raw(raw: u64) -> Self { - match (raw >> PERF_MEM_LVL_SHIFT) as u32 { - bits if bits & PERF_MEM_LVL_NA > 0 => Self::Na, - bits if bits & PERF_MEM_LVL_HIT > 0 => Self::Hit, - bits if bits & PERF_MEM_LVL_MISS > 0 => Self::Miss, - bits if bits & PERF_MEM_LVL_L1 > 0 => Self::L1, - bits if bits & PERF_MEM_LVL_LFB > 0 => Self::Lfb, - bits if bits & PERF_MEM_LVL_L2 > 0 => Self::L2, - bits if bits & PERF_MEM_LVL_L3 > 0 => Self::L3, - bits if bits & PERF_MEM_LVL_LOC_RAM > 0 => Self::LocRam, + #[rustfmt::skip] + let val = match (raw >> PERF_MEM_LVL_SHIFT) as u32 { + bits if bits & PERF_MEM_LVL_NA > 0 => Self::Na, + bits if bits & PERF_MEM_LVL_HIT > 0 => Self::Hit, + bits if bits & PERF_MEM_LVL_MISS > 0 => Self::Miss, + bits if bits & PERF_MEM_LVL_L1 > 0 => Self::L1, + bits if bits & PERF_MEM_LVL_LFB > 0 => Self::Lfb, + bits if bits & PERF_MEM_LVL_L2 > 0 => Self::L2, + bits if bits & PERF_MEM_LVL_L3 > 0 => Self::L3, + bits if bits & PERF_MEM_LVL_LOC_RAM > 0 => Self::LocRam, bits if bits & PERF_MEM_LVL_REM_RAM1 > 0 => Self::RemRam1, bits if bits & PERF_MEM_LVL_REM_RAM2 > 0 => Self::RemRam2, bits if bits & PERF_MEM_LVL_REM_CCE1 > 0 => Self::RemCce1, bits if bits & PERF_MEM_LVL_REM_CCE2 > 0 => Self::RemCce2, - bits if bits & PERF_MEM_LVL_IO > 0 => Self::Io, - bits if bits & PERF_MEM_LVL_UNC > 0 => Self::Unc, + bits if bits & PERF_MEM_LVL_IO > 0 => Self::Io, + bits if bits & PERF_MEM_LVL_UNC > 0 => Self::Unc, bits => unreachable!("mem_lvl bits: {}", bits), - } + }; + val } } impl MemSnoop { pub(crate) fn from_raw(raw: u64) -> Self { - match (raw >> PERF_MEM_SNOOP_SHIFT) as u32 { - bits if bits & PERF_MEM_SNOOP_NA > 0 => Self::Na, + #[rustfmt::skip] + let val = match (raw >> PERF_MEM_SNOOP_SHIFT) as u32 { + bits if bits & PERF_MEM_SNOOP_NA > 0 => Self::Na, bits if bits & PERF_MEM_SNOOP_NONE > 0 => Self::None, - bits if bits & PERF_MEM_SNOOP_HIT > 0 => Self::Hit, + bits if bits & PERF_MEM_SNOOP_HIT > 0 => Self::Hit, bits if bits & PERF_MEM_SNOOP_MISS > 0 => Self::Miss, bits if bits & PERF_MEM_SNOOP_HITM > 0 => Self::Hitm, bits => unreachable!("mem_snoop bits: {}", bits), - } + }; + val } } impl MemLock { pub(crate) fn from_raw(raw: u64) -> Self { - match (raw >> PERF_MEM_LOCK_SHIFT) as u32 { - bits if bits & PERF_MEM_LOCK_NA > 0 => Self::Na, + #[rustfmt::skip] + let val = match (raw >> PERF_MEM_LOCK_SHIFT) as u32 { + bits if bits & PERF_MEM_LOCK_NA > 0 => Self::Na, bits if bits & PERF_MEM_LOCK_LOCKED > 0 => Self::Locked, bits => unreachable!("mem_lock bits: {}", bits), - } + }; + val } } impl MemDtlb { pub(crate) fn from_raw(raw: u64) -> Self { - match (raw >> PERF_MEM_TLB_SHIFT) as u32 { - bits if bits & PERF_MEM_TLB_NA > 0 => Self::Na, - bits if bits & PERF_MEM_TLB_HIT > 0 => Self::Hit, + #[rustfmt::skip] + let val = match (raw >> PERF_MEM_TLB_SHIFT) as u32 { + bits if bits & PERF_MEM_TLB_NA > 0 => Self::Na, + bits if bits & PERF_MEM_TLB_HIT > 0 => Self::Hit, bits if bits & PERF_MEM_TLB_MISS > 0 => Self::Miss, - bits if bits & PERF_MEM_TLB_L1 > 0 => Self::L1, - bits if bits & PERF_MEM_TLB_L2 > 0 => Self::L2, - bits if bits & PERF_MEM_TLB_WK > 0 => Self::Wk, - bits if bits & PERF_MEM_TLB_OS > 0 => Self::Os, + bits if bits & PERF_MEM_TLB_L1 > 0 => Self::L1, + bits if bits & PERF_MEM_TLB_L2 > 0 => Self::L2, + bits if bits & PERF_MEM_TLB_WK > 0 => Self::Wk, + bits if bits & PERF_MEM_TLB_OS > 0 => Self::Os, bits => unreachable!("mem_dtlb bits: {}", bits), - } + }; + val } } impl DataSrc { pub(crate) fn from_raw(raw: u64) -> Self { - Self { - mem_op: MemOp::from_raw(raw), - mem_lvl: MemLvl::from_raw(raw), + #[rustfmt::skip] + let val = Self { + mem_op: MemOp ::from_raw(raw), + mem_lvl: MemLvl ::from_raw(raw), mem_snoop: MemSnoop::from_raw(raw), - mem_lock: MemLock::from_raw(raw), - mem_dtlb: MemDtlb::from_raw(raw), - } + mem_lock: MemLock ::from_raw(raw), + mem_dtlb: MemDtlb ::from_raw(raw), + }; + val } } diff --git a/src/perf_event/tracing/config/new.rs b/src/perf_event/tracing/config/new.rs index 81ca6b2..852f904 100644 --- a/src/perf_event/tracing/config/new.rs +++ b/src/perf_event/tracing/config/new.rs @@ -61,13 +61,14 @@ pub fn new<'t>( branch_sample_type: 0, // TODO: Not all hardware supports this feature sample_regs_user: sample_record_fields.abi_and_regs_user.unwrap_or(0), sample_stack_user: sample_record_fields.data_stack_user.unwrap_or(0) as _, + #[rustfmt::skip] #[cfg(feature = "linux-4.1")] clockid: extra_config.clockid.as_ref().map_or(0, |id| match id { - ClockId::Monotonic => CLOCK_MONOTONIC, + ClockId::Monotonic => CLOCK_MONOTONIC, ClockId::MonotonicRaw => CLOCK_MONOTONIC_RAW, - ClockId::RealTime => CLOCK_REALTIME, - ClockId::BootTime => CLOCK_BOOTTIME, - ClockId::Tai => CLOCK_TAI, + ClockId::RealTime => CLOCK_REALTIME, + ClockId::BootTime => CLOCK_BOOTTIME, + ClockId::Tai => CLOCK_TAI, }) as _, #[cfg(feature = "linux-3.19")] sample_regs_intr: sample_record_fields.abi_and_regs_intr.unwrap_or(0),